Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dt-bindings: clk: g12a-aoclkc: expose all clock ids

Due to a policy change in clock ID bindings handling, expose
all the "private" clock IDs to the public clock dt-bindings
to move out of the previous maintenance scheme.

This refers to a discussion at [1] & [2] with Krzysztof about
the issue with the current maintenance.

It was decided to move every g12a-aoclkc ID to the public clock
dt-bindings headers to be merged in a single tree so we
can safely add new clocks without having merge issues.

[1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/
[2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-10-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>

authored by

Neil Armstrong and committed by
Jerome Brunet
6655744d b1262497

+7 -17
-17
drivers/clk/meson/g12a-aoclk.h
··· 7 7 #ifndef __G12A_AOCLKC_H 8 8 #define __G12A_AOCLKC_H 9 9 10 - /* 11 - * CLKID index values 12 - * 13 - * These indices are entirely contrived and do not map onto the hardware. 14 - * It has now been decided to expose everything by default in the DT header: 15 - * include/dt-bindings/clock/g12a-aoclkc.h. Only the clocks ids we don't want 16 - * to expose, such as the internal muxes and dividers of composite clocks, 17 - * will remain defined here. 18 - */ 19 - #define CLKID_AO_SAR_ADC_DIV 17 20 - #define CLKID_AO_32K_PRE 20 21 - #define CLKID_AO_32K_DIV 21 22 - #define CLKID_AO_32K_SEL 22 23 - #define CLKID_AO_CEC_PRE 24 24 - #define CLKID_AO_CEC_DIV 25 25 - #define CLKID_AO_CEC_SEL 26 26 - 27 10 #include <dt-bindings/clock/g12a-aoclkc.h> 28 11 #include <dt-bindings/reset/g12a-aoclkc.h> 29 12
+7
include/dt-bindings/clock/g12a-aoclkc.h
··· 26 26 #define CLKID_AO_M4_FCLK 13 27 27 #define CLKID_AO_M4_HCLK 14 28 28 #define CLKID_AO_CLK81 15 29 + #define CLKID_AO_SAR_ADC_DIV 17 29 30 #define CLKID_AO_SAR_ADC_SEL 16 30 31 #define CLKID_AO_SAR_ADC_CLK 18 31 32 #define CLKID_AO_CTS_OSCIN 19 33 + #define CLKID_AO_32K_PRE 20 34 + #define CLKID_AO_32K_DIV 21 35 + #define CLKID_AO_32K_SEL 22 32 36 #define CLKID_AO_32K 23 37 + #define CLKID_AO_CEC_PRE 24 38 + #define CLKID_AO_CEC_DIV 25 39 + #define CLKID_AO_CEC_SEL 26 33 40 #define CLKID_AO_CEC 27 34 41 #define CLKID_AO_CTS_RTC_OSCIN 28 35 42