commit 4f05e82003d1c20da29fa593420b8d92e2c8d4e6 · tjh.dev/kernel

+5 -1

arch/loongarch/Kconfig

··· 16 16 select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI 17 17 select ARCH_HAS_CPU_FINALIZE_INIT 18 18 select ARCH_HAS_CURRENT_STACK_POINTER 19 + select ARCH_HAS_FAST_MULTIPLIER 19 20 select ARCH_HAS_FORTIFY_SOURCE 20 21 select ARCH_HAS_KCOV 21 22 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS ··· 57 56 select ARCH_SUPPORTS_ACPI 58 57 select ARCH_SUPPORTS_ATOMIC_RMW 59 58 select ARCH_SUPPORTS_HUGETLBFS 59 + select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 60 60 select ARCH_SUPPORTS_LTO_CLANG 61 61 select ARCH_SUPPORTS_LTO_CLANG_THIN 62 62 select ARCH_SUPPORTS_NUMA_BALANCING ··· 65 63 select ARCH_USE_CMPXCHG_LOCKREF 66 64 select ARCH_USE_QUEUED_RWLOCKS 67 65 select ARCH_USE_QUEUED_SPINLOCKS 66 + select ARCH_WANT_DEFAULT_BPF_JIT 68 67 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT 69 68 select ARCH_WANT_LD_ORPHAN_WARN 70 69 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP 71 70 select ARCH_WANTS_NO_INSTR 71 + select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE 72 72 select BUILDTIME_TABLE_SORT 73 73 select COMMON_CLK 74 74 select CPU_PM ··· 178 174 select PCI_QUIRKS 179 175 select PERF_USE_VMALLOC 180 176 select RTC_LIB 181 - select SMP 182 177 select SPARSE_IRQ 183 178 select SYSCTL_ARCH_UNALIGN_ALLOW 184 179 select SYSCTL_ARCH_UNALIGN_NO_WARN ··· 423 420 424 421 config SCHED_SMT 425 422 bool "SMT scheduler support" 423 + depends on SMP 426 424 default y 427 425 help 428 426 Improves scheduler's performance when there are multiple

+1 -1

arch/loongarch/Makefile

··· 101 101 KBUILD_CFLAGS += -fno-jump-tables 102 102 endif 103 103 104 - KBUILD_RUSTFLAGS += --target=$(objtree)/scripts/target.json 104 + KBUILD_RUSTFLAGS += --target=loongarch64-unknown-none-softfloat 105 105 KBUILD_RUSTFLAGS_MODULE += -Crelocation-model=pic 106 106 107 107 ifeq ($(CONFIG_RELOCATABLE),y)

+83 -3

arch/loongarch/boot/dts/loongson-2k0500.dtsi

··· 6 6 /dts-v1/; 7 7 8 8 #include <dt-bindings/interrupt-controller/irq.h> 9 + #include <dt-bindings/clock/loongson,ls2k-clk.h> 9 10 10 11 / { 11 12 #address-cells = <2>; ··· 20 19 compatible = "loongson,la264"; 21 20 device_type = "cpu"; 22 21 reg = <0x0>; 23 - clocks = <&cpu_clk>; 22 + clocks = <&clk LOONGSON2_NODE_CLK>; 24 23 }; 25 24 }; 26 25 27 - cpu_clk: cpu-clk { 26 + ref_100m: clock-ref-100m { 28 27 compatible = "fixed-clock"; 29 28 #clock-cells = <0>; 30 - clock-frequency = <500000000>; 29 + clock-frequency = <100000000>; 30 + clock-output-names = "ref_100m"; 31 31 }; 32 32 33 33 cpuintc: interrupt-controller { 34 34 compatible = "loongson,cpu-interrupt-controller"; 35 35 #interrupt-cells = <1>; 36 36 interrupt-controller; 37 + }; 38 + 39 + thermal-zones { 40 + cpu-thermal { 41 + polling-delay-passive = <1000>; 42 + polling-delay = <5000>; 43 + thermal-sensors = <&tsensor 0>; 44 + 45 + trips { 46 + cpu-alert { 47 + temperature = <33000>; 48 + hysteresis = <2000>; 49 + type = "active"; 50 + }; 51 + 52 + cpu-crit { 53 + temperature = <85000>; 54 + hysteresis = <5000>; 55 + type = "critical"; 56 + }; 57 + }; 58 + }; 37 59 }; 38 60 39 61 bus@10000000 { ··· 74 50 #size-cells = <1>; 75 51 #address-cells = <2>; 76 52 ranges = <1 0x0 0x0 0x16400000 0x4000>; 53 + }; 54 + 55 + clk: clock-controller@1fe10400 { 56 + compatible = "loongson,ls2k0500-clk"; 57 + reg = <0x0 0x1fe10400 0x0 0x2c>; 58 + #clock-cells = <1>; 59 + clocks = <&ref_100m>; 60 + clock-names = "ref_100m"; 61 + }; 62 + 63 + dma-controller@1fe10c00 { 64 + compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma"; 65 + reg = <0 0x1fe10c00 0 0x8>; 66 + interrupt-parent = <&eiointc>; 67 + interrupts = <67>; 68 + clocks = <&clk LOONGSON2_APB_CLK>; 69 + #dma-cells = <1>; 70 + status = "disabled"; 71 + }; 72 + 73 + dma-controller@1fe10c10 { 74 + compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma"; 75 + reg = <0 0x1fe10c10 0 0x8>; 76 + interrupt-parent = <&eiointc>; 77 + interrupts = <68>; 78 + clocks = <&clk LOONGSON2_APB_CLK>; 79 + #dma-cells = <1>; 80 + status = "disabled"; 81 + }; 82 + 83 + dma-controller@1fe10c20 { 84 + compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma"; 85 + reg = <0 0x1fe10c20 0 0x8>; 86 + interrupt-parent = <&eiointc>; 87 + interrupts = <69>; 88 + clocks = <&clk LOONGSON2_APB_CLK>; 89 + #dma-cells = <1>; 90 + status = "disabled"; 91 + }; 92 + 93 + dma-controller@1fe10c30 { 94 + compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma"; 95 + reg = <0 0x1fe10c30 0 0x8>; 96 + interrupt-parent = <&eiointc>; 97 + interrupts = <70>; 98 + clocks = <&clk LOONGSON2_APB_CLK>; 99 + #dma-cells = <1>; 100 + status = "disabled"; 77 101 }; 78 102 79 103 liointc0: interrupt-controller@1fe11400 { ··· 209 137 interrupt-parent = <&eiointc>; 210 138 interrupts = <72>; 211 139 status = "disabled"; 140 + }; 141 + 142 + tsensor: thermal-sensor@1fe11500 { 143 + compatible = "loongson,ls2k0500-thermal", "loongson,ls2k1000-thermal"; 144 + reg = <0x0 0x1fe11500 0x0 0x30>; 145 + interrupt-parent = <&liointc0>; 146 + interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; 147 + #thermal-sensor-cells = <1>; 212 148 }; 213 149 214 150 uart0: serial@1ff40800 {

-4

arch/loongarch/boot/dts/loongson-2k1000-ref.dts

··· 113 113 status = "okay"; 114 114 }; 115 115 116 - &clk { 117 - status = "okay"; 118 - }; 119 - 120 116 &rtc0 { 121 117 status = "okay"; 122 118 };

-1

arch/loongarch/boot/dts/loongson-2k1000.dtsi

··· 159 159 #clock-cells = <1>; 160 160 clocks = <&ref_100m>; 161 161 clock-names = "ref_100m"; 162 - status = "disabled"; 163 162 }; 164 163 165 164 gpio0: gpio@1fe00500 {

+45 -4

arch/loongarch/boot/dts/loongson-2k2000.dtsi

··· 6 6 /dts-v1/; 7 7 8 8 #include <dt-bindings/interrupt-controller/irq.h> 9 + #include <dt-bindings/clock/loongson,ls2k-clk.h> 9 10 10 11 / { 11 12 #address-cells = <2>; ··· 20 19 compatible = "loongson,la364"; 21 20 device_type = "cpu"; 22 21 reg = <0x0>; 23 - clocks = <&cpu_clk>; 22 + clocks = <&clk LOONGSON2_NODE_CLK>; 24 23 }; 25 24 26 25 cpu1: cpu@2 { 27 26 compatible = "loongson,la364"; 28 27 device_type = "cpu"; 29 28 reg = <0x1>; 30 - clocks = <&cpu_clk>; 29 + clocks = <&clk LOONGSON2_NODE_CLK>; 31 30 }; 32 31 }; 33 32 34 - cpu_clk: cpu-clk { 33 + ref_100m: clock-ref-100m { 35 34 compatible = "fixed-clock"; 36 35 #clock-cells = <0>; 37 - clock-frequency = <1400000000>; 36 + clock-frequency = <100000000>; 37 + clock-output-names = "ref_100m"; 38 38 }; 39 39 40 40 cpuintc: interrupt-controller { 41 41 compatible = "loongson,cpu-interrupt-controller"; 42 42 #interrupt-cells = <1>; 43 43 interrupt-controller; 44 + }; 45 + 46 + thermal-zones { 47 + cpu-thermal { 48 + polling-delay-passive = <1000>; 49 + polling-delay = <5000>; 50 + thermal-sensors = <&tsensor 0>; 51 + 52 + trips { 53 + cpu-alert { 54 + temperature = <40000>; 55 + hysteresis = <2000>; 56 + type = "active"; 57 + }; 58 + 59 + cpu-crit { 60 + temperature = <85000>; 61 + hysteresis = <5000>; 62 + type = "critical"; 63 + }; 64 + }; 65 + }; 44 66 }; 45 67 46 68 bus@10000000 { ··· 80 56 #size-cells = <1>; 81 57 #address-cells = <2>; 82 58 ranges = <1 0x0 0x0 0x18400000 0x4000>; 59 + }; 60 + 61 + clk: clock-controller@10010480 { 62 + compatible = "loongson,ls2k2000-clk"; 63 + reg = <0x0 0x10010480 0x0 0x100>; 64 + #clock-cells = <1>; 65 + clocks = <&ref_100m>; 66 + clock-names = "ref_100m"; 83 67 }; 84 68 85 69 pmc: power-management@100d0000 { ··· 110 78 mask = <0x3c00>; 111 79 value = <0x3c00>; 112 80 }; 81 + }; 82 + 83 + tsensor: thermal-sensor@1fe01460 { 84 + compatible = "loongson,ls2k2000-thermal"; 85 + reg = <0x0 0x1fe01460 0x0 0x30>, 86 + <0x0 0x1fe0019c 0x0 0x4>; 87 + interrupt-parent = <&liointc>; 88 + interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; 89 + #thermal-sensor-cells = <1>; 113 90 }; 114 91 115 92 liointc: interrupt-controller@1fe01400 {

+24

arch/loongarch/configs/loongson3_defconfig

··· 14 14 CONFIG_TASK_DELAY_ACCT=y 15 15 CONFIG_TASK_XACCT=y 16 16 CONFIG_TASK_IO_ACCOUNTING=y 17 + CONFIG_PSI=y 18 + CONFIG_IKCONFIG=y 19 + CONFIG_IKCONFIG_PROC=y 20 + CONFIG_IKHEADERS=y 17 21 CONFIG_LOG_BUF_SHIFT=18 18 22 CONFIG_NUMA_BALANCING=y 19 23 CONFIG_MEMCG=y ··· 133 129 CONFIG_IP_MROUTE_MULTIPLE_TABLES=y 134 130 CONFIG_IP_PIMSM_V1=y 135 131 CONFIG_IP_PIMSM_V2=y 132 + CONFIG_INET_AH=m 136 133 CONFIG_INET_ESP=m 134 + CONFIG_INET_ESP_OFFLOAD=m 135 + CONFIG_INET_ESPINTCP=y 136 + CONFIG_INET_IPCOMP=m 137 137 CONFIG_INET_UDP_DIAG=y 138 138 CONFIG_TCP_CONG_ADVANCED=y 139 139 CONFIG_TCP_CONG_BBR=m 140 140 CONFIG_IPV6_ROUTER_PREF=y 141 141 CONFIG_IPV6_ROUTE_INFO=y 142 + CONFIG_INET6_AH=m 142 143 CONFIG_INET6_ESP=m 144 + CONFIG_INET6_ESP_OFFLOAD=m 145 + CONFIG_INET6_ESPINTCP=y 146 + CONFIG_INET6_IPCOMP=m 147 + CONFIG_IPV6_MULTIPLE_TABLES=y 143 148 CONFIG_IPV6_MROUTE=y 144 149 CONFIG_MPTCP=y 145 150 CONFIG_NETWORK_PHY_TIMESTAMPING=y ··· 164 151 CONFIG_NF_CONNTRACK_TFTP=m 165 152 CONFIG_NF_CT_NETLINK=m 166 153 CONFIG_NF_TABLES=m 154 + CONFIG_NF_TABLES_INET=y 155 + CONFIG_NFT_CT=m 167 156 CONFIG_NFT_CONNLIMIT=m 168 157 CONFIG_NFT_LOG=m 169 158 CONFIG_NFT_LIMIT=m ··· 178 163 CONFIG_NFT_REJECT=m 179 164 CONFIG_NFT_COMPAT=m 180 165 CONFIG_NFT_HASH=m 166 + CONFIG_NFT_FIB_INET=m 181 167 CONFIG_NFT_SOCKET=m 182 168 CONFIG_NFT_OSF=m 183 169 CONFIG_NFT_TPROXY=m ··· 275 259 CONFIG_IP_NF_ARPFILTER=m 276 260 CONFIG_IP_NF_ARP_MANGLE=m 277 261 CONFIG_NF_TABLES_IPV6=y 262 + CONFIG_NFT_FIB_IPV6=m 278 263 CONFIG_IP6_NF_IPTABLES=y 279 264 CONFIG_IP6_NF_MATCH_AH=m 280 265 CONFIG_IP6_NF_MATCH_EUI64=m ··· 296 279 CONFIG_IP6_NF_TARGET_MASQUERADE=m 297 280 CONFIG_IP6_NF_TARGET_NPT=m 298 281 CONFIG_NF_TABLES_BRIDGE=m 282 + CONFIG_NF_CONNTRACK_BRIDGE=m 299 283 CONFIG_BRIDGE_NF_EBTABLES=m 300 284 CONFIG_BRIDGE_EBT_BROUTE=m 301 285 CONFIG_BRIDGE_EBT_T_FILTER=m ··· 567 549 CONFIG_TXGBE=y 568 550 # CONFIG_NET_VENDOR_WIZNET is not set 569 551 # CONFIG_NET_VENDOR_XILINX is not set 552 + CONFIG_MOTORCOMM_PHY=y 570 553 CONFIG_PPP=m 571 554 CONFIG_PPP_BSDCOMP=m 572 555 CONFIG_PPP_DEFLATE=m ··· 829 810 CONFIG_NTB_PERF=m 830 811 CONFIG_NTB_TRANSPORT=m 831 812 CONFIG_PWM=y 813 + CONFIG_GENERIC_PHY=y 832 814 CONFIG_USB4=y 833 815 CONFIG_EXT2_FS=y 834 816 CONFIG_EXT2_FS_XATTR=y ··· 895 875 CONFIG_UBIFS_FS_ADVANCED_COMPR=y 896 876 CONFIG_CRAMFS=m 897 877 CONFIG_SQUASHFS=y 878 + CONFIG_SQUASHFS_FILE_DIRECT=y 879 + CONFIG_SQUASHFS_CHOICE_DECOMP_BY_MOUNT=y 898 880 CONFIG_SQUASHFS_XATTR=y 899 881 CONFIG_SQUASHFS_LZ4=y 900 882 CONFIG_SQUASHFS_LZO=y 901 883 CONFIG_SQUASHFS_XZ=y 884 + CONFIG_SQUASHFS_ZSTD=y 902 885 CONFIG_MINIX_FS=m 903 886 CONFIG_ROMFS_FS=m 904 887 CONFIG_PSTORE=m ··· 983 960 CONFIG_SCHEDSTATS=y 984 961 # CONFIG_DEBUG_PREEMPT is not set 985 962 # CONFIG_FTRACE is not set 963 + CONFIG_UNWINDER_ORC=y

+1

arch/loongarch/include/asm/acpi.h

··· 8 8 #ifndef _ASM_LOONGARCH_ACPI_H 9 9 #define _ASM_LOONGARCH_ACPI_H 10 10 11 + #include <asm/smp.h> 11 12 #include <asm/suspend.h> 12 13 13 14 #ifdef CONFIG_ACPI

+6

arch/loongarch/include/asm/asm-prototypes.h

··· 6 6 #include <asm/page.h> 7 7 #include <asm/ftrace.h> 8 8 #include <asm-generic/asm-prototypes.h> 9 + 10 + #ifdef CONFIG_ARCH_SUPPORTS_INT128 11 + __int128_t __ashlti3(__int128_t a, int b); 12 + __int128_t __ashrti3(__int128_t a, int b); 13 + __int128_t __lshrti3(__int128_t a, int b); 14 + #endif

+1 -2

arch/loongarch/include/asm/perf_event.h

··· 13 13 14 14 #define perf_arch_fetch_caller_regs(regs, __ip) { \ 15 15 (regs)->csr_era = (__ip); \ 16 - (regs)->regs[3] = current_stack_pointer; \ 17 - (regs)->regs[22] = (unsigned long) __builtin_frame_address(0); \ 16 + (regs)->regs[3] = (unsigned long) __builtin_frame_address(0); \ 18 17 } 19 18 20 19 #endif /* __LOONGARCH_PERF_EVENT_H__ */

+6

arch/loongarch/include/asm/smp.h

··· 6 6 #ifndef __ASM_SMP_H 7 7 #define __ASM_SMP_H 8 8 9 + #ifdef CONFIG_SMP 10 + 9 11 #include <linux/atomic.h> 10 12 #include <linux/bitops.h> 11 13 #include <linux/linkage.h> ··· 110 108 loongson_cpu_die(cpu); 111 109 } 112 110 #endif 111 + 112 + #else /* !CONFIG_SMP */ 113 + #define cpu_logical_map(cpu) 0 114 + #endif /* CONFIG_SMP */ 113 115 114 116 #endif /* __ASM_SMP_H */

+1 -1

arch/loongarch/kernel/machine_kexec.c

··· 225 225 226 226 void machine_shutdown(void) 227 227 { 228 + #ifdef CONFIG_SMP 228 229 int cpu; 229 230 230 231 /* All CPUs go to reboot_code_buffer */ ··· 233 232 if (!cpu_online(cpu)) 234 233 cpu_device_up(get_cpu_device(cpu)); 235 234 236 - #ifdef CONFIG_SMP 237 235 smp_call_function(kexec_shutdown_secondary, NULL, 0); 238 236 #endif 239 237 }

+2

arch/loongarch/lib/Makefile

··· 6 6 lib-y += delay.o memset.o memcpy.o memmove.o \ 7 7 clear_user.o copy_user.o csum.o dump_tlb.o unaligned.o 8 8 9 + obj-$(CONFIG_ARCH_SUPPORTS_INT128) += tishift.o 10 + 9 11 obj-$(CONFIG_CPU_HAS_LSX) += xor_simd.o xor_simd_glue.o 10 12 11 13 obj-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o

+56

arch/loongarch/lib/tishift.S

··· 1 + /* SPDX-License-Identifier: GPL-2.0-only */ 2 + 3 + #include <asm/asmmacro.h> 4 + #include <linux/export.h> 5 + #include <linux/linkage.h> 6 + 7 + SYM_FUNC_START(__ashlti3) 8 + srli.d t2, a0, 1 9 + nor t3, zero, a2 10 + sll.d t1, a1, a2 11 + srl.d t2, t2, t3 12 + andi t0, a2, 64 13 + sll.d a0, a0, a2 14 + or t1, t2, t1 15 + maskeqz a1, a0, t0 16 + masknez a0, a0, t0 17 + masknez t0, t1, t0 18 + or a1, t0, a1 19 + jr ra 20 + SYM_FUNC_END(__ashlti3) 21 + EXPORT_SYMBOL(__ashlti3) 22 + 23 + SYM_FUNC_START(__ashrti3) 24 + nor t3, zero, a2 25 + slli.d t2, a1, 1 26 + srl.d t1, a0, a2 27 + sll.d t2, t2, t3 28 + andi t0, a2, 64 29 + or t1, t2, t1 30 + sra.d a2, a1, a2 31 + srai.d a1, a1, 63 32 + maskeqz a0, a2, t0 33 + maskeqz a1, a1, t0 34 + masknez a2, a2, t0 35 + masknez t0, t1, t0 36 + or a1, a1, a2 37 + or a0, t0, a0 38 + jr ra 39 + SYM_FUNC_END(__ashrti3) 40 + EXPORT_SYMBOL(__ashrti3) 41 + 42 + SYM_FUNC_START(__lshrti3) 43 + slli.d t2, a1, 1 44 + nor t3, zero, a2 45 + srl.d t1, a0, a2 46 + sll.d t2, t2, t3 47 + andi t0, a2, 64 48 + srl.d a1, a1, a2 49 + or t1, t2, t1 50 + maskeqz a0, a1, t0 51 + masknez a1, a1, t0 52 + masknez t0, t1, t0 53 + or a0, t0, a0 54 + jr ra 55 + SYM_FUNC_END(__lshrti3) 56 + EXPORT_SYMBOL(__lshrti3)

+6 -3

arch/loongarch/mm/tlbex.S

··· 125 125 tlb_huge_update_load: 126 126 #ifdef CONFIG_SMP 127 127 ll.d ra, t1, 0 128 + #else 129 + rotri.d ra, ra, 64 - (_PAGE_HUGE_SHIFT + 1) 128 130 #endif 129 131 andi t0, ra, _PAGE_PRESENT 130 132 beqz t0, nopage_tlb_load ··· 137 135 beqz t0, tlb_huge_update_load 138 136 ori t0, ra, _PAGE_VALID 139 137 #else 140 - rotri.d ra, ra, 64 - (_PAGE_HUGE_SHIFT + 1) 141 138 ori t0, ra, _PAGE_VALID 142 139 st.d t0, t1, 0 143 140 #endif ··· 282 281 tlb_huge_update_store: 283 282 #ifdef CONFIG_SMP 284 283 ll.d ra, t1, 0 284 + #else 285 + rotri.d ra, ra, 64 - (_PAGE_HUGE_SHIFT + 1) 285 286 #endif 286 287 andi t0, ra, _PAGE_PRESENT | _PAGE_WRITE 287 288 xori t0, t0, _PAGE_PRESENT | _PAGE_WRITE ··· 295 292 beqz t0, tlb_huge_update_store 296 293 ori t0, ra, (_PAGE_VALID | _PAGE_DIRTY | _PAGE_MODIFIED) 297 294 #else 298 - rotri.d ra, ra, 64 - (_PAGE_HUGE_SHIFT + 1) 299 295 ori t0, ra, (_PAGE_VALID | _PAGE_DIRTY | _PAGE_MODIFIED) 300 296 st.d t0, t1, 0 301 297 #endif ··· 440 438 tlb_huge_update_modify: 441 439 #ifdef CONFIG_SMP 442 440 ll.d ra, t1, 0 441 + #else 442 + rotri.d ra, ra, 64 - (_PAGE_HUGE_SHIFT + 1) 443 443 #endif 444 444 andi t0, ra, _PAGE_WRITE 445 445 beqz t0, nopage_tlb_modify ··· 452 448 beqz t0, tlb_huge_update_modify 453 449 ori t0, ra, (_PAGE_VALID | _PAGE_DIRTY | _PAGE_MODIFIED) 454 450 #else 455 - rotri.d ra, ra, 64 - (_PAGE_HUGE_SHIFT + 1) 456 451 ori t0, ra, (_PAGE_VALID | _PAGE_DIRTY | _PAGE_MODIFIED) 457 452 st.d t0, t1, 0 458 453 #endif

+3 -1

arch/loongarch/power/suspend.c

··· 24 24 u64 kpgd; 25 25 u32 pwctl0; 26 26 u32 pwctl1; 27 + u64 pcpu_base; 27 28 }; 28 29 static struct saved_registers saved_regs; 29 30 ··· 37 36 saved_regs.pwctl1 = csr_read32(LOONGARCH_CSR_PWCTL1); 38 37 saved_regs.ecfg = csr_read32(LOONGARCH_CSR_ECFG); 39 38 saved_regs.euen = csr_read32(LOONGARCH_CSR_EUEN); 39 + saved_regs.pcpu_base = csr_read64(PERCPU_BASE_KS); 40 40 41 41 loongarch_suspend_addr = loongson_sysconf.suspend_addr; 42 42 } ··· 46 44 { 47 45 sync_counter(); 48 46 local_flush_tlb_all(); 49 - csr_write64(per_cpu_offset(0), PERCPU_BASE_KS); 50 47 csr_write64(eentry, LOONGARCH_CSR_EENTRY); 51 48 csr_write64(eentry, LOONGARCH_CSR_MERRENTRY); 52 49 csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY); ··· 56 55 csr_write32(saved_regs.pwctl1, LOONGARCH_CSR_PWCTL1); 57 56 csr_write32(saved_regs.ecfg, LOONGARCH_CSR_ECFG); 58 57 csr_write32(saved_regs.euen, LOONGARCH_CSR_EUEN); 58 + csr_write64(saved_regs.pcpu_base, PERCPU_BASE_KS); 59 59 } 60 60 61 61 int loongarch_acpi_suspend(void)

+1 -1

rust/Makefile

··· 426 426 $(obj)/core.o: private rustc_target_flags = $(core-cfgs) 427 427 $(obj)/core.o: $(RUST_LIB_SRC)/core/src/lib.rs FORCE 428 428 +$(call if_changed_dep,rustc_library) 429 - ifneq ($(or $(CONFIG_X86_64),$(CONFIG_LOONGARCH)),) 429 + ifdef CONFIG_X86_64 430 430 $(obj)/core.o: scripts/target.json 431 431 endif 432 432

+1 -1

scripts/Makefile

··· 12 12 hostprogs-always-$(CONFIG_RUST_KERNEL_DOCTESTS) += rustdoc_test_builder 13 13 hostprogs-always-$(CONFIG_RUST_KERNEL_DOCTESTS) += rustdoc_test_gen 14 14 15 - ifneq ($(or $(CONFIG_X86_64),$(CONFIG_LOONGARCH)),) 15 + ifdef CONFIG_X86_64 16 16 always-$(CONFIG_RUST) += target.json 17 17 filechk_rust_target = $< < include/config/auto.conf 18 18

+1 -6

scripts/generate_rust_target.rs

··· 164 164 ts.push("llvm-target", "x86_64-linux-gnu"); 165 165 ts.push("target-pointer-width", "64"); 166 166 } else if cfg.has("LOONGARCH") { 167 - ts.push("arch", "loongarch64"); 168 - ts.push("data-layout", "e-m:e-p:64:64-i64:64-i128:128-n64-S128"); 169 - ts.push("features", "-f,-d"); 170 - ts.push("llvm-target", "loongarch64-linux-gnusf"); 171 - ts.push("llvm-abiname", "lp64s"); 172 - ts.push("target-pointer-width", "64"); 167 + panic!("loongarch uses the builtin rustc loongarch64-unknown-none-softfloat target"); 173 168 } else { 174 169 panic!("Unsupported architecture"); 175 170 }