Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clk: tegra: super: Switch to determine_rate

The Tegra super clocks implements a mux with a set_parent hook, but
doesn't provide a determine_rate implementation.

This is a bit odd, since set_parent() is there to, as its name implies,
change the parent of a clock. However, the most likely candidate to
trigger that parent change is a call to clk_set_rate(), with
determine_rate() figuring out which parent is the best suited for a
given rate.

The other trigger would be a call to clk_set_parent(), but it's far less
used, and it doesn't look like there's any obvious user for that clock.

So, the set_parent hook is effectively unused, possibly because of an
oversight. However, it could also be an explicit decision by the
original author to avoid any reparenting but through an explicit call to
clk_set_parent().

The driver does implement round_rate() though, which means that we can
change the rate of the clock, but we will never get to change the
parent.

However, It's hard to tell whether it's been done on purpose or not.

Since we'll start mandating a determine_rate() implementation, let's
convert the round_rate() implementation to a determine_rate(), which
will also make the current behavior explicit. And if it was an
oversight, the clock behaviour can be adjusted later on.

Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v4-65-971d5077e7d2@cerno.tech
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

authored by

Maxime Ripard and committed by
Stephen Boyd
493ffb04 4d78bd80

+11 -4
+11 -4
drivers/clk/tegra/clk-super.c
··· 142 142 .restore_context = clk_super_mux_restore_context, 143 143 }; 144 144 145 - static long clk_super_round_rate(struct clk_hw *hw, unsigned long rate, 146 - unsigned long *parent_rate) 145 + static int clk_super_determine_rate(struct clk_hw *hw, 146 + struct clk_rate_request *req) 147 147 { 148 148 struct tegra_clk_super_mux *super = to_clk_super_mux(hw); 149 149 struct clk_hw *div_hw = &super->frac_div.hw; 150 + unsigned long rate; 150 151 151 152 __clk_hw_set_clk(div_hw, hw); 152 153 153 - return super->div_ops->round_rate(div_hw, rate, parent_rate); 154 + rate = super->div_ops->round_rate(div_hw, req->rate, 155 + &req->best_parent_rate); 156 + if (rate < 0) 157 + return rate; 158 + 159 + req->rate = rate; 160 + return 0; 154 161 } 155 162 156 163 static unsigned long clk_super_recalc_rate(struct clk_hw *hw, ··· 200 193 .get_parent = clk_super_get_parent, 201 194 .set_parent = clk_super_set_parent, 202 195 .set_rate = clk_super_set_rate, 203 - .round_rate = clk_super_round_rate, 196 + .determine_rate = clk_super_determine_rate, 204 197 .recalc_rate = clk_super_recalc_rate, 205 198 .restore_context = clk_super_restore_context, 206 199 };