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Document: devicetree: add OF documents for arch-mmp

Add OF support in Document/devicetree directory.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>

authored by

Haojian Zhuang and committed by
Haojian Zhuang
46e446db 10d77ec2

+87
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Documentation/devicetree/bindings/arm/mrvl.txt
··· 1 + Marvell Platforms Device Tree Bindings 2 + ---------------------------------------------------- 3 + 4 + PXA168 Aspenite Board 5 + Required root node properties: 6 + - compatible = "mrvl,pxa168-aspenite", "mrvl,pxa168";
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Documentation/devicetree/bindings/gpio/mrvl-gpio.txt
··· 1 + * Marvell PXA GPIO controller 2 + 3 + Required properties: 4 + - compatible : Should be "mrvl,pxa-gpio" or "mrvl,mmp-gpio" 5 + - reg : Address and length of the register set for the device 6 + - interrupts : Should be the port interrupt shared by all gpio pins, if 7 + - interrupt-name : Should be the name of irq resource. 8 + one number. 9 + - gpio-controller : Marks the device node as a gpio controller. 10 + - #gpio-cells : Should be one. It is the pin number. 11 + 12 + Example: 13 + 14 + gpio: gpio@d4019000 { 15 + compatible = "mrvl,mmp-gpio", "mrvl,pxa-gpio"; 16 + reg = <0xd4019000 0x1000>; 17 + interrupts = <49>, <17>, <18>; 18 + interrupt-name = "gpio_mux", "gpio0", "gpio1"; 19 + gpio-controller; 20 + #gpio-cells = <1>; 21 + interrupt-controller; 22 + #interrupt-cells = <1>; 23 + };
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Documentation/devicetree/bindings/i2c/mrvl-i2c.txt
··· 1 + * I2C 2 + 3 + Required properties : 4 + 5 + - reg : Offset and length of the register set for the device 6 + - compatible : should be "mrvl,mmp-twsi" where CHIP is the name of a 7 + compatible processor, e.g. pxa168, pxa910, mmp2, mmp3. 8 + For the pxa2xx/pxa3xx, an additional node "mrvl,pxa-i2c" is required 9 + as shown in the example below. 10 + 11 + Recommended properties : 12 + 13 + - interrupts : <a b> where a is the interrupt number and b is a 14 + field that represents an encoding of the sense and level 15 + information for the interrupt. This should be encoded based on 16 + the information in section 2) depending on the type of interrupt 17 + controller you have. 18 + - interrupt-parent : the phandle for the interrupt controller that 19 + services interrupts for this device. 20 + - mrvl,i2c-polling : Disable interrupt of i2c controller. Polling 21 + status register of i2c controller instead. 22 + - mrvl,i2c-fast-mode : Enable fast mode of i2c controller. 23 + 24 + Examples: 25 + twsi1: i2c@d4011000 { 26 + compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c"; 27 + reg = <0xd4011000 0x1000>; 28 + interrupts = <7>; 29 + mrvl,i2c-fast-mode; 30 + }; 31 + 32 + twsi2: i2c@d4025000 { 33 + compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c"; 34 + reg = <0xd4025000 0x1000>; 35 + interrupts = <58>; 36 + }; 37 +
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Documentation/devicetree/bindings/rtc/sa1100-rtc.txt
··· 1 + * Marvell Real Time Clock controller 2 + 3 + Required properties: 4 + - compatible: should be "mrvl,sa1100-rtc" 5 + - reg: physical base address of the controller and length of memory mapped 6 + region. 7 + - interrupts: Should be two. The first interrupt number is the rtc alarm 8 + interrupt and the second interrupt number is the rtc hz interrupt. 9 + - interrupt-names: Assign name of irq resource. 10 + 11 + Example: 12 + rtc: rtc@d4010000 { 13 + compatible = "mrvl,mmp-rtc"; 14 + reg = <0xd4010000 0x1000>; 15 + interrupts = <5>, <6>; 16 + interrupt-name = "rtc 1Hz", "rtc alarm"; 17 + };
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Documentation/devicetree/bindings/serial/mrvl-serial.txt
··· 1 + PXA UART controller 2 + 3 + Required properties: 4 + - compatible : should be "mrvl,mmp-uart" or "mrvl,pxa-uart".