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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
ARM: dts: append DTS file of pxa168
DTS files of both PXA168 and aspenite are appended.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
authored by
Haojian Zhuang
and committed by
Haojian Zhuang
10d77ec2
5d489766
+136
+38
arch/arm/boot/dts/pxa168-aspenite.dts
+38
arch/arm/boot/dts/pxa168-aspenite.dts
···
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/*
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* Copyright (C) 2012 Marvell Technology Group Ltd.
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* Author: Haojian Zhuang <haojian.zhuang@marvell.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* publishhed by the Free Software Foundation.
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*/
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/dts-v1/;
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/include/ "pxa168.dtsi"
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/ {
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model = "Marvell PXA168 Aspenite Development Board";
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compatible = "mrvl,pxa168-aspenite", "mrvl,pxa168";
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chosen {
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bootargs = "console=ttyS0,115200 root=/dev/nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on";
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};
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memory {
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reg = <0x00000000 0x04000000>;
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};
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soc {
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apb@d4000000 {
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uart1: uart@d4017000 {
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status = "okay";
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};
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twsi1: i2c@d4011000 {
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status = "okay";
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};
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rtc: rtc@d4010000 {
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status = "okay";
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};
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};
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};
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};
+98
arch/arm/boot/dts/pxa168.dtsi
+98
arch/arm/boot/dts/pxa168.dtsi
···
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/*
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* Copyright (C) 2012 Marvell Technology Group Ltd.
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* Author: Haojian Zhuang <haojian.zhuang@marvell.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* publishhed by the Free Software Foundation.
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*/
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/include/ "skeleton.dtsi"
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/ {
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aliases {
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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i2c0 = &twsi1;
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i2c1 = &twsi2;
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};
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intc: intc-interrupt-controller@d4282000 {
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compatible = "mrvl,mmp-intc", "mrvl,intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0xd4282000 0x1000>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&intc>;
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ranges;
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apb@d4000000 { /* APB */
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compatible = "mrvl,apb-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0xd4000000 0x00200000>;
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ranges;
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uart1: uart@d4017000 {
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compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";
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reg = <0xd4017000 0x1000>;
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interrupts = <27>;
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status = "disabled";
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};
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uart2: uart@d4018000 {
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compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";
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reg = <0xd4018000 0x1000>;
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interrupts = <28>;
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status = "disabled";
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};
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uart3: uart@d4026000 {
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compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";
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reg = <0xd4026000 0x1000>;
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interrupts = <29>;
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status = "disabled";
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};
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gpio: gpio@d4019000 {
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compatible = "mrvl,mmp-gpio", "mrvl,pxa-gpio";
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reg = <0xd4019000 0x1000>;
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interrupts = <49>;
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interrupt-names = "gpio_mux";
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gpio-controller;
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#gpio-cells = <1>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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twsi1: i2c@d4011000 {
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compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
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reg = <0xd4011000 0x1000>;
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interrupts = <7>;
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mrvl,i2c-fast-mode;
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status = "disabled";
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};
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twsi2: i2c@d4025000 {
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compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
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reg = <0xd4025000 0x1000>;
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interrupts = <58>;
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status = "disabled";
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};
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rtc: rtc@d4010000 {
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compatible = "mrvl,mmp-rtc";
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reg = <0xd4010000 0x1000>;
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interrupts = <5 6>;
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interrupt-names = "rtc 1Hz", "rtc alarm";
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status = "disabled";
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};
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};
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};
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};