tjh.dev / kernel
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ARM: dts: sh73a0: Rename the serial port clock to fck

The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

authored by

Laurent Pinchart and committed by
Simon Horman 46ae0e37 06930a1f

+9 -9
+9 -9
arch/arm/boot/dts/sh73a0.dtsi
··· 359 359 reg = <0xe6c40000 0x100>; 360 360 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 361 361 clocks = <&mstp2_clks SH73A0_CLK_SCIFA0>; 362 - clock-names = "sci_ick"; 362 + clock-names = "fck"; 363 363 power-domains = <&pd_a3sp>; 364 364 status = "disabled"; 365 365 }; ··· 369 369 reg = <0xe6c50000 0x100>; 370 370 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 371 371 clocks = <&mstp2_clks SH73A0_CLK_SCIFA1>; 372 - clock-names = "sci_ick"; 372 + clock-names = "fck"; 373 373 power-domains = <&pd_a3sp>; 374 374 status = "disabled"; 375 375 }; ··· 379 379 reg = <0xe6c60000 0x100>; 380 380 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 381 381 clocks = <&mstp2_clks SH73A0_CLK_SCIFA2>; 382 - clock-names = "sci_ick"; 382 + clock-names = "fck"; 383 383 power-domains = <&pd_a3sp>; 384 384 status = "disabled"; 385 385 }; ··· 389 389 reg = <0xe6c70000 0x100>; 390 390 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 391 391 clocks = <&mstp2_clks SH73A0_CLK_SCIFA3>; 392 - clock-names = "sci_ick"; 392 + clock-names = "fck"; 393 393 power-domains = <&pd_a3sp>; 394 394 status = "disabled"; 395 395 }; ··· 399 399 reg = <0xe6c80000 0x100>; 400 400 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 401 401 clocks = <&mstp2_clks SH73A0_CLK_SCIFA4>; 402 - clock-names = "sci_ick"; 402 + clock-names = "fck"; 403 403 power-domains = <&pd_a3sp>; 404 404 status = "disabled"; 405 405 }; ··· 409 409 reg = <0xe6cb0000 0x100>; 410 410 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; 411 411 clocks = <&mstp2_clks SH73A0_CLK_SCIFA5>; 412 - clock-names = "sci_ick"; 412 + clock-names = "fck"; 413 413 power-domains = <&pd_a3sp>; 414 414 status = "disabled"; 415 415 }; ··· 419 419 reg = <0xe6cc0000 0x100>; 420 420 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 421 421 clocks = <&mstp3_clks SH73A0_CLK_SCIFA6>; 422 - clock-names = "sci_ick"; 422 + clock-names = "fck"; 423 423 power-domains = <&pd_a3sp>; 424 424 status = "disabled"; 425 425 }; ··· 429 429 reg = <0xe6cd0000 0x100>; 430 430 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 431 431 clocks = <&mstp2_clks SH73A0_CLK_SCIFA7>; 432 - clock-names = "sci_ick"; 432 + clock-names = "fck"; 433 433 power-domains = <&pd_a3sp>; 434 434 status = "disabled"; 435 435 }; ··· 439 439 reg = <0xe6c30000 0x100>; 440 440 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; 441 441 clocks = <&mstp2_clks SH73A0_CLK_SCIFB>; 442 - clock-names = "sci_ick"; 442 + clock-names = "fck"; 443 443 power-domains = <&pd_a3sp>; 444 444 status = "disabled"; 445 445 };