Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

PCI: Change all drivers to use pci_device->revision

Instead of all drivers reading pci config space to get the revision
ID, they can now use the pci_device->revision member.

This exposes some issues where drivers where reading a word or a dword
for the revision number, and adding useless error-handling around the
read. Some drivers even just read it for no purpose of all.

In devices where the revision ID is being copied over and used in what
appears to be the equivalent of hotpath, I have left the copy code
and the cached copy as not to influence the driver's performance.

Compile tested with make all{yes,mod}config on x86_64 and i386.

Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Acked-by: Dave Jones <davej@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

authored by

Auke Kok and committed by
Greg Kroah-Hartman
44c10138 b8a3a521

+190 -459
+1 -5
arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c
··· 391 391 */ 392 392 static unsigned int nforce2_detect_chipset(void) 393 393 { 394 - u8 revision; 395 - 396 394 nforce2_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_NVIDIA, 397 395 PCI_DEVICE_ID_NVIDIA_NFORCE2, 398 396 PCI_ANY_ID, PCI_ANY_ID, NULL); ··· 398 400 if (nforce2_chipset_dev == NULL) 399 401 return -ENODEV; 400 402 401 - pci_read_config_byte(nforce2_chipset_dev, PCI_REVISION_ID, &revision); 402 - 403 403 printk(KERN_INFO "cpufreq: Detected nForce2 chipset revision %X\n", 404 - revision); 404 + nforce2_chipset_dev->revision); 405 405 printk(KERN_INFO 406 406 "cpufreq: FSB changing is maybe unstable and can lead to crashes and data loss.\n"); 407 407
+1 -3
arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
··· 115 115 u8 pci_suscfg; 116 116 u8 pci_pmer1; 117 117 u8 pci_pmer2; 118 - u8 pci_rev; 119 118 struct pci_dev *cs55x0; 120 119 }; 121 120 ··· 275 276 pci_write_config_byte(gx_params->cs55x0, PCI_VIDTC, 100);/* typical 50 to 100ms */ 276 277 pci_write_config_byte(gx_params->cs55x0, PCI_PMER1, pmer1); 277 278 278 - if (gx_params->pci_rev < 0x10) { /* CS5530(rev 1.2, 1.3) */ 279 + if (gx_params->cs55x0->revision < 0x10) { /* CS5530(rev 1.2, 1.3) */ 279 280 suscfg = gx_params->pci_suscfg | SUSMOD; 280 281 } else { /* CS5530A,B.. */ 281 282 suscfg = gx_params->pci_suscfg | SUSMOD | PWRSVE; ··· 470 471 pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2)); 471 472 pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration)); 472 473 pci_read_config_byte(params->cs55x0, PCI_MODOFF, &(params->off_duration)); 473 - pci_read_config_byte(params->cs55x0, PCI_REVISION_ID, &params->pci_rev); 474 474 475 475 if ((ret = cpufreq_register_driver(&gx_suspmod_driver))) { 476 476 kfree(params);
+1 -3
arch/i386/kernel/cpu/cpufreq/speedstep-ich.c
··· 205 205 * host brige. Abort on these systems. 206 206 */ 207 207 static struct pci_dev *hostbridge; 208 - u8 rev = 0; 209 208 210 209 hostbridge = pci_get_subsys(PCI_VENDOR_ID_INTEL, 211 210 PCI_DEVICE_ID_INTEL_82815_MC, ··· 215 216 if (!hostbridge) 216 217 return 2; /* 2-M */ 217 218 218 - pci_read_config_byte(hostbridge, PCI_REVISION_ID, &rev); 219 - if (rev < 5) { 219 + if (hostbridge->revision < 5) { 220 220 dprintk("hostbridge does not support speedstep\n"); 221 221 speedstep_chipset_dev = NULL; 222 222 pci_dev_put(hostbridge);
+3 -6
arch/i386/pci/fixup.c
··· 118 118 static void pci_fixup_via_northbridge_bug(struct pci_dev *d) 119 119 { 120 120 u8 v; 121 - u8 revision; 122 121 int where = 0x55; 123 122 int mask = 0x1f; /* clear bits 5, 6, 7 by default */ 124 - 125 - pci_read_config_byte(d, PCI_REVISION_ID, &revision); 126 123 127 124 if (d->device == PCI_DEVICE_ID_VIA_8367_0) { 128 125 /* fix pci bus latency issues resulted by NB bios error ··· 130 133 where = 0x95; /* the memory write queue timer register is 131 134 different for the KT266x's: 0x95 not 0x55 */ 132 135 } else if (d->device == PCI_DEVICE_ID_VIA_8363_0 && 133 - (revision == VIA_8363_KL133_REVISION_ID || 134 - revision == VIA_8363_KM133_REVISION_ID)) { 136 + (d->revision == VIA_8363_KL133_REVISION_ID || 137 + d->revision == VIA_8363_KM133_REVISION_ID)) { 135 138 mask = 0x3f; /* clear only bits 6 and 7; clearing bit 5 136 139 causes screen corruption on the KL133/KM133 */ 137 140 } ··· 139 142 pci_read_config_byte(d, where, &v); 140 143 if (v & ~mask) { 141 144 printk(KERN_WARNING "Disabling VIA memory write queue (PCI ID %04x, rev %02x): [%02x] %02x & %02x -> %02x\n", \ 142 - d->device, revision, where, v, mask, v & mask); 145 + d->device, d->revision, where, v, mask, v & mask); 143 146 v &= mask; 144 147 pci_write_config_byte(d, where, v); 145 148 }
+3 -7
arch/mips/pci/fixup-cobalt.c
··· 58 58 59 59 static void qube_raq_galileo_fixup(struct pci_dev *dev) 60 60 { 61 - unsigned short galileo_id; 62 - 63 61 if (dev->devfn != PCI_DEVFN(0, 0)) 64 62 return; 65 63 ··· 82 84 * Therefore we must set the disconnect/retry cycle values to 83 85 * something sensible when using the new Galileo. 84 86 */ 85 - pci_read_config_word(dev, PCI_REVISION_ID, &galileo_id); 86 - galileo_id &= 0xff; /* mask off class info */ 87 87 88 - printk(KERN_INFO "Galileo: revision %u\n", galileo_id); 88 + printk(KERN_INFO "Galileo: revision %u\n", dev->revision); 89 89 90 90 #if 0 91 - if (galileo_id >= 0x10) { 91 + if (dev->revision >= 0x10) { 92 92 /* New Galileo, assumes PCI stop line to VIA is connected. */ 93 93 GT_WRITE(GT_PCI0_TOR_OFS, 0x4020); 94 - } else if (galileo_id == 0x1 || galileo_id == 0x2) 94 + } else if (dev->revision == 0x1 || dev->revision == 0x2) 95 95 #endif 96 96 { 97 97 signed int timeo;
+2 -5
drivers/acpi/processor_core.c
··· 115 115 116 116 static int acpi_processor_errata_piix4(struct pci_dev *dev) 117 117 { 118 - u8 rev = 0; 119 118 u8 value1 = 0; 120 119 u8 value2 = 0; 121 120 ··· 126 127 * Note that 'dev' references the PIIX4 ACPI Controller. 127 128 */ 128 129 129 - pci_read_config_byte(dev, PCI_REVISION_ID, &rev); 130 - 131 - switch (rev) { 130 + switch (dev->revision) { 132 131 case 0: 133 132 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found PIIX4 A-step\n")); 134 133 break; ··· 144 147 break; 145 148 } 146 149 147 - switch (rev) { 150 + switch (dev->revision) { 148 151 149 152 case 0: /* PIIX4 A-step */ 150 153 case 1: /* PIIX4 B-step */
+2 -4
drivers/ata/ata_piix.c
··· 928 928 { 929 929 struct pci_dev *pdev = NULL; 930 930 u16 cfg; 931 - u8 rev; 932 931 int no_piix_dma = 0; 933 932 934 933 while((pdev = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, pdev)) != NULL) 935 934 { 936 935 /* Look for 450NX PXB. Check for problem configurations 937 936 A PCI quirk checks bit 6 already */ 938 - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); 939 937 pci_read_config_word(pdev, 0x41, &cfg); 940 938 /* Only on the original revision: IDE DMA can hang */ 941 - if (rev == 0x00) 939 + if (pdev->revision == 0x00) 942 940 no_piix_dma = 1; 943 941 /* On all revisions below 5 PXB bus lock must be disabled for IDE */ 944 - else if (cfg & (1<<14) && rev < 5) 942 + else if (cfg & (1<<14) && pdev->revision < 5) 945 943 no_piix_dma = 2; 946 944 } 947 945 if (no_piix_dma)
+15 -19
drivers/ata/pata_ali.c
··· 455 455 456 456 static void ali_init_chipset(struct pci_dev *pdev) 457 457 { 458 - u8 rev, tmp; 458 + u8 tmp; 459 459 struct pci_dev *north, *isa_bridge; 460 - 461 - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); 462 460 463 461 /* 464 462 * The chipset revision selects the driver operations and 465 463 * mode data. 466 464 */ 467 465 468 - if (rev >= 0x20 && rev < 0xC2) { 466 + if (pdev->revision >= 0x20 && pdev->revision < 0xC2) { 469 467 /* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */ 470 468 pci_read_config_byte(pdev, 0x4B, &tmp); 471 469 /* Clear CD-ROM DMA write bit */ 472 470 tmp &= 0x7F; 473 471 pci_write_config_byte(pdev, 0x4B, tmp); 474 - } else if (rev >= 0xC2) { 472 + } else if (pdev->revision >= 0xC2) { 475 473 /* Enable cable detection logic */ 476 474 pci_read_config_byte(pdev, 0x4B, &tmp); 477 475 pci_write_config_byte(pdev, 0x4B, tmp | 0x08); ··· 481 483 /* Configure the ALi bridge logic. For non ALi rely on BIOS. 482 484 Set the south bridge enable bit */ 483 485 pci_read_config_byte(isa_bridge, 0x79, &tmp); 484 - if (rev == 0xC2) 486 + if (pdev->revision == 0xC2) 485 487 pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04); 486 - else if (rev > 0xC2 && rev < 0xC5) 488 + else if (pdev->revision > 0xC2 && pdev->revision < 0xC5) 487 489 pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02); 488 490 } 489 - if (rev >= 0x20) { 491 + if (pdev->revision >= 0x20) { 490 492 /* 491 493 * CD_ROM DMA on (0x53 bit 0). Enable this even if we want 492 494 * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control 493 495 * via 0x54/55. 494 496 */ 495 497 pci_read_config_byte(pdev, 0x53, &tmp); 496 - if (rev <= 0x20) 498 + if (pdev->revision <= 0x20) 497 499 tmp &= ~0x02; 498 - if (rev >= 0xc7) 500 + if (pdev->revision >= 0xc7) 499 501 tmp |= 0x03; 500 502 else 501 503 tmp |= 0x01; /* CD_ROM enable for DMA */ ··· 577 579 }; 578 580 579 581 const struct ata_port_info *ppi[] = { NULL, NULL }; 580 - u8 rev, tmp; 582 + u8 tmp; 581 583 struct pci_dev *isa_bridge; 582 - 583 - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); 584 584 585 585 /* 586 586 * The chipset revision selects the driver operations and 587 587 * mode data. 588 588 */ 589 589 590 - if (rev < 0x20) { 590 + if (pdev->revision < 0x20) { 591 591 ppi[0] = &info_early; 592 - } else if (rev < 0xC2) { 592 + } else if (pdev->revision < 0xC2) { 593 593 ppi[0] = &info_20; 594 - } else if (rev == 0xC2) { 594 + } else if (pdev->revision == 0xC2) { 595 595 ppi[0] = &info_c2; 596 - } else if (rev == 0xC3) { 596 + } else if (pdev->revision == 0xC3) { 597 597 ppi[0] = &info_c3; 598 - } else if (rev == 0xC4) { 598 + } else if (pdev->revision == 0xC4) { 599 599 ppi[0] = &info_c4; 600 600 } else 601 601 ppi[0] = &info_c5; ··· 601 605 ali_init_chipset(pdev); 602 606 603 607 isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); 604 - if (isa_bridge && rev >= 0x20 && rev < 0xC2) { 608 + if (isa_bridge && pdev->revision >= 0x20 && pdev->revision < 0xC2) { 605 609 /* Are we paired with a UDMA capable chip */ 606 610 pci_read_config_byte(isa_bridge, 0x5E, &tmp); 607 611 if ((tmp & 0x1E) == 0x12)
+1 -3
drivers/ata/pata_amd.c
··· 623 623 const struct ata_port_info *ppi[] = { NULL, NULL }; 624 624 static int printed_version; 625 625 int type = id->driver_data; 626 - u8 rev; 627 626 u8 fifo; 628 627 629 628 if (!printed_version++) 630 629 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 631 630 632 - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); 633 631 pci_read_config_byte(pdev, 0x41, &fifo); 634 632 635 633 /* Check for AMD7409 without swdma errata and if found adjust type */ 636 - if (type == 1 && rev > 0x7) 634 + if (type == 1 && pdev->revision > 0x7) 637 635 type = 2; 638 636 639 637 /* Check for AMD7411 */
+1 -2
drivers/ata/pata_it821x.c
··· 587 587 itdev->want[1][1] = ATA_ANY; 588 588 itdev->last_device = -1; 589 589 590 - pci_read_config_byte(pdev, PCI_REVISION_ID, &conf); 591 - if (conf == 0x10) { 590 + if (pdev->revision == 0x11) { 592 591 itdev->timing10 = 1; 593 592 /* Need to disable ATAPI DMA for this case */ 594 593 if (!itdev->smart)
+1 -4
drivers/ata/pata_serverworks.c
··· 410 410 411 411 static int serverworks_fixup_csb(struct pci_dev *pdev) 412 412 { 413 - u8 rev; 414 413 u8 btr; 415 - 416 - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); 417 414 418 415 /* Third Channel Test */ 419 416 if (!(PCI_FUNC(pdev->devfn) & 1)) { ··· 453 456 if (!(PCI_FUNC(pdev->devfn) & 1)) 454 457 btr |= 0x2; 455 458 else 456 - btr |= (rev >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2; 459 + btr |= (pdev->revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2; 457 460 pci_write_config_byte(pdev, 0x5A, btr); 458 461 459 462 return btr;
+2 -6
drivers/ata/pata_sis.c
··· 928 928 if (host != NULL) { 929 929 chipset = sets; /* Match found */ 930 930 if (sets->device == 0x630) { /* SIS630 */ 931 - u8 host_rev; 932 - pci_read_config_byte(host, PCI_REVISION_ID, &host_rev); 933 - if (host_rev >= 0x30) /* 630 ET */ 931 + if (host->revision >= 0x30) /* 630 ET */ 934 932 chipset = &sis100_early; 935 933 } 936 934 break; ··· 972 974 u16 trueid; 973 975 u8 prefctl; 974 976 u8 idecfg; 975 - u8 sbrev; 976 977 977 978 /* Try the second unmasking technique */ 978 979 pci_read_config_byte(pdev, 0x4a, &idecfg); ··· 984 987 lpc_bridge = pci_get_slot(pdev->bus, 0x10); /* Bus 0 Dev 2 Fn 0 */ 985 988 if (lpc_bridge == NULL) 986 989 break; 987 - pci_read_config_byte(lpc_bridge, PCI_REVISION_ID, &sbrev); 988 990 pci_read_config_byte(pdev, 0x49, &prefctl); 989 991 pci_dev_put(lpc_bridge); 990 992 991 - if (sbrev == 0x10 && (prefctl & 0x80)) { 993 + if (lpc_bridge->revision == 0x10 && (prefctl & 0x80)) { 992 994 chipset = &sis133_early; 993 995 break; 994 996 }
+1 -4
drivers/ata/pata_sl82c105.c
··· 270 270 static int sl82c105_bridge_revision(struct pci_dev *pdev) 271 271 { 272 272 struct pci_dev *bridge; 273 - u8 rev; 274 273 275 274 /* 276 275 * The bridge should be part of the same device, but function 0. ··· 291 292 /* 292 293 * We need to find function 0's revision, not function 1 293 294 */ 294 - pci_read_config_byte(bridge, PCI_REVISION_ID, &rev); 295 - 296 295 pci_dev_put(bridge); 297 - return rev; 296 + return bridge->revision; 298 297 } 299 298 300 299
+2 -4
drivers/ata/pata_via.c
··· 506 506 struct pci_dev *isa = NULL; 507 507 const struct via_isa_bridge *config; 508 508 static int printed_version; 509 - u8 t; 510 509 u8 enable; 511 510 u32 timing; 512 511 ··· 519 520 !!(config->flags & VIA_BAD_ID), 520 521 config->id, NULL))) { 521 522 522 - pci_read_config_byte(isa, PCI_REVISION_ID, &t); 523 - if (t >= config->rev_min && 524 - t <= config->rev_max) 523 + if (isa->revision >= config->rev_min && 524 + isa->revision <= config->rev_max) 525 525 break; 526 526 pci_dev_put(isa); 527 527 }
+6 -14
drivers/ata/sata_mv.c
··· 1573 1573 1574 1574 static void mv5_reset_bus(struct pci_dev *pdev, void __iomem *mmio) 1575 1575 { 1576 - u8 rev_id; 1577 1576 int early_5080; 1578 1577 1579 - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id); 1580 - 1581 - early_5080 = (pdev->device == 0x5080) && (rev_id == 0); 1578 + early_5080 = (pdev->device == 0x5080) && (pdev->revision == 0); 1582 1579 1583 1580 if (!early_5080) { 1584 1581 u32 tmp = readl(mmio + MV_PCI_EXP_ROM_BAR_CTL); ··· 2136 2139 { 2137 2140 struct pci_dev *pdev = to_pci_dev(host->dev); 2138 2141 struct mv_host_priv *hpriv = host->private_data; 2139 - u8 rev_id; 2140 2142 u32 hp_flags = hpriv->hp_flags; 2141 - 2142 - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id); 2143 2143 2144 2144 switch(board_idx) { 2145 2145 case chip_5080: 2146 2146 hpriv->ops = &mv5xxx_ops; 2147 2147 hp_flags |= MV_HP_50XX; 2148 2148 2149 - switch (rev_id) { 2149 + switch (pdev->revision) { 2150 2150 case 0x1: 2151 2151 hp_flags |= MV_HP_ERRATA_50XXB0; 2152 2152 break; ··· 2163 2169 hpriv->ops = &mv5xxx_ops; 2164 2170 hp_flags |= MV_HP_50XX; 2165 2171 2166 - switch (rev_id) { 2172 + switch (pdev->revision) { 2167 2173 case 0x0: 2168 2174 hp_flags |= MV_HP_ERRATA_50XXB0; 2169 2175 break; ··· 2182 2188 case chip_608x: 2183 2189 hpriv->ops = &mv6xxx_ops; 2184 2190 2185 - switch (rev_id) { 2191 + switch (pdev->revision) { 2186 2192 case 0x7: 2187 2193 hp_flags |= MV_HP_ERRATA_60X1B2; 2188 2194 break; ··· 2203 2209 2204 2210 hp_flags |= MV_HP_GEN_IIE; 2205 2211 2206 - switch (rev_id) { 2212 + switch (pdev->revision) { 2207 2213 case 0x0: 2208 2214 hp_flags |= MV_HP_ERRATA_XX42A0; 2209 2215 break; ··· 2331 2337 { 2332 2338 struct pci_dev *pdev = to_pci_dev(host->dev); 2333 2339 struct mv_host_priv *hpriv = host->private_data; 2334 - u8 rev_id, scc; 2340 + u8 scc; 2335 2341 const char *scc_s, *gen; 2336 2342 2337 2343 /* Use this to determine the HW stepping of the chip so we know 2338 2344 * what errata to workaround 2339 2345 */ 2340 - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id); 2341 - 2342 2346 pci_read_config_byte(pdev, PCI_CLASS_DEVICE, &scc); 2343 2347 if (scc == 0) 2344 2348 scc_s = "SCSI";
+1 -8
drivers/atm/eni.c
··· 1704 1704 struct pci_dev *pci_dev; 1705 1705 unsigned long real_base; 1706 1706 void __iomem *base; 1707 - unsigned char revision; 1708 1707 int error,i,last; 1709 1708 1710 1709 DPRINTK(">eni_init\n"); ··· 1714 1715 pci_dev = eni_dev->pci_dev; 1715 1716 real_base = pci_resource_start(pci_dev, 0); 1716 1717 eni_dev->irq = pci_dev->irq; 1717 - error = pci_read_config_byte(pci_dev,PCI_REVISION_ID,&revision); 1718 - if (error) { 1719 - printk(KERN_ERR DEV_LABEL "(itf %d): init error 0x%02x\n", 1720 - dev->number,error); 1721 - return -EINVAL; 1722 - } 1723 1718 if ((error = pci_write_config_word(pci_dev,PCI_COMMAND, 1724 1719 PCI_COMMAND_MEMORY | 1725 1720 (eni_dev->asic ? PCI_COMMAND_PARITY | PCI_COMMAND_SERR : 0)))) { ··· 1722 1729 return -EIO; 1723 1730 } 1724 1731 printk(KERN_NOTICE DEV_LABEL "(itf %d): rev.%d,base=0x%lx,irq=%d,", 1725 - dev->number,revision,real_base,eni_dev->irq); 1732 + dev->number,pci_dev->revision,real_base,eni_dev->irq); 1726 1733 if (!(base = ioremap_nocache(real_base,MAP_MAX_SIZE))) { 1727 1734 printk("\n"); 1728 1735 printk(KERN_ERR DEV_LABEL "(itf %d): can't set up page "
+3 -10
drivers/atm/idt77252.c
··· 3679 3679 unsigned long membase, srambase; 3680 3680 struct idt77252_dev *card; 3681 3681 struct atm_dev *dev; 3682 - ushort revision = 0; 3683 3682 int i, err; 3684 3683 3685 3684 ··· 3687 3688 return err; 3688 3689 } 3689 3690 3690 - if (pci_read_config_word(pcidev, PCI_REVISION_ID, &revision)) { 3691 - printk("idt77252-%d: can't read PCI_REVISION_ID\n", index); 3692 - err = -ENODEV; 3693 - goto err_out_disable_pdev; 3694 - } 3695 - 3696 3691 card = kzalloc(sizeof(struct idt77252_dev), GFP_KERNEL); 3697 3692 if (!card) { 3698 3693 printk("idt77252-%d: can't allocate private data\n", index); 3699 3694 err = -ENOMEM; 3700 3695 goto err_out_disable_pdev; 3701 3696 } 3702 - card->revision = revision; 3697 + card->revision = pcidev->revision; 3703 3698 card->index = index; 3704 3699 card->pcidev = pcidev; 3705 3700 sprintf(card->name, "idt77252-%d", card->index); ··· 3755 3762 } 3756 3763 3757 3764 printk("%s: ABR SAR (Rev %c): MEM %08lx SRAM %08lx [%u KB]\n", 3758 - card->name, ((revision > 1) && (revision < 25)) ? 3759 - 'A' + revision - 1 : '?', membase, srambase, 3765 + card->name, ((card->revision > 1) && (card->revision < 25)) ? 3766 + 'A' + card->revision - 1 : '?', membase, srambase, 3760 3767 card->sramsize / 1024); 3761 3768 3762 3769 if (init_card(dev)) {
+4 -7
drivers/atm/iphase.c
··· 2290 2290 unsigned long real_base; 2291 2291 void __iomem *base; 2292 2292 unsigned short command; 2293 - unsigned char revision; 2294 2293 int error, i; 2295 2294 2296 2295 /* The device has been identified and registered. Now we read ··· 2304 2305 real_base = pci_resource_start (iadev->pci, 0); 2305 2306 iadev->irq = iadev->pci->irq; 2306 2307 2307 - if ((error = pci_read_config_word(iadev->pci, PCI_COMMAND,&command)) 2308 - || (error = pci_read_config_byte(iadev->pci, 2309 - PCI_REVISION_ID,&revision))) 2310 - { 2308 + error = pci_read_config_word(iadev->pci, PCI_COMMAND, &command); 2309 + if (error) { 2311 2310 printk(KERN_ERR DEV_LABEL "(itf %d): init error 0x%x\n", 2312 2311 dev->number,error); 2313 2312 return -EINVAL; 2314 2313 } 2315 2314 IF_INIT(printk(DEV_LABEL "(itf %d): rev.%d,realbase=0x%lx,irq=%d\n", 2316 - dev->number, revision, real_base, iadev->irq);) 2315 + dev->number, iadev->pci->revision, real_base, iadev->irq);) 2317 2316 2318 2317 /* find mapping size of board */ 2319 2318 ··· 2350 2353 return error; 2351 2354 } 2352 2355 IF_INIT(printk(DEV_LABEL " (itf %d): rev.%d,base=%p,irq=%d\n", 2353 - dev->number, revision, base, iadev->irq);) 2356 + dev->number, iadev->pci->revision, base, iadev->irq);) 2354 2357 2355 2358 /* filling the iphase dev structure */ 2356 2359 iadev->mem = iadev->pci_map_size /2;
+2 -11
drivers/atm/lanai.c
··· 293 293 struct atm_vcc *cbrvcc; 294 294 int number; 295 295 int board_rev; 296 - u8 pci_revision; 297 296 /* TODO - look at race conditions with maintence of conf1/conf2 */ 298 297 /* TODO - transmit locking: should we use _irq not _irqsave? */ 299 298 /* TODO - organize above in some rational fashion (see <asm/cache.h>) */ ··· 1968 1969 "(itf %d): No suitable DMA available.\n", lanai->number); 1969 1970 return -EBUSY; 1970 1971 } 1971 - /* Get the pci revision byte */ 1972 - result = pci_read_config_byte(pci, PCI_REVISION_ID, 1973 - &lanai->pci_revision); 1974 - if (result != PCIBIOS_SUCCESSFUL) { 1975 - printk(KERN_ERR DEV_LABEL "(itf %d): can't read " 1976 - "PCI_REVISION_ID: %d\n", lanai->number, result); 1977 - return -EINVAL; 1978 - } 1979 1972 result = pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &w); 1980 1973 if (result != PCIBIOS_SUCCESSFUL) { 1981 1974 printk(KERN_ERR DEV_LABEL "(itf %d): can't read " ··· 2245 2254 lanai_timed_poll_start(lanai); 2246 2255 printk(KERN_NOTICE DEV_LABEL "(itf %d): rev.%d, base=0x%lx, irq=%u " 2247 2256 "(%02X-%02X-%02X-%02X-%02X-%02X)\n", lanai->number, 2248 - (int) lanai->pci_revision, (unsigned long) lanai->base, 2257 + (int) lanai->pci->revision, (unsigned long) lanai->base, 2249 2258 lanai->pci->irq, 2250 2259 atmdev->esi[0], atmdev->esi[1], atmdev->esi[2], 2251 2260 atmdev->esi[3], atmdev->esi[4], atmdev->esi[5]); ··· 2482 2491 (unsigned int) lanai->magicno, lanai->num_vci); 2483 2492 if (left-- == 0) 2484 2493 return sprintf(page, "revision: board=%d, pci_if=%d\n", 2485 - lanai->board_rev, (int) lanai->pci_revision); 2494 + lanai->board_rev, (int) lanai->pci->revision); 2486 2495 if (left-- == 0) 2487 2496 return sprintf(page, "EEPROM ESI: " 2488 2497 "%02X:%02X:%02X:%02X:%02X:%02X\n",
+2 -4
drivers/atm/zatm.c
··· 1182 1182 struct zatm_dev *zatm_dev; 1183 1183 struct pci_dev *pci_dev; 1184 1184 unsigned short command; 1185 - unsigned char revision; 1186 1185 int error,i,last; 1187 1186 unsigned long t0,t1,t2; 1188 1187 ··· 1191 1192 pci_dev = zatm_dev->pci_dev; 1192 1193 zatm_dev->base = pci_resource_start(pci_dev, 0); 1193 1194 zatm_dev->irq = pci_dev->irq; 1194 - if ((error = pci_read_config_word(pci_dev,PCI_COMMAND,&command)) || 1195 - (error = pci_read_config_byte(pci_dev,PCI_REVISION_ID,&revision))) { 1195 + if ((error = pci_read_config_word(pci_dev,PCI_COMMAND,&command))) { 1196 1196 printk(KERN_ERR DEV_LABEL "(itf %d): init error 0x%02x\n", 1197 1197 dev->number,error); 1198 1198 return -EINVAL; ··· 1204 1206 } 1205 1207 eprom_get_esi(dev); 1206 1208 printk(KERN_NOTICE DEV_LABEL "(itf %d): rev.%d,base=0x%x,irq=%d,", 1207 - dev->number,revision,zatm_dev->base,zatm_dev->irq); 1209 + dev->number,pci_dev->revision,zatm_dev->base,zatm_dev->irq); 1208 1210 /* reset uPD98401 */ 1209 1211 zout(0,SWR); 1210 1212 while (!(zin(GSR) & uPD98401_INT_IND));
+1 -3
drivers/char/agp/amd-k7-agp.c
··· 462 462 * erratum 46: Setup violation on AGP SBA pins - Disable side band addressing. 463 463 * With this lot disabled, we should prevent lockups. */ 464 464 if (agp_bridge->dev->device == PCI_DEVICE_ID_AMD_FE_GATE_700E) { 465 - u8 revision=0; 466 - pci_read_config_byte(pdev, PCI_REVISION_ID, &revision); 467 - if (revision == 0x10 || revision == 0x11) { 465 + if (pdev->revision == 0x10 || pdev->revision == 0x11) { 468 466 agp_bridge->flags = AGP_ERRATA_FASTWRITES; 469 467 agp_bridge->flags |= AGP_ERRATA_SBA; 470 468 agp_bridge->flags |= AGP_ERRATA_1X;
+2 -4
drivers/char/agp/amd64-agp.c
··· 367 367 static void __devinit amd8151_init(struct pci_dev *pdev, struct agp_bridge_data *bridge) 368 368 { 369 369 char *revstring; 370 - u8 rev_id; 371 370 372 - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id); 373 - switch (rev_id) { 371 + switch (pdev->revision) { 374 372 case 0x01: revstring="A0"; break; 375 373 case 0x02: revstring="A1"; break; 376 374 case 0x11: revstring="B0"; break; ··· 384 386 * Work around errata. 385 387 * Chips before B2 stepping incorrectly reporting v3.5 386 388 */ 387 - if (rev_id < 0x13) { 389 + if (pdev->revision < 0x13) { 388 390 printk (KERN_INFO PFX "Correcting AGP revision (reports 3.5, is really 3.0)\n"); 389 391 bridge->major_version = 3; 390 392 bridge->minor_version = 0;
+1 -4
drivers/clocksource/acpi_pm.c
··· 105 105 */ 106 106 static void __devinit acpi_pm_check_blacklist(struct pci_dev *dev) 107 107 { 108 - u8 rev; 109 - 110 108 if (acpi_pm_good) 111 109 return; 112 110 113 - pci_read_config_byte(dev, PCI_REVISION_ID, &rev); 114 111 /* the bug has been fixed in PIIX4M */ 115 - if (rev < 3) { 112 + if (dev->revision < 3) { 116 113 printk(KERN_WARNING "* Found PM-Timer Bug on the chipset." 117 114 " Due to workarounds for a bug,\n" 118 115 "* this clock source is slow. Consider trying"
+1 -2
drivers/i2c/busses/i2c-viapro.c
··· 397 397 case PCI_DEVICE_ID_VIA_82C686_4: 398 398 /* The VT82C686B (rev 0x40) does support I2C block 399 399 transactions, but the VT82C686A (rev 0x30) doesn't */ 400 - if (!pci_read_config_byte(pdev, PCI_REVISION_ID, &temp) 401 - && temp >= 0x40) 400 + if (pdev->revision >= 0x40) 402 401 vt596_features |= FEATURE_I2CBLOCK; 403 402 break; 404 403 }
+1 -1
drivers/ide/pci/alim15x3.c
··· 508 508 u8 tmpbyte; 509 509 struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0)); 510 510 511 - pci_read_config_byte(dev, PCI_REVISION_ID, &m5229_revision); 511 + m5229_revision = dev->revision; 512 512 513 513 isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); 514 514
+3 -5
drivers/ide/pci/amd74xx.c
··· 123 123 amd_print("Driver Version: 2.13"); 124 124 amd_print("South Bridge: %s", pci_name(bmide_dev)); 125 125 126 - pci_read_config_byte(dev, PCI_REVISION_ID, &t); 127 - amd_print("Revision: IDE %#x", t); 126 + amd_print("Revision: IDE %#x", dev->revision); 128 127 amd_print("Highest DMA rate: UDMA%s", amd_dma[fls(amd_config->udma_mask) - 1]); 129 128 130 129 amd_print("BM-DMA base: %#lx", amd_base); ··· 311 312 */ 312 313 313 314 if (amd_config->flags & AMD_CHECK_SWDMA) { 314 - pci_read_config_byte(dev, PCI_REVISION_ID, &t); 315 - if (t <= 7) 315 + if (dev->revision <= 7) 316 316 amd_config->flags |= AMD_BAD_SWDMA; 317 317 } 318 318 ··· 381 383 382 384 pci_read_config_byte(dev, PCI_REVISION_ID, &t); 383 385 printk(KERN_INFO "%s: %s (rev %02x) UDMA%s controller\n", 384 - amd_chipset->name, pci_name(dev), t, 386 + amd_chipset->name, pci_name(dev), dev->revision, 385 387 amd_dma[fls(amd_config->udma_mask) - 1]); 386 388 387 389 /*
+2 -7
drivers/ide/pci/cmd64x.c
··· 88 88 u8 reg72 = 0, reg73 = 0; /* primary */ 89 89 u8 reg7a = 0, reg7b = 0; /* secondary */ 90 90 u8 reg50 = 1, reg51 = 1, reg57 = 0, reg71 = 0; /* extra */ 91 - u8 rev = 0; 92 91 93 92 p += sprintf(p, "\nController: %d\n", index); 94 93 p += sprintf(p, "PCI-%x Chipset.\n", dev->device); ··· 102 103 (void) pci_read_config_byte(dev, UDIDETCR1, &reg7b); 103 104 104 105 /* PCI0643/6 originally didn't have the primary channel enable bit */ 105 - (void) pci_read_config_byte(dev, PCI_REVISION_ID, &rev); 106 106 if ((dev->device == PCI_DEVICE_ID_CMD_643) || 107 - (dev->device == PCI_DEVICE_ID_CMD_646 && rev < 3)) 107 + (dev->device == PCI_DEVICE_ID_CMD_646 && dev->revision < 3)) 108 108 reg51 |= CNTRL_ENA_1ST; 109 109 110 110 p += sprintf(p, "---------------- Primary Channel " ··· 602 604 603 605 static int __devinit init_setup_cmd646(struct pci_dev *dev, ide_pci_device_t *d) 604 606 { 605 - u8 rev = 0; 606 - 607 607 /* 608 608 * The original PCI0646 didn't have the primary channel enable bit, 609 609 * it appeared starting with PCI0646U (i.e. revision ID 3). 610 610 */ 611 - pci_read_config_byte(dev, PCI_REVISION_ID, &rev); 612 - if (rev < 3) 611 + if (dev->revision < 3) 613 612 d->enablebits[0].reg = 0; 614 613 615 614 return ide_setup_pci_device(dev, d);
+5 -15
drivers/ide/pci/hpt366.c
··· 1413 1413 static int __devinit init_setup_hpt371(struct pci_dev *dev, ide_pci_device_t *d) 1414 1414 { 1415 1415 struct hpt_info *info; 1416 - u8 rev = 0, mcr1 = 0; 1416 + u8 mcr1 = 0; 1417 1417 1418 - pci_read_config_byte(dev, PCI_REVISION_ID, &rev); 1419 - 1420 - if (rev > 1) { 1418 + if (dev->revision > 1) { 1421 1419 d->name = "HPT371N"; 1422 1420 1423 1421 info = &hpt371n; ··· 1440 1442 static int __devinit init_setup_hpt372a(struct pci_dev *dev, ide_pci_device_t *d) 1441 1443 { 1442 1444 struct hpt_info *info; 1443 - u8 rev = 0; 1444 1445 1445 - pci_read_config_byte(dev, PCI_REVISION_ID, &rev); 1446 - 1447 - if (rev > 1) { 1446 + if (dev->revision > 1) { 1448 1447 d->name = "HPT372N"; 1449 1448 1450 1449 info = &hpt372n; ··· 1455 1460 static int __devinit init_setup_hpt302(struct pci_dev *dev, ide_pci_device_t *d) 1456 1461 { 1457 1462 struct hpt_info *info; 1458 - u8 rev = 0; 1459 1463 1460 - pci_read_config_byte(dev, PCI_REVISION_ID, &rev); 1461 - 1462 - if (rev > 1) { 1464 + if (dev->revision > 1) { 1463 1465 d->name = "HPT302N"; 1464 1466 1465 1467 info = &hpt302n; ··· 1470 1478 static int __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d) 1471 1479 { 1472 1480 struct pci_dev *dev2; 1473 - u8 rev = 0; 1481 + u8 rev = dev->revision; 1474 1482 static char *chipset_names[] = { "HPT366", "HPT366", "HPT368", 1475 1483 "HPT370", "HPT370A", "HPT372", 1476 1484 "HPT372N" }; ··· 1480 1488 1481 1489 if (PCI_FUNC(dev->devfn) & 1) 1482 1490 return -ENODEV; 1483 - 1484 - pci_read_config_byte(dev, PCI_REVISION_ID, &rev); 1485 1491 1486 1492 switch (rev) { 1487 1493 case 0:
+2 -4
drivers/ide/pci/piix.c
··· 572 572 { 573 573 struct pci_dev *pdev = NULL; 574 574 u16 cfg; 575 - u8 rev; 576 575 while((pdev=pci_get_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, pdev))!=NULL) 577 576 { 578 577 /* Look for 450NX PXB. Check for problem configurations 579 578 A PCI quirk checks bit 6 already */ 580 - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); 581 579 pci_read_config_word(pdev, 0x41, &cfg); 582 580 /* Only on the original revision: IDE DMA can hang */ 583 - if(rev == 0x00) 581 + if (pdev->revision == 0x00) 584 582 no_piix_dma = 1; 585 583 /* On all revisions below 5 PXB bus lock must be disabled for IDE */ 586 - else if(cfg & (1<<14) && rev < 5) 584 + else if (cfg & (1<<14) && pdev->revision < 5) 587 585 no_piix_dma = 2; 588 586 } 589 587 if(no_piix_dma)
+3 -10
drivers/ide/pci/serverworks.c
··· 55 55 NULL 56 56 }; 57 57 58 - static u8 svwks_revision = 0; 59 58 static struct pci_dev *isa_dev; 60 59 61 60 static int check_in_drive_lists (ide_drive_t *drive, const char **list) ··· 70 71 struct pci_dev *dev = HWIF(drive)->pci_dev; 71 72 u8 mask = 0; 72 73 73 - if (!svwks_revision) 74 - pci_read_config_byte(dev, PCI_REVISION_ID, &svwks_revision); 75 - 76 74 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE) 77 75 return 0x1f; 78 76 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) { ··· 84 88 return 0; 85 89 /* Check the OSB4 DMA33 enable bit */ 86 90 return ((reg & 0x00004000) == 0x00004000) ? 0x07 : 0; 87 - } else if (svwks_revision < SVWKS_CSB5_REVISION_NEW) { 91 + } else if (dev->revision < SVWKS_CSB5_REVISION_NEW) { 88 92 return 0x07; 89 - } else if (svwks_revision >= SVWKS_CSB5_REVISION_NEW) { 93 + } else if (dev->revision >= SVWKS_CSB5_REVISION_NEW) { 90 94 u8 btr = 0, mode; 91 95 pci_read_config_byte(dev, 0x5A, &btr); 92 96 mode = btr & 0x3; ··· 230 234 unsigned int reg; 231 235 u8 btr; 232 236 233 - /* save revision id to determine DMA capability */ 234 - pci_read_config_byte(dev, PCI_REVISION_ID, &svwks_revision); 235 - 236 237 /* force Master Latency Timer value to 64 PCICLKs */ 237 238 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x40); 238 239 ··· 308 315 if (!(PCI_FUNC(dev->devfn) & 1)) 309 316 btr |= 0x2; 310 317 else 311 - btr |= (svwks_revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2; 318 + btr |= (dev->revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2; 312 319 pci_write_config_byte(dev, 0x5A, btr); 313 320 } 314 321 /* Setup HT1000 SouthBridge Controller - Single Channel Only */
+2 -6
drivers/ide/pci/sis5513.c
··· 659 659 660 660 /* Special case for SiS630 : 630S/ET is ATA_100a */ 661 661 if (SiSHostChipInfo[i].host_id == PCI_DEVICE_ID_SI_630) { 662 - u8 hostrev; 663 - pci_read_config_byte(host, PCI_REVISION_ID, &hostrev); 664 - if (hostrev >= 0x30) 662 + if (host->revision >= 0x30) 665 663 chipset_family = ATA_100a; 666 664 } 667 665 pci_dev_put(host); ··· 700 702 u16 trueid; 701 703 u8 prefctl; 702 704 u8 idecfg; 703 - u8 sbrev; 704 705 705 706 pci_read_config_byte(dev, 0x4a, &idecfg); 706 707 pci_write_config_byte(dev, 0x4a, idecfg | 0x10); ··· 709 712 if (trueid == 0x5517) { /* SiS 961/961B */ 710 713 711 714 lpc_bridge = pci_get_slot(dev->bus, 0x10); /* Bus 0, Dev 2, Fn 0 */ 712 - pci_read_config_byte(lpc_bridge, PCI_REVISION_ID, &sbrev); 713 715 pci_read_config_byte(dev, 0x49, &prefctl); 714 716 pci_dev_put(lpc_bridge); 715 717 716 - if (sbrev == 0x10 && (prefctl & 0x80)) { 718 + if (lpc_bridge->revision == 0x10 && (prefctl & 0x80)) { 717 719 printk(KERN_INFO "SIS5513: SiS 961B MuTIOL IDE UDMA133 controller\n"); 718 720 chipset_family = ATA_133a; 719 721 } else {
+1 -3
drivers/ide/pci/sl82c105.c
··· 338 338 static unsigned int sl82c105_bridge_revision(struct pci_dev *dev) 339 339 { 340 340 struct pci_dev *bridge; 341 - u8 rev; 342 341 343 342 /* 344 343 * The bridge should be part of the same device, but function 0. ··· 359 360 /* 360 361 * We need to find function 0's revision, not function 1 361 362 */ 362 - pci_read_config_byte(bridge, PCI_REVISION_ID, &rev); 363 363 pci_dev_put(bridge); 364 364 365 - return rev; 365 + return bridge->revision; 366 366 } 367 367 368 368 /*
+3 -6
drivers/ide/pci/via82cxxx.c
··· 237 237 static struct via_isa_bridge *via_config_find(struct pci_dev **isa) 238 238 { 239 239 struct via_isa_bridge *via_config; 240 - u8 t; 241 240 242 241 for (via_config = via_isa_bridges; via_config->id; via_config++) 243 242 if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA + 244 243 !!(via_config->flags & VIA_BAD_ID), 245 244 via_config->id, NULL))) { 246 245 247 - pci_read_config_byte(*isa, PCI_REVISION_ID, &t); 248 - if (t >= via_config->rev_min && 249 - t <= via_config->rev_max) 246 + if ((*isa)->revision >= via_config->rev_min && 247 + (*isa)->revision <= via_config->rev_max) 250 248 break; 251 249 pci_dev_put(*isa); 252 250 } ··· 402 404 * Print the boot message. 403 405 */ 404 406 405 - pci_read_config_byte(isa, PCI_REVISION_ID, &t); 406 407 printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %sDMA%s " 407 408 "controller on pci%s\n", 408 - via_config->name, t, 409 + via_config->name, isa->revision, 409 410 via_config->udma_mask ? "U" : "MW", 410 411 via_dma[via_config->udma_mask ? 411 412 (fls(via_config->udma_mask) - 1) : 0],
+1 -8
drivers/infiniband/hw/ipath/ipath_driver.c
··· 270 270 struct ipath_devdata *dd; 271 271 unsigned long long addr; 272 272 u32 bar0 = 0, bar1 = 0; 273 - u8 rev; 274 273 275 274 dd = ipath_alloc_devdata(pdev); 276 275 if (IS_ERR(dd)) { ··· 431 432 dd->ipath_deviceid = ent->device; /* save for later use */ 432 433 dd->ipath_vendorid = ent->vendor; 433 434 434 - ret = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); 435 - if (ret) { 436 - ipath_dev_err(dd, "Failed to read PCI revision ID unit " 437 - "%u: err %d\n", dd->ipath_unit, -ret); 438 - goto bail_regions; /* shouldn't ever happen */ 439 - } 440 - dd->ipath_pcirev = rev; 435 + dd->ipath_pcirev = pdev->revision; 441 436 442 437 #if defined(__powerpc__) 443 438 /* There isn't a generic way to specify writethrough mappings */
+1 -3
drivers/isdn/hisax/bkm_a8.c
··· 287 287 #ifdef CONFIG_PCI 288 288 struct IsdnCardState *cs = card->cs; 289 289 char tmp[64]; 290 - u_char pci_rev_id; 291 290 u_int found = 0; 292 291 u_int pci_ioaddr1, pci_ioaddr2, pci_ioaddr3, pci_ioaddr4, pci_ioaddr5; 293 292 ··· 334 335 } 335 336 #ifdef ATTEMPT_PCI_REMAPPING 336 337 /* HACK: PLX revision 1 bug: PLX address bit 7 must not be set */ 337 - pci_read_config_byte(dev_a8, PCI_REVISION_ID, &pci_rev_id); 338 - if ((pci_ioaddr1 & 0x80) && (pci_rev_id == 1)) { 338 + if ((pci_ioaddr1 & 0x80) && (dev_a8->revision == 1)) { 339 339 printk(KERN_WARNING "HiSax: %s (%s): PLX rev 1, remapping required!\n", 340 340 CardType[card->typ], 341 341 sct_quadro_subtypes[cs->subtyp]);
+1 -3
drivers/media/radio/radio-gemtek-pci.c
··· 94 94 95 95 u32 iobase; 96 96 u32 length; 97 - u8 chiprev; 98 97 u16 model; 99 98 100 99 u32 current_frequency; ··· 414 415 goto err_pci; 415 416 } 416 417 417 - pci_read_config_byte( pci_dev, PCI_REVISION_ID, &card->chiprev ); 418 418 pci_read_config_word( pci_dev, PCI_SUBSYSTEM_ID, &card->model ); 419 419 420 420 pci_set_drvdata( pci_dev, card ); ··· 434 436 gemtek_pci_mute( card ); 435 437 436 438 printk( KERN_INFO "Gemtek PCI Radio (rev. %d) found at 0x%04x-0x%04x.\n", 437 - card->chiprev, card->iobase, card->iobase + card->length - 1 ); 439 + pci_dev->revision, card->iobase, card->iobase + card->length - 1 ); 438 440 439 441 return 0; 440 442
+1 -3
drivers/media/video/meye.c
··· 1809 1809 { 1810 1810 int ret = -EBUSY; 1811 1811 unsigned long mchip_adr; 1812 - u8 revision; 1813 1812 1814 1813 if (meye.mchip_dev != NULL) { 1815 1814 printk(KERN_ERR "meye: only one device allowed!\n"); ··· 1884 1885 goto outreqirq; 1885 1886 } 1886 1887 1887 - pci_read_config_byte(meye.mchip_dev, PCI_REVISION_ID, &revision); 1888 1888 pci_write_config_byte(meye.mchip_dev, PCI_CACHE_LINE_SIZE, 8); 1889 1889 pci_write_config_byte(meye.mchip_dev, PCI_LATENCY_TIMER, 64); 1890 1890 ··· 1937 1939 printk(KERN_INFO "meye: Motion Eye Camera Driver v%s.\n", 1938 1940 MEYE_DRIVER_VERSION); 1939 1941 printk(KERN_INFO "meye: mchip KL5A72002 rev. %d, base %lx, irq %d\n", 1940 - revision, mchip_adr, meye.mchip_irq); 1942 + meye.mchip_dev->revision, mchip_adr, meye.mchip_irq); 1941 1943 1942 1944 return 0; 1943 1945
+2 -5
drivers/net/8139cp.c
··· 1799 1799 void __iomem *regs; 1800 1800 resource_size_t pciaddr; 1801 1801 unsigned int addr_len, i, pci_using_dac; 1802 - u8 pci_rev; 1803 1802 1804 1803 #ifndef MODULE 1805 1804 static int version_printed; ··· 1806 1807 printk("%s", version); 1807 1808 #endif 1808 1809 1809 - pci_read_config_byte(pdev, PCI_REVISION_ID, &pci_rev); 1810 - 1811 1810 if (pdev->vendor == PCI_VENDOR_ID_REALTEK && 1812 - pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pci_rev < 0x20) { 1811 + pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pdev->revision < 0x20) { 1813 1812 dev_err(&pdev->dev, 1814 1813 "This (id %04x:%04x rev %02x) is not an 8139C+ compatible chip\n", 1815 - pdev->vendor, pdev->device, pci_rev); 1814 + pdev->vendor, pdev->device, pdev->revision); 1816 1815 dev_err(&pdev->dev, "Try the \"8139too\" driver instead.\n"); 1817 1816 return -ENODEV; 1818 1817 }
+2 -5
drivers/net/8139too.c
··· 931 931 int i, addr_len, option; 932 932 void __iomem *ioaddr; 933 933 static int board_idx = -1; 934 - u8 pci_rev; 935 934 936 935 assert (pdev != NULL); 937 936 assert (ent != NULL); ··· 948 949 } 949 950 #endif 950 951 951 - pci_read_config_byte(pdev, PCI_REVISION_ID, &pci_rev); 952 - 953 952 if (pdev->vendor == PCI_VENDOR_ID_REALTEK && 954 - pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pci_rev >= 0x20) { 953 + pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pdev->revision >= 0x20) { 955 954 dev_info(&pdev->dev, 956 955 "This (id %04x:%04x rev %02x) is an enhanced 8139C+ chip\n", 957 - pdev->vendor, pdev->device, pci_rev); 956 + pdev->vendor, pdev->device, pdev->revision); 958 957 dev_info(&pdev->dev, 959 958 "Use the \"8139cp\" driver for improved performance and stability.\n"); 960 959 }
-1
drivers/net/atl1/atl1.h
··· 210 210 u16 phy_spd_default; 211 211 212 212 u16 dev_rev; 213 - u8 revision_id; 214 213 215 214 /* spi flash */ 216 215 u8 flash_vendor;
-4
drivers/net/atl1/atl1_main.c
··· 118 118 { 119 119 struct atl1_hw *hw = &adapter->hw; 120 120 struct net_device *netdev = adapter->netdev; 121 - struct pci_dev *pdev = adapter->pdev; 122 - 123 - /* PCI config space info */ 124 - pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); 125 121 126 122 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; 127 123 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
+2 -3
drivers/net/bnx2.c
··· 6363 6363 while ((amd_8132 = pci_get_device(PCI_VENDOR_ID_AMD, 6364 6364 PCI_DEVICE_ID_AMD_8132_BRIDGE, 6365 6365 amd_8132))) { 6366 - u8 rev; 6367 6366 6368 - pci_read_config_byte(amd_8132, PCI_REVISION_ID, &rev); 6369 - if (rev >= 0x10 && rev <= 0x13) { 6367 + if (amd_8132->revision >= 0x10 && 6368 + amd_8132->revision <= 0x13) { 6370 6369 disable_msi = 1; 6371 6370 pci_dev_put(amd_8132); 6372 6371 break;
+3 -5
drivers/net/cassini.c
··· 3422 3422 static void cas_check_pci_invariants(struct cas *cp) 3423 3423 { 3424 3424 struct pci_dev *pdev = cp->pdev; 3425 - u8 rev; 3426 3425 3427 3426 cp->cas_flags = 0; 3428 - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); 3429 3427 if ((pdev->vendor == PCI_VENDOR_ID_SUN) && 3430 3428 (pdev->device == PCI_DEVICE_ID_SUN_CASSINI)) { 3431 - if (rev >= CAS_ID_REVPLUS) 3429 + if (pdev->revision >= CAS_ID_REVPLUS) 3432 3430 cp->cas_flags |= CAS_FLAG_REG_PLUS; 3433 - if (rev < CAS_ID_REVPLUS02u) 3431 + if (pdev->revision < CAS_ID_REVPLUS02u) 3434 3432 cp->cas_flags |= CAS_FLAG_TARGET_ABORT; 3435 3433 3436 3434 /* Original Cassini supports HW CSUM, but it's not 3437 3435 * enabled by default as it can trigger TX hangs. 3438 3436 */ 3439 - if (rev < CAS_ID_REV2) 3437 + if (pdev->revision < CAS_ID_REV2) 3440 3438 cp->cas_flags |= CAS_FLAG_NO_HW_CSUM; 3441 3439 } else { 3442 3440 /* Only sun has original cassini chips. */
+1 -2
drivers/net/dl2k.c
··· 250 250 np->an_enable = 1; 251 251 mii_set_media (dev); 252 252 } 253 - pci_read_config_byte(pdev, PCI_REVISION_ID, &np->pci_rev_id); 254 253 255 254 err = register_netdev (dev); 256 255 if (err) ··· 878 879 skb->protocol = eth_type_trans (skb, dev); 879 880 #if 0 880 881 /* Checksum done by hw, but csum value unavailable. */ 881 - if (np->pci_rev_id >= 0x0c && 882 + if (np->pdev->pci_rev_id >= 0x0c && 882 883 !(frame_status & (TCPError | UDPError | IPError))) { 883 884 skb->ip_summed = CHECKSUM_UNNECESSARY; 884 885 }
-1
drivers/net/dl2k.h
··· 668 668 unsigned int rx_flow:1; /* Rx flow control enable */ 669 669 unsigned int phy_media:1; /* 1: fiber, 0: copper */ 670 670 unsigned int link_status:1; /* Current link status */ 671 - unsigned char pci_rev_id; /* PCI revision ID */ 672 671 struct netdev_desc *last_tx; /* Last Tx descriptor used. */ 673 672 unsigned long cur_rx, old_rx; /* Producer/consumer ring indices */ 674 673 unsigned long cur_tx, old_tx;
+3 -5
drivers/net/e100.c
··· 583 583 u32 rx_tco_frames; 584 584 u32 rx_over_length_errors; 585 585 586 - u8 rev_id; 587 586 u16 leds; 588 587 u16 eeprom_wc; 589 588 u16 eeprom[256]; ··· 936 937 struct param_range rfds = { .min = 16, .max = 256, .count = 256 }; 937 938 struct param_range cbs = { .min = 64, .max = 256, .count = 128 }; 938 939 939 - pci_read_config_byte(nic->pdev, PCI_REVISION_ID, &nic->rev_id); 940 940 /* MAC type is encoded as rev ID; exception: ICH is treated as 82559 */ 941 - nic->mac = (nic->flags & ich) ? mac_82559_D101M : nic->rev_id; 941 + nic->mac = (nic->flags & ich) ? mac_82559_D101M : nic->pdev->revision; 942 942 if(nic->mac == mac_unknown) 943 943 nic->mac = mac_82557_D100_A; 944 944 ··· 1277 1279 if (nic->flags & ich) 1278 1280 goto noloaducode; 1279 1281 1280 - /* Search for ucode match against h/w rev_id */ 1282 + /* Search for ucode match against h/w revision */ 1281 1283 for (opts = ucode_opts; opts->mac; opts++) { 1282 1284 int i; 1283 1285 u32 *ucode = opts->ucode; ··· 2236 2238 u32 *buff = p; 2237 2239 int i; 2238 2240 2239 - regs->version = (1 << 24) | nic->rev_id; 2241 + regs->version = (1 << 24) | nic->pdev->revision; 2240 2242 buff[0] = ioread8(&nic->csr->scb.cmd_hi) << 24 | 2241 2243 ioread8(&nic->csr->scb.cmd_lo) << 16 | 2242 2244 ioread16(&nic->csr->scb.status);
+1 -2
drivers/net/e1000/e1000_main.c
··· 1266 1266 hw->device_id = pdev->device; 1267 1267 hw->subsystem_vendor_id = pdev->subsystem_vendor; 1268 1268 hw->subsystem_id = pdev->subsystem_device; 1269 - 1270 - pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); 1269 + hw->revision_id = pdev->revision; 1271 1270 1272 1271 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); 1273 1272
+1 -3
drivers/net/forcedeth.c
··· 5084 5084 np->wolenabled = 0; 5085 5085 5086 5086 if (id->driver_data & DEV_HAS_POWER_CNTRL) { 5087 - u8 revision_id; 5088 - pci_read_config_byte(pci_dev, PCI_REVISION_ID, &revision_id); 5089 5087 5090 5088 /* take phy and nic out of low power mode */ 5091 5089 powerstate = readl(base + NvRegPowerState2); 5092 5090 powerstate &= ~NVREG_POWERSTATE2_POWERUP_MASK; 5093 5091 if ((id->device == PCI_DEVICE_ID_NVIDIA_NVENET_12 || 5094 5092 id->device == PCI_DEVICE_ID_NVIDIA_NVENET_13) && 5095 - revision_id >= 0xA3) 5093 + pci_dev->revision >= 0xA3) 5096 5094 powerstate |= NVREG_POWERSTATE2_POWERUP_REV_A3; 5097 5095 writel(powerstate, base + NvRegPowerState2); 5098 5096 }
+2 -5
drivers/net/netxen/netxen_nic_main.c
··· 54 54 #define NETXEN_ADAPTER_UP_MAGIC 777 55 55 #define NETXEN_NIC_PEG_TUNE 0 56 56 57 - u8 nx_p2_id = NX_P2_C0; 58 - 59 57 #define DMA_32BIT_MASK 0x00000000ffffffffULL 60 58 #define DMA_35BIT_MASK 0x00000007ffffffffULL 61 59 ··· 305 307 goto err_out_disable_pdev; 306 308 307 309 pci_set_master(pdev); 308 - pci_read_config_byte(pdev, PCI_REVISION_ID, &nx_p2_id); 309 - if (nx_p2_id == NX_P2_C1 && 310 + if (pdev->revision == NX_P2_C1 && 310 311 (pci_set_dma_mask(pdev, DMA_35BIT_MASK) == 0) && 311 312 (pci_set_consistent_dma_mask(pdev, DMA_35BIT_MASK) == 0)) { 312 313 pci_using_dac = 1; ··· 549 552 INIT_WORK(&adapter->watchdog_task, netxen_watchdog_task); 550 553 adapter->ahw.pdev = pdev; 551 554 adapter->proc_cmd_buf_counter = 0; 552 - adapter->ahw.revision_id = nx_p2_id; 555 + adapter->ahw.revision_id = pdev->revision; 553 556 554 557 /* make sure Window == 1 */ 555 558 netxen_nic_pci_change_crbwindow(adapter, 1);
+4 -21
drivers/net/s2io.c
··· 1135 1135 * SXE-008 TRANSMIT DMA ARBITRATION ISSUE. 1136 1136 */ 1137 1137 if ((nic->device_type == XFRAME_I_DEVICE) && 1138 - (get_xena_rev_id(nic->pdev) < 4)) 1138 + (nic->pdev->revision < 4)) 1139 1139 writeq(PCC_ENABLE_FOUR, &bar0->pcc_enable); 1140 1140 1141 1141 val64 = readq(&bar0->tx_fifo_partition_0); ··· 1873 1873 herc = (sp->device_type == XFRAME_II_DEVICE); 1874 1874 1875 1875 if (flag == FALSE) { 1876 - if ((!herc && (get_xena_rev_id(sp->pdev) >= 4)) || herc) { 1876 + if ((!herc && (sp->pdev->revision >= 4)) || herc) { 1877 1877 if (!(val64 & ADAPTER_STATUS_RMAC_PCC_IDLE)) 1878 1878 ret = 1; 1879 1879 } else { ··· 1881 1881 ret = 1; 1882 1882 } 1883 1883 } else { 1884 - if ((!herc && (get_xena_rev_id(sp->pdev) >= 4)) || herc) { 1884 + if ((!herc && (sp->pdev->revision >= 4)) || herc) { 1885 1885 if (((val64 & ADAPTER_STATUS_RMAC_PCC_IDLE) == 1886 1886 ADAPTER_STATUS_RMAC_PCC_IDLE)) 1887 1887 ret = 1; ··· 7076 7076 } 7077 7077 7078 7078 /** 7079 - * get_xena_rev_id - to identify revision ID of xena. 7080 - * @pdev : PCI Dev structure 7081 - * Description: 7082 - * Function to identify the Revision ID of xena. 7083 - * Return value: 7084 - * returns the revision ID of the device. 7085 - */ 7086 - 7087 - static int get_xena_rev_id(struct pci_dev *pdev) 7088 - { 7089 - u8 id = 0; 7090 - int ret; 7091 - ret = pci_read_config_byte(pdev, PCI_REVISION_ID, (u8 *) & id); 7092 - return id; 7093 - } 7094 - 7095 - /** 7096 7079 * s2io_init_pci -Initialization of PCI and PCI-X configuration registers . 7097 7080 * @sp : private member of the device structure, which is a pointer to the 7098 7081 * s2io_nic structure. ··· 7533 7550 s2io_vpd_read(sp); 7534 7551 DBG_PRINT(ERR_DBG, "Copyright(c) 2002-2007 Neterion Inc.\n"); 7535 7552 DBG_PRINT(ERR_DBG, "%s: Neterion %s (rev %d)\n",dev->name, 7536 - sp->product_name, get_xena_rev_id(sp->pdev)); 7553 + sp->product_name, pdev->revision); 7537 7554 DBG_PRINT(ERR_DBG, "%s: Driver version %s\n", dev->name, 7538 7555 s2io_driver_version); 7539 7556 DBG_PRINT(ERR_DBG, "%s: MAC ADDR: "
-1
drivers/net/s2io.h
··· 1033 1033 static int s2io_set_swapper(struct s2io_nic * sp); 1034 1034 static void s2io_card_down(struct s2io_nic *nic); 1035 1035 static int s2io_card_up(struct s2io_nic *nic); 1036 - static int get_xena_rev_id(struct pci_dev *pdev); 1037 1036 static int wait_for_cmd_complete(void __iomem *addr, u64 busy_bit, 1038 1037 int bit_state); 1039 1038 static int s2io_add_isr(struct s2io_nic * sp);
+2 -5
drivers/net/sundance.c
··· 397 397 unsigned char phys[MII_CNT]; /* MII device addresses, only first one used. */ 398 398 struct pci_dev *pci_dev; 399 399 void __iomem *base; 400 - unsigned char pci_rev_id; 401 400 }; 402 401 403 402 /* The station address location in the EEPROM. */ ··· 542 543 dev->watchdog_timeo = TX_TIMEOUT; 543 544 dev->change_mtu = &change_mtu; 544 545 pci_set_drvdata(pdev, dev); 545 - 546 - pci_read_config_byte(pdev, PCI_REVISION_ID, &np->pci_rev_id); 547 546 548 547 i = register_netdev(dev); 549 548 if (i) ··· 825 828 iowrite8(100, ioaddr + RxDMAPollPeriod); 826 829 iowrite8(127, ioaddr + TxDMAPollPeriod); 827 830 /* Fix DFE-580TX packet drop issue */ 828 - if (np->pci_rev_id >= 0x14) 831 + if (np->pci_dev->revision >= 0x14) 829 832 iowrite8(0x01, ioaddr + DebugCtrl1); 830 833 netif_start_queue(dev); 831 834 ··· 1191 1194 hw_frame_id = ioread8(ioaddr + TxFrameId); 1192 1195 } 1193 1196 1194 - if (np->pci_rev_id >= 0x14) { 1197 + if (np->pci_dev->revision >= 0x14) { 1195 1198 spin_lock(&np->lock); 1196 1199 for (; np->cur_tx - np->dirty_tx > 0; np->dirty_tx++) { 1197 1200 int entry = np->dirty_tx % TX_RING_SIZE;
+2 -6
drivers/net/sunhme.c
··· 3095 3095 3096 3096 #ifdef CONFIG_SPARC 3097 3097 hp->hm_revision = of_getintprop_default(dp, "hm-rev", 0xff); 3098 - if (hp->hm_revision == 0xff) { 3099 - unsigned char prev; 3100 - 3101 - pci_read_config_byte(pdev, PCI_REVISION_ID, &prev); 3102 - hp->hm_revision = 0xc0 | (prev & 0x0f); 3103 - } 3098 + if (hp->hm_revision == 0xff) 3099 + hp->hm_revision = 0xc0 | (pdev->revision & 0x0f); 3104 3100 #else 3105 3101 /* works with this on non-sparc hosts */ 3106 3102 hp->hm_revision = 0x20;
+1 -5
drivers/net/tg3.c
··· 10498 10498 continue; 10499 10499 } 10500 10500 if (pci_id->rev != PCI_ANY_ID) { 10501 - u8 rev; 10502 - 10503 - pci_read_config_byte(bridge, PCI_REVISION_ID, 10504 - &rev); 10505 - if (rev > pci_id->rev) 10501 + if (bridge->revision > pci_id->rev) 10506 10502 continue; 10507 10503 } 10508 10504 if (bridge->subordinate &&
+1 -4
drivers/net/tlan.c
··· 533 533 534 534 struct net_device *dev; 535 535 TLanPrivateInfo *priv; 536 - u8 pci_rev; 537 536 u16 device_id; 538 537 int reg, rc = -ENODEV; 539 538 ··· 576 577 goto err_out_free_dev; 577 578 } 578 579 579 - pci_read_config_byte ( pdev, PCI_REVISION_ID, &pci_rev); 580 - 581 580 for ( reg= 0; reg <= 5; reg ++ ) { 582 581 if (pci_resource_flags(pdev, reg) & IORESOURCE_IO) { 583 582 pci_io_base = pci_resource_start(pdev, reg); ··· 592 595 593 596 dev->base_addr = pci_io_base; 594 597 dev->irq = pdev->irq; 595 - priv->adapterRev = pci_rev; 598 + priv->adapterRev = pdev->revision; 596 599 pci_set_master(pdev); 597 600 pci_set_drvdata(pdev, dev); 598 601
+4 -4
drivers/net/tulip/de4x5.c
··· 2134 2134 u_short vendor, status; 2135 2135 u_int irq = 0, device; 2136 2136 u_long iobase = 0; /* Clear upper 32 bits in Alphas */ 2137 - int i, j, cfrv; 2137 + int i, j; 2138 2138 struct de4x5_private *lp = netdev_priv(dev); 2139 2139 struct list_head *walk; 2140 2140 ··· 2150 2150 2151 2151 /* Get the chip configuration revision register */ 2152 2152 pb = this_dev->bus->number; 2153 - pci_read_config_dword(this_dev, PCI_REVISION_ID, &cfrv); 2154 2153 2155 2154 /* Set the device number information */ 2156 2155 lp->device = PCI_SLOT(this_dev->devfn); ··· 2157 2158 2158 2159 /* Set the chipset information */ 2159 2160 if (is_DC2114x) { 2160 - device = ((cfrv & CFRV_RN) < DC2114x_BRK ? DC21142 : DC21143); 2161 + device = ((this_dev->revision & CFRV_RN) < DC2114x_BRK 2162 + ? DC21142 : DC21143); 2161 2163 } 2162 2164 lp->chipset = device; 2163 2165 ··· 2254 2254 } 2255 2255 2256 2256 /* Get the chip configuration revision register */ 2257 - pci_read_config_dword(pdev, PCI_REVISION_ID, &lp->cfrv); 2257 + lp->cfrv = pdev->revision; 2258 2258 2259 2259 /* Set the device number information */ 2260 2260 lp->device = dev_num;
+12 -14
drivers/net/tulip/dmfe.c
··· 181 181 udelay(5); 182 182 183 183 #define __CHK_IO_SIZE(pci_id, dev_rev) \ 184 - (( ((pci_id)==PCI_DM9132_ID) || ((dev_rev) >= 0x02000030) ) ? \ 184 + (( ((pci_id)==PCI_DM9132_ID) || ((dev_rev) >= 0x30) ) ? \ 185 185 DM9102A_IO_SIZE: DM9102_IO_SIZE) 186 186 187 - #define CHK_IO_SIZE(pci_dev, dev_rev) \ 188 - (__CHK_IO_SIZE(((pci_dev)->device << 16) | (pci_dev)->vendor, dev_rev)) 187 + #define CHK_IO_SIZE(pci_dev) \ 188 + (__CHK_IO_SIZE(((pci_dev)->device << 16) | (pci_dev)->vendor, \ 189 + (pci_dev)->revision)) 189 190 190 191 /* Sten Check */ 191 192 #define DEVICE net_device ··· 206 205 207 206 struct dmfe_board_info { 208 207 u32 chip_id; /* Chip vendor/Device ID */ 209 - u32 chip_revision; /* Chip revision */ 208 + u8 chip_revision; /* Chip revision */ 210 209 struct DEVICE *next_dev; /* next device */ 211 210 struct pci_dev *pdev; /* PCI device */ 212 211 spinlock_t lock; ··· 360 359 { 361 360 struct dmfe_board_info *db; /* board information structure */ 362 361 struct net_device *dev; 363 - u32 dev_rev, pci_pmr; 362 + u32 pci_pmr; 364 363 int i, err; 365 364 366 365 DMFE_DBUG(0, "dmfe_init_one()", 0); ··· 393 392 goto err_out_disable; 394 393 } 395 394 396 - /* Read Chip revision */ 397 - pci_read_config_dword(pdev, PCI_REVISION_ID, &dev_rev); 398 - 399 - if (pci_resource_len(pdev, 0) < (CHK_IO_SIZE(pdev, dev_rev)) ) { 395 + if (pci_resource_len(pdev, 0) < (CHK_IO_SIZE(pdev)) ) { 400 396 printk(KERN_ERR DRV_NAME ": Allocated I/O size too small\n"); 401 397 err = -ENODEV; 402 398 goto err_out_disable; ··· 431 433 432 434 db->chip_id = ent->driver_data; 433 435 db->ioaddr = pci_resource_start(pdev, 0); 434 - db->chip_revision = dev_rev; 436 + db->chip_revision = pdev->revision; 435 437 db->wol_mode = 0; 436 438 437 439 db->pdev = pdev; ··· 453 455 454 456 pci_read_config_dword(pdev, 0x50, &pci_pmr); 455 457 pci_pmr &= 0x70000; 456 - if ( (pci_pmr == 0x10000) && (dev_rev == 0x02000031) ) 458 + if ( (pci_pmr == 0x10000) && (db->chip_revision == 0x31) ) 457 459 db->chip_type = 1; /* DM9102A E3 */ 458 460 else 459 461 db->chip_type = 0; ··· 551 553 552 554 /* CR6 operation mode decision */ 553 555 if ( !chkmode || (db->chip_id == PCI_DM9132_ID) || 554 - (db->chip_revision >= 0x02000030) ) { 556 + (db->chip_revision >= 0x30) ) { 555 557 db->cr6_data |= DMFE_TXTH_256; 556 558 db->cr0_data = CR0_DEFAULT; 557 559 db->dm910x_chk_mode=4; /* Enter the normal mode */ ··· 1197 1199 tmp_cr12 = inb(db->ioaddr + DCR12); /* DM9102/DM9102A */ 1198 1200 1199 1201 if ( ((db->chip_id == PCI_DM9102_ID) && 1200 - (db->chip_revision == 0x02000030)) || 1202 + (db->chip_revision == 0x30)) || 1201 1203 ((db->chip_id == PCI_DM9132_ID) && 1202 - (db->chip_revision == 0x02000010)) ) { 1204 + (db->chip_revision == 0x10)) ) { 1203 1205 /* DM9102A Chip */ 1204 1206 if (tmp_cr12 & 2) 1205 1207 link_ok = 0;
+4 -9
drivers/net/tulip/tulip_core.c
··· 1238 1238 }; 1239 1239 static int last_irq; 1240 1240 static int multiport_cnt; /* For four-port boards w/one EEPROM */ 1241 - u8 chip_rev; 1242 1241 int i, irq; 1243 1242 unsigned short sum; 1244 1243 unsigned char *ee_data; ··· 1273 1274 1274 1275 if (pdev->vendor == 0x1282 && pdev->device == 0x9100) 1275 1276 { 1276 - u32 dev_rev; 1277 1277 /* Read Chip revision */ 1278 - pci_read_config_dword(pdev, PCI_REVISION_ID, &dev_rev); 1279 - if(dev_rev < 0x02000030) 1278 + if (pdev->revision < 0x02000030) 1280 1279 { 1281 1280 printk(KERN_ERR PFX "skipping early DM9100 with Crc bug (use dmfe)\n"); 1282 1281 return -ENODEV; ··· 1357 1360 if (!ioaddr) 1358 1361 goto err_out_free_res; 1359 1362 1360 - pci_read_config_byte (pdev, PCI_REVISION_ID, &chip_rev); 1361 - 1362 1363 /* 1363 1364 * initialize private data structure 'tp' 1364 1365 * it is zeroed and aligned in alloc_etherdev ··· 1377 1382 tp->flags = tulip_tbl[chip_idx].flags; 1378 1383 tp->pdev = pdev; 1379 1384 tp->base_addr = ioaddr; 1380 - tp->revision = chip_rev; 1385 + tp->revision = pdev->revision; 1381 1386 tp->csr0 = csr0; 1382 1387 spin_lock_init(&tp->lock); 1383 1388 spin_lock_init(&tp->mii_lock); ··· 1394 1399 tulip_mwi_config (pdev, dev); 1395 1400 #else 1396 1401 /* MWI is broken for DC21143 rev 65... */ 1397 - if (chip_idx == DC21143 && chip_rev == 65) 1402 + if (chip_idx == DC21143 && pdev->revision == 65) 1398 1403 tp->csr0 &= ~MWI; 1399 1404 #endif 1400 1405 ··· 1635 1640 #else 1636 1641 "Port" 1637 1642 #endif 1638 - " %#llx,", dev->name, chip_name, chip_rev, 1643 + " %#llx,", dev->name, chip_name, pdev->revision, 1639 1644 (unsigned long long) pci_resource_start(pdev, TULIP_BAR)); 1640 1645 pci_set_drvdata(pdev, dev); 1641 1646
+1 -4
drivers/net/tulip/xircom_cb.c
··· 205 205 { 206 206 struct net_device *dev = NULL; 207 207 struct xircom_private *private; 208 - unsigned char chip_rev; 209 208 unsigned long flags; 210 209 unsigned short tmp16; 211 210 enter("xircom_probe"); ··· 222 223 /* clear PCI status, if any */ 223 224 pci_read_config_word (pdev,PCI_STATUS, &tmp16); 224 225 pci_write_config_word (pdev, PCI_STATUS,tmp16); 225 - 226 - pci_read_config_byte(pdev, PCI_REVISION_ID, &chip_rev); 227 226 228 227 if (!request_region(pci_resource_start(pdev, 0), 128, "xircom_cb")) { 229 228 printk(KERN_ERR "xircom_probe: failed to allocate io-region\n"); ··· 283 286 goto reg_fail; 284 287 } 285 288 286 - printk(KERN_INFO "%s: Xircom cardbus revision %i at irq %i \n", dev->name, chip_rev, pdev->irq); 289 + printk(KERN_INFO "%s: Xircom cardbus revision %i at irq %i \n", dev->name, pdev->revision, pdev->irq); 287 290 /* start the transmitter to get a heartbeat */ 288 291 /* TODO: send 2 dummy packets here */ 289 292 transceiver_voodoo(private);
+1 -3
drivers/net/tulip/xircom_tulip_cb.c
··· 524 524 int chip_idx = id->driver_data; 525 525 long ioaddr; 526 526 int i; 527 - u8 chip_rev; 528 527 529 528 /* when built into the kernel, we only print version if device is found */ 530 529 #ifndef MODULE ··· 619 620 if (register_netdev(dev)) 620 621 goto err_out_cleardev; 621 622 622 - pci_read_config_byte(pdev, PCI_REVISION_ID, &chip_rev); 623 623 printk(KERN_INFO "%s: %s rev %d at %#3lx,", 624 - dev->name, xircom_tbl[chip_idx].chip_name, chip_rev, ioaddr); 624 + dev->name, xircom_tbl[chip_idx].chip_name, pdev->revision, ioaddr); 625 625 for (i = 0; i < 6; i++) 626 626 printk("%c%2.2X", i ? ':' : ' ', dev->dev_addr[i]); 627 627 printk(", IRQ %d.\n", dev->irq);
+5 -8
drivers/net/via-rhine.c
··· 622 622 struct net_device *dev; 623 623 struct rhine_private *rp; 624 624 int i, rc; 625 - u8 pci_rev; 626 625 u32 quirks; 627 626 long pioaddr; 628 627 long memaddr; ··· 641 642 printk(version); 642 643 #endif 643 644 644 - pci_read_config_byte(pdev, PCI_REVISION_ID, &pci_rev); 645 - 646 645 io_size = 256; 647 646 phy_id = 0; 648 647 quirks = 0; 649 648 name = "Rhine"; 650 - if (pci_rev < VTunknown0) { 649 + if (pdev->revision < VTunknown0) { 651 650 quirks = rqRhineI; 652 651 io_size = 128; 653 652 } 654 - else if (pci_rev >= VT6102) { 653 + else if (pdev->revision >= VT6102) { 655 654 quirks = rqWOL | rqForceReset; 656 - if (pci_rev < VT6105) { 655 + if (pdev->revision < VT6105) { 657 656 name = "Rhine II"; 658 657 quirks |= rqStatusWBRace; /* Rhine-II exclusive */ 659 658 } 660 659 else { 661 660 phy_id = 1; /* Integrated PHY, phy_id fixed to 1 */ 662 - if (pci_rev >= VT6105_B0) 661 + if (pdev->revision >= VT6105_B0) 663 662 quirks |= rq6patterns; 664 - if (pci_rev < VT6105M) 663 + if (pdev->revision < VT6105M) 665 664 name = "Rhine III"; 666 665 else 667 666 name = "Rhine III (Management Adapter)";
+1 -2
drivers/net/via-velocity.c
··· 890 890 891 891 static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pci_dev *pdev) 892 892 { 893 - if (pci_read_config_byte(pdev, PCI_REVISION_ID, &vptr->rev_id) < 0) 894 - return -EIO; 893 + vptr->rev_id = pdev->revision; 895 894 896 895 pci_set_master(pdev); 897 896
+1 -3
drivers/net/wan/pc300_drv.c
··· 3439 3439 cpc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 3440 3440 { 3441 3441 static int first_time = 1; 3442 - ucchar cpc_rev_id; 3443 3442 int err, eeprom_outdated = 0; 3444 3443 ucshort device_id; 3445 3444 pc300_t *card; ··· 3479 3480 card->hw.falcsize = pci_resource_len(pdev, 4); 3480 3481 card->hw.plxphys = pci_resource_start(pdev, 5); 3481 3482 card->hw.plxsize = pci_resource_len(pdev, 5); 3482 - pci_read_config_byte(pdev, PCI_REVISION_ID, &cpc_rev_id); 3483 3483 3484 3484 switch (device_id) { 3485 3485 case PCI_DEVICE_ID_PC300_RX_1: ··· 3496 3498 } 3497 3499 #ifdef PC300_DEBUG_PCI 3498 3500 printk("cpc (bus=0x0%x,pci_id=0x%x,", pdev->bus->number, pdev->devfn); 3499 - printk("rev_id=%d) IRQ%d\n", cpc_rev_id, card->hw.irq); 3501 + printk("rev_id=%d) IRQ%d\n", pdev->revision, card->hw.irq); 3500 3502 printk("cpc:found ramaddr=0x%08lx plxaddr=0x%08lx " 3501 3503 "ctladdr=0x%08lx falcaddr=0x%08lx\n", 3502 3504 card->hw.ramphys, card->hw.plxphys, card->hw.scaphys,
-2
drivers/net/wan/pc300too.c
··· 311 311 const struct pci_device_id *ent) 312 312 { 313 313 card_t *card; 314 - u8 rev_id; 315 314 u32 __iomem *p; 316 315 int i; 317 316 u32 ramsize; ··· 365 366 return -ENOMEM; 366 367 } 367 368 368 - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id); 369 369 if (pci_resource_len(pdev, 0) != PC300_PLX_SIZE || 370 370 pci_resource_len(pdev, 2) != PC300_SCA_SIZE || 371 371 pci_resource_len(pdev, 3) < 16384) {
-2
drivers/net/wan/pci200syn.c
··· 289 289 const struct pci_device_id *ent) 290 290 { 291 291 card_t *card; 292 - u8 rev_id; 293 292 u32 __iomem *p; 294 293 int i; 295 294 u32 ramsize; ··· 329 330 return -ENOMEM; 330 331 } 331 332 332 - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id); 333 333 if (pci_resource_len(pdev, 0) != PCI200SYN_PLX_SIZE || 334 334 pci_resource_len(pdev, 2) != PCI200SYN_SCA_SIZE || 335 335 pci_resource_len(pdev, 3) < 16384) {
+2 -4
drivers/net/wireless/bcm43xx/bcm43xx_main.c
··· 3741 3741 &bcm->board_type); 3742 3742 if (err) 3743 3743 goto err_iounmap; 3744 - err = bcm43xx_pci_read_config16(bcm, PCI_REVISION_ID, 3745 - &bcm->board_revision); 3746 - if (err) 3747 - goto err_iounmap; 3744 + 3745 + bcm->board_revision = bcm->pci_dev->revision; 3748 3746 3749 3747 err = bcm43xx_chipset_attach(bcm); 3750 3748 if (err)
+5 -7
drivers/pci/hotplug/cpqphp_core.c
··· 796 796 u8 num_of_slots = 0; 797 797 u8 hp_slot = 0; 798 798 u8 device; 799 - u8 rev; 800 799 u8 bus_cap; 801 800 u16 temp_word; 802 801 u16 vendor_id; ··· 822 823 } 823 824 dbg("Vendor ID: %x\n", vendor_id); 824 825 825 - rc = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); 826 - dbg("revision: %d\n", rev); 827 - if (rc || ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!rev))) { 826 + dbg("revision: %d\n", pdev->revision); 827 + if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) { 828 828 err(msg_HPC_rev_error); 829 829 rc = -ENODEV; 830 830 goto err_disable_device; ··· 834 836 * For Intel, each SSID bit identifies a PHP capability. 835 837 * Also Intel HPC's may have RID=0. 836 838 */ 837 - if ((rev > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) { 839 + if ((pdev->revision > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) { 838 840 // TODO: This code can be made to support non-Compaq or Intel subsystem IDs 839 841 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid); 840 842 if (rc) { ··· 868 870 869 871 switch (subsystem_vid) { 870 872 case PCI_VENDOR_ID_COMPAQ: 871 - if (rev >= 0x13) { /* CIOBX */ 873 + if (pdev->revision >= 0x13) { /* CIOBX */ 872 874 ctrl->push_flag = 1; 873 875 ctrl->slot_switch_type = 1; 874 876 ctrl->push_button = 1; ··· 1073 1075 memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus)); 1074 1076 1075 1077 ctrl->bus = pdev->bus->number; 1076 - ctrl->rev = rev; 1078 + ctrl->rev = pdev->revision; 1077 1079 dbg("bus device function rev: %d %d %d %d\n", ctrl->bus, 1078 1080 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev); 1079 1081
+4 -10
drivers/pci/quirks.c
··· 587 587 */ 588 588 static void __devinit quirk_amd_ioapic(struct pci_dev *dev) 589 589 { 590 - u8 rev; 591 - 592 - pci_read_config_byte(dev, PCI_REVISION_ID, &rev); 593 - if (rev >= 0x02) { 590 + if (dev->revision >= 0x02) { 594 591 printk(KERN_WARNING "I/O APIC: AMD Erratum #22 may be present. In the event of instability try\n"); 595 592 printk(KERN_WARNING " : booting with the \"noapic\" option.\n"); 596 593 } ··· 607 610 #define AMD8131_NIOAMODE_BIT 0 608 611 static void quirk_amd_8131_ioapic(struct pci_dev *dev) 609 612 { 610 - unsigned char revid, tmp; 613 + unsigned char tmp; 611 614 612 615 if (nr_ioapics == 0) 613 616 return; 614 617 615 - pci_read_config_byte(dev, PCI_REVISION_ID, &revid); 616 - if (revid == AMD8131_revA0 || revid == AMD8131_revB0) { 618 + if (dev->revision == AMD8131_revA0 || dev->revision == AMD8131_revB0) { 617 619 printk(KERN_INFO "Fixing up AMD8131 IOAPIC mode\n"); 618 620 pci_read_config_byte( dev, AMD8131_MISC, &tmp); 619 621 tmp &= ~(1 << AMD8131_NIOAMODE_BIT); ··· 855 859 static void quirk_disable_pxb(struct pci_dev *pdev) 856 860 { 857 861 u16 config; 858 - u8 rev; 859 862 860 - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); 861 - if (rev != 0x04) /* Only C0 requires this */ 863 + if (pdev->revision != 0x04) /* Only C0 requires this */ 862 864 return; 863 865 pci_read_config_word(pdev, 0x40, &config); 864 866 if (config & (1<<6)) {
+2 -7
drivers/scsi/aic94xx/aic94xx_init.c
··· 223 223 { 224 224 int err, i; 225 225 226 - err = pci_read_config_byte(asd_ha->pcidev, PCI_REVISION_ID, 227 - &asd_ha->revision_id); 228 - if (err) { 229 - asd_printk("couldn't read REVISION ID register of %s\n", 230 - pci_name(asd_ha->pcidev)); 231 - goto Err; 232 - } 226 + asd_ha->revision_id = asd_ha->pcidev->revision; 227 + 233 228 err = -ENODEV; 234 229 if (asd_ha->revision_id < AIC9410_DEV_REV_B0) { 235 230 asd_printk("%s is revision %s (%X), which is not supported\n",
+5 -17
drivers/scsi/ipr.c
··· 5367 5367 **/ 5368 5368 static int ipr_invalid_adapter(struct ipr_ioa_cfg *ioa_cfg) 5369 5369 { 5370 - u8 rev_id; 5371 5370 int i; 5372 5371 5373 - if (ioa_cfg->type == 0x5702) { 5374 - if (pci_read_config_byte(ioa_cfg->pdev, PCI_REVISION_ID, 5375 - &rev_id) == PCIBIOS_SUCCESSFUL) { 5376 - if (rev_id < 4) { 5377 - for (i = 0; i < ARRAY_SIZE(ipr_blocked_processors); i++){ 5378 - if (__is_processor(ipr_blocked_processors[i])) 5379 - return 1; 5380 - } 5381 - } 5372 + if ((ioa_cfg->type == 0x5702) && (ioa_cfg->pdev->revision < 4)) { 5373 + for (i = 0; i < ARRAY_SIZE(ipr_blocked_processors); i++){ 5374 + if (__is_processor(ipr_blocked_processors[i])) 5375 + return 1; 5382 5376 } 5383 5377 } 5384 5378 return 0; ··· 7529 7535 else 7530 7536 ioa_cfg->transop_timeout = IPR_OPERATIONAL_TIMEOUT; 7531 7537 7532 - rc = pci_read_config_byte(pdev, PCI_REVISION_ID, &ioa_cfg->revid); 7533 - 7534 - if (rc != PCIBIOS_SUCCESSFUL) { 7535 - dev_err(&pdev->dev, "Failed to read PCI revision ID\n"); 7536 - rc = -EIO; 7537 - goto out_scsi_host_put; 7538 - } 7538 + ioa_cfg->revid = pdev->revision; 7539 7539 7540 7540 ipr_regs_pci = pci_resource_start(pdev, 0); 7541 7541
+1 -8
drivers/scsi/ips.c
··· 7148 7148 uint32_t mem_addr; 7149 7149 uint32_t io_len; 7150 7150 uint32_t mem_len; 7151 - uint8_t revision_id; 7152 7151 uint8_t bus; 7153 7152 uint8_t func; 7154 7153 uint8_t irq; ··· 7226 7227 } 7227 7228 } 7228 7229 7229 - /* get the revision ID */ 7230 - if (pci_read_config_byte(pci_dev, PCI_REVISION_ID, &revision_id)) { 7231 - IPS_PRINTK(KERN_WARNING, pci_dev, "Can't get revision id.\n"); 7232 - return -1; 7233 - } 7234 - 7235 7230 subdevice_id = pci_dev->subsystem_device; 7236 7231 7237 7232 /* found a controller */ ··· 7251 7258 ha->mem_ptr = mem_ptr; 7252 7259 ha->ioremap_ptr = ioremap_ptr; 7253 7260 ha->host_num = (uint32_t) index; 7254 - ha->revision_id = revision_id; 7261 + ha->revision_id = pci_dev->revision; 7255 7262 ha->slot_num = PCI_SLOT(pci_dev->devfn); 7256 7263 ha->device_id = pci_dev->device; 7257 7264 ha->subdevice_id = subdevice_id;
+1 -1
drivers/scsi/qla2xxx/qla_init.c
··· 296 296 d &= ~PCI_ROM_ADDRESS_ENABLE; 297 297 pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d); 298 298 299 - pci_read_config_word(ha->pdev, PCI_REVISION_ID, &ha->chip_revision); 299 + ha->chip_revision = ha->pdev->revision; 300 300 301 301 /* Get PCI bus information. */ 302 302 spin_lock_irqsave(&ha->hardware_lock, flags);
+1 -1
drivers/serial/jsm/jsm_driver.c
··· 88 88 spin_lock_init(&brd->bd_intr_lock); 89 89 90 90 /* store which revision we have */ 91 - pci_read_config_byte(pdev, PCI_REVISION_ID, &brd->rev); 91 + brd->rev = pdev->revision; 92 92 93 93 brd->irq = pdev->irq; 94 94
+1 -2
drivers/usb/host/ehci-pci.c
··· 149 149 * fixed in newer silicon. 150 150 */ 151 151 case 0x0068: 152 - pci_read_config_dword(pdev, PCI_REVISION_ID, &temp); 153 - if ((temp & 0xff) < 0xa4) 152 + if (pdev->revision < 0xa4) 154 153 ehci->no_selective_suspend = 1; 155 154 break; 156 155 }
+2 -3
drivers/video/kyro/STG4000InitDevice.c
··· 247 247 u32 ulCoreClock; 248 248 u32 tmp; 249 249 u32 ulChipSpeed; 250 - u8 rev; 251 250 252 251 STG_WRITE_REG(IntMask, 0xFFFF); 253 252 ··· 275 276 PMX2_SOFTRESET_ROM_RST); 276 277 277 278 pci_read_config_word(pDev, PCI_CONFIG_SUBSYS_ID, &sub); 278 - pci_read_config_byte(pDev, PCI_REVISION_ID, &rev); 279 279 280 - ulChipSpeed = InitSDRAMRegisters(pSTGReg, (u32)sub, (u32)rev); 280 + ulChipSpeed = InitSDRAMRegisters(pSTGReg, (u32)sub, 281 + (u32)pDev->revision); 281 282 282 283 if (ulChipSpeed == 0) 283 284 return -EINVAL;
+1 -3
drivers/video/matrox/matroxfb_base.c
··· 1994 1994 1995 1995 static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) { 1996 1996 struct board* b; 1997 - u_int8_t rev; 1998 1997 u_int16_t svid; 1999 1998 u_int16_t sid; 2000 1999 struct matrox_fb_info* minfo; ··· 2004 2005 #endif 2005 2006 DBG(__FUNCTION__) 2006 2007 2007 - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); 2008 2008 svid = pdev->subsystem_vendor; 2009 2009 sid = pdev->subsystem_device; 2010 2010 for (b = dev_list; b->vendor; b++) { 2011 - if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < rev)) continue; 2011 + if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < pdev->revision)) continue; 2012 2012 if (b->svid) 2013 2013 if ((b->svid != svid) || (b->sid != sid)) continue; 2014 2014 break;
+1 -1
drivers/video/sis/sis_main.c
··· 5789 5789 ivideo->warncount = 0; 5790 5790 ivideo->chip_id = pdev->device; 5791 5791 ivideo->chip_vendor = pdev->vendor; 5792 - pci_read_config_byte(pdev, PCI_REVISION_ID, &ivideo->revision_id); 5792 + ivideo->revision_id = pdev->revision; 5793 5793 ivideo->SiS_Pr.ChipRevision = ivideo->revision_id; 5794 5794 pci_read_config_word(pdev, PCI_COMMAND, &reg16); 5795 5795 ivideo->sisvga_enabled = reg16 & 0x01;
+1 -1
drivers/video/sstfb.c
··· 1348 1348 f_ddprintk("found device : %s\n", spec->name); 1349 1349 1350 1350 par->dev = pdev; 1351 - pci_read_config_byte(pdev, PCI_REVISION_ID, &par->revision); 1351 + par->revision = pdev->revision; 1352 1352 1353 1353 fix->mmio_start = pci_resource_start(pdev,0); 1354 1354 fix->mmio_len = 0x400000;
+1 -2
drivers/video/tgafb.c
··· 1625 1625 par->tga_regs_base = mem_base + TGA_REGS_OFFSET; 1626 1626 par->tga_type = tga_type; 1627 1627 if (tga_bus_pci) 1628 - pci_read_config_byte(to_pci_dev(dev), PCI_REVISION_ID, 1629 - &par->tga_chip_rev); 1628 + par->tga_chip_rev = (to_pci_dev(dev))->revision; 1630 1629 if (tga_bus_tc) 1631 1630 par->tga_chip_rev = TGA_READ_REG(par, TGA_START_REG) & 0xff; 1632 1631
+1 -1
sound/oss/emu10k1/main.c
··· 1302 1302 goto err_irq; 1303 1303 } 1304 1304 1305 - pci_read_config_byte(pci_dev, PCI_REVISION_ID, &card->chiprev); 1305 + card->chiprev = pci_dev->revision; 1306 1306 pci_read_config_word(pci_dev, PCI_SUBSYSTEM_ID, &card->model); 1307 1307 1308 1308 printk(KERN_INFO "emu10k1: %s rev %d model %#04x found, IO at %#04lx-%#04lx, IRQ %d\n",
+1 -1
sound/oss/es1371.c
··· 2894 2894 s->irq = pcidev->irq; 2895 2895 s->vendor = pcidev->vendor; 2896 2896 s->device = pcidev->device; 2897 - pci_read_config_byte(pcidev, PCI_REVISION_ID, &s->rev); 2897 + s->rev = pcidev->revision; 2898 2898 s->codec->private_data = s; 2899 2899 s->codec->id = 0; 2900 2900 s->codec->codec_read = rdcodec;
+1 -1
sound/pci/ali5451/ali5451.c
··· 2218 2218 codec->card = card; 2219 2219 codec->pci = pci; 2220 2220 codec->irq = -1; 2221 - pci_read_config_byte(pci, PCI_REVISION_ID, &codec->revision); 2221 + codec->revision = pci->revision; 2222 2222 codec->spdif_support = spdif_support; 2223 2223 2224 2224 if (pcm_streams < 1)
+2 -4
sound/pci/atiixp.c
··· 1639 1639 { 1640 1640 struct snd_card *card; 1641 1641 struct atiixp *chip; 1642 - unsigned char revision; 1643 1642 int err; 1644 1643 1645 1644 card = snd_card_new(index, id, THIS_MODULE, 0); 1646 1645 if (card == NULL) 1647 1646 return -ENOMEM; 1648 - 1649 - pci_read_config_byte(pci, PCI_REVISION_ID, &revision); 1650 1647 1651 1648 strcpy(card->driver, spdif_aclink ? "ATIIXP" : "ATIIXP-SPDMA"); 1652 1649 strcpy(card->shortname, "ATI IXP"); ··· 1667 1670 snd_atiixp_chip_start(chip); 1668 1671 1669 1672 snprintf(card->longname, sizeof(card->longname), 1670 - "%s rev %x with %s at %#lx, irq %i", card->shortname, revision, 1673 + "%s rev %x with %s at %#lx, irq %i", card->shortname, 1674 + pci->revision, 1671 1675 chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?", 1672 1676 chip->addr, chip->irq); 1673 1677
+1 -4
sound/pci/atiixp_modem.c
··· 1283 1283 { 1284 1284 struct snd_card *card; 1285 1285 struct atiixp_modem *chip; 1286 - unsigned char revision; 1287 1286 int err; 1288 1287 1289 1288 card = snd_card_new(index, id, THIS_MODULE, 0); 1290 1289 if (card == NULL) 1291 1290 return -ENOMEM; 1292 - 1293 - pci_read_config_byte(pci, PCI_REVISION_ID, &revision); 1294 1291 1295 1292 strcpy(card->driver, "ATIIXP-MODEM"); 1296 1293 strcpy(card->shortname, "ATI IXP Modem"); ··· 1309 1312 snd_atiixp_chip_start(chip); 1310 1313 1311 1314 sprintf(card->longname, "%s rev %x at 0x%lx, irq %i", 1312 - card->shortname, revision, chip->addr, chip->irq); 1315 + card->shortname, pci->revision, chip->addr, chip->irq); 1313 1316 1314 1317 if ((err = snd_card_register(card)) < 0) 1315 1318 goto __error;
+1 -5
sound/pci/au88x0/au88x0.c
··· 341 341 snd_card_free(card); 342 342 return err; 343 343 } 344 - if ((err = pci_read_config_byte(pci, PCI_REVISION_ID, 345 - &(chip->rev))) < 0) { 346 - snd_card_free(card); 347 - return err; 348 - } 344 + chip->rev = pci->revision; 349 345 #ifdef CHIP_AU8830 350 346 if ((chip->rev) != 0xfe && (chip->rev) != 0xfa) { 351 347 printk(KERN_ALERT
-1
sound/pci/ca0106/ca0106.h
··· 590 590 struct resource *res_port; 591 591 int irq; 592 592 593 - unsigned char revision; /* chip revision */ 594 593 unsigned int serial; /* serial number */ 595 594 unsigned short model; /* subsystem id */ 596 595
+2 -3
sound/pci/ca0106/ca0106_main.c
··· 1293 1293 } 1294 1294 1295 1295 pci_set_master(pci); 1296 - /* read revision & serial */ 1297 - pci_read_config_byte(pci, PCI_REVISION_ID, &chip->revision); 1296 + /* read serial */ 1298 1297 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial); 1299 1298 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model); 1300 1299 #if 1 1301 1300 printk(KERN_INFO "snd-ca0106: Model %04x Rev %08x Serial %08x\n", chip->model, 1302 - chip->revision, chip->serial); 1301 + pci->revision, chip->serial); 1303 1302 #endif 1304 1303 strcpy(card->driver, "CA0106"); 1305 1304 strcpy(card->shortname, "CA0106");
+1 -3
sound/pci/emu10k1/emu10k1_main.c
··· 1511 1511 struct snd_emu10k1 *emu; 1512 1512 int idx, err; 1513 1513 int is_audigy; 1514 - unsigned char revision; 1515 1514 unsigned int silent_page; 1516 1515 const struct snd_emu_chip_details *c; 1517 1516 static struct snd_device_ops ops = { ··· 1542 1543 emu->synth = NULL; 1543 1544 emu->get_synth_voice = NULL; 1544 1545 /* read revision & serial */ 1545 - pci_read_config_byte(pci, PCI_REVISION_ID, &revision); 1546 - emu->revision = revision; 1546 + emu->revision = pci->revision; 1547 1547 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial); 1548 1548 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model); 1549 1549 snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
+1 -1
sound/pci/emu10k1/emu10k1x.c
··· 942 942 943 943 pci_set_master(pci); 944 944 /* read revision & serial */ 945 - pci_read_config_byte(pci, PCI_REVISION_ID, &chip->revision); 945 + chip->revision = pci->revision; 946 946 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial); 947 947 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model); 948 948 snd_printk(KERN_INFO "Model %04x Rev %08x Serial %08x\n", chip->model,
+1 -3
sound/pci/ens1370.c
··· 2110 2110 struct ensoniq ** rensoniq) 2111 2111 { 2112 2112 struct ensoniq *ensoniq; 2113 - unsigned char cmdb; 2114 2113 int err; 2115 2114 static struct snd_device_ops ops = { 2116 2115 .dev_free = snd_ensoniq_dev_free, ··· 2150 2151 } 2151 2152 #endif 2152 2153 pci_set_master(pci); 2153 - pci_read_config_byte(pci, PCI_REVISION_ID, &cmdb); 2154 - ensoniq->rev = cmdb; 2154 + ensoniq->rev = pci->revision; 2155 2155 #ifdef CHIP1370 2156 2156 #if 0 2157 2157 ensoniq->ctrl = ES_1370_CDC_EN | ES_1370_SERR_DISABLE |
+1 -3
sound/pci/fm801.c
··· 1369 1369 struct fm801 ** rchip) 1370 1370 { 1371 1371 struct fm801 *chip; 1372 - unsigned char rev; 1373 1372 int err; 1374 1373 static struct snd_device_ops ops = { 1375 1374 .dev_free = snd_fm801_dev_free, ··· 1404 1405 pci_set_master(pci); 1405 1406 } 1406 1407 1407 - pci_read_config_byte(pci, PCI_REVISION_ID, &rev); 1408 - if (rev >= 0xb1) /* FM801-AU */ 1408 + if (pci->revision >= 0xb1) /* FM801-AU */ 1409 1409 chip->multichannel = 1; 1410 1410 1411 1411 snd_fm801_chip_init(chip, 0);
+6 -8
sound/pci/via82xx.c
··· 2431 2431 { 2432 2432 struct snd_card *card; 2433 2433 struct via82xx *chip; 2434 - unsigned char revision; 2435 2434 int chip_type = 0, card_type; 2436 2435 unsigned int i; 2437 2436 int err; ··· 2440 2441 return -ENOMEM; 2441 2442 2442 2443 card_type = pci_id->driver_data; 2443 - pci_read_config_byte(pci, PCI_REVISION_ID, &revision); 2444 2444 switch (card_type) { 2445 2445 case TYPE_CARD_VIA686: 2446 2446 strcpy(card->driver, "VIA686A"); 2447 - sprintf(card->shortname, "VIA 82C686A/B rev%x", revision); 2447 + sprintf(card->shortname, "VIA 82C686A/B rev%x", pci->revision); 2448 2448 chip_type = TYPE_VIA686; 2449 2449 break; 2450 2450 case TYPE_CARD_VIA8233: 2451 2451 chip_type = TYPE_VIA8233; 2452 - sprintf(card->shortname, "VIA 823x rev%x", revision); 2452 + sprintf(card->shortname, "VIA 823x rev%x", pci->revision); 2453 2453 for (i = 0; i < ARRAY_SIZE(via823x_cards); i++) { 2454 - if (revision == via823x_cards[i].revision) { 2454 + if (pci->revision == via823x_cards[i].revision) { 2455 2455 chip_type = via823x_cards[i].type; 2456 2456 strcpy(card->shortname, via823x_cards[i].name); 2457 2457 break; ··· 2458 2460 } 2459 2461 if (chip_type != TYPE_VIA8233A) { 2460 2462 if (dxs_support == VIA_DXS_AUTO) 2461 - dxs_support = check_dxs_list(pci, revision); 2463 + dxs_support = check_dxs_list(pci, pci->revision); 2462 2464 /* force to use VIA8233 or 8233A model according to 2463 2465 * dxs_support module option 2464 2466 */ ··· 2469 2471 } 2470 2472 if (chip_type == TYPE_VIA8233A) 2471 2473 strcpy(card->driver, "VIA8233A"); 2472 - else if (revision >= VIA_REV_8237) 2474 + else if (pci->revision >= VIA_REV_8237) 2473 2475 strcpy(card->driver, "VIA8237"); /* no slog assignment */ 2474 2476 else 2475 2477 strcpy(card->driver, "VIA8233"); ··· 2480 2482 goto __error; 2481 2483 } 2482 2484 2483 - if ((err = snd_via82xx_create(card, pci, chip_type, revision, 2485 + if ((err = snd_via82xx_create(card, pci, chip_type, pci->revision, 2484 2486 ac97_clock, &chip)) < 0) 2485 2487 goto __error; 2486 2488 card->private_data = chip;
+1 -3
sound/pci/via82xx_modem.c
··· 1162 1162 { 1163 1163 struct snd_card *card; 1164 1164 struct via82xx_modem *chip; 1165 - unsigned char revision; 1166 1165 int chip_type = 0, card_type; 1167 1166 unsigned int i; 1168 1167 int err; ··· 1171 1172 return -ENOMEM; 1172 1173 1173 1174 card_type = pci_id->driver_data; 1174 - pci_read_config_byte(pci, PCI_REVISION_ID, &revision); 1175 1175 switch (card_type) { 1176 1176 case TYPE_CARD_VIA82XX_MODEM: 1177 1177 strcpy(card->driver, "VIA82XX-MODEM"); ··· 1182 1184 goto __error; 1183 1185 } 1184 1186 1185 - if ((err = snd_via82xx_create(card, pci, chip_type, revision, 1187 + if ((err = snd_via82xx_create(card, pci, chip_type, pci->revision, 1186 1188 ac97_clock, &chip)) < 0) 1187 1189 goto __error; 1188 1190 card->private_data = chip;
+1 -1
sound/pci/ymfpci/ymfpci_main.c
··· 2404 2404 chip->pci = pci; 2405 2405 chip->irq = -1; 2406 2406 chip->device_id = pci->device; 2407 - pci_read_config_byte(pci, PCI_REVISION_ID, &chip->rev); 2407 + chip->rev = pci->revision; 2408 2408 chip->reg_area_phys = pci_resource_start(pci, 0); 2409 2409 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000); 2410 2410 pci_set_master(pci);