Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'aspeed-5.11-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt

ASPEED device tree updates for 5.11

- New machines

* Bytedance G220A, an AST2500 BMC for an x86 server
* Facebook Galaxy100, an AST2400 BMC for a network switch
* IBM Rainier 4U, an AST2600 BMC for a PowerPC server

- Reworking of Facebook device trees to use common dtsi

- A 64MB flash layout used by the G220A

- Misc updates to tiogapass, ethanolx, s2600wf, tacoma and rainier

* tag 'aspeed-5.11-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: (25 commits)
ARM: dts: aspeed: ast2600evb: Add MAC0
ARM: dts: aspeed: rainier: Don't shout addresses
ARM: dts: aspeed: rainier: Mark FSI SPI controllers as restricted
ARM: dts: tacoma: Add reserved memory for ramoops
ARM: dts: rainier: Add reserved memory for ramoops
ARM: dts: tacoma: Fix node vs reg mismatch for flash memory
ARM: dts: aspeed: rainier: Add 4U device-tree
arm: dts: aspeed: tiogapass: Enable second MAC
ARM: dts: aspeed: minipack: Fixup I2C tree
ARM: dts: aspeed: wedge400: Fix FMC flash0 layout
ARM: dts: aspeed: Add Facebook Galaxy100 (AST2400) BMC
ARM: dts: aspeed: wedge100: Use common dtsi
ARM: dts: aspeed: wedge40: Use common dtsi
ARM: dts: aspeed: Common dtsi for Facebook AST2400 Network BMCs
ARM: dts: aspeed: amd-ethanolx: Add GPIO line names
ARM: dts: aspeed: amd-ethanolx: Enable devices for the iKVM functionality
ARM: dts: aspeed: amd-ethanolx: Enable KCS channel 3
ARM: dts: aspeed: tiogapass: Remove vuart
ARM: dts: Fix label address for 64MiB OpenBMC flash layout
ARM: dts: aspeed: g220a: Add some gpios
...

Link: https://lore.kernel.org/r/CACPK8Xfd7AmuEaUdFfYLu4ktcrpTnYUgwQSxUbC-McB02hvo_g@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+2216 -247
+3
arch/arm/boot/dts/Makefile
··· 1404 1404 aspeed-bmc-amd-ethanolx.dtb \ 1405 1405 aspeed-bmc-arm-centriq2400-rep.dtb \ 1406 1406 aspeed-bmc-arm-stardragon4800-rep2.dtb \ 1407 + aspeed-bmc-bytedance-g220a.dtb \ 1407 1408 aspeed-bmc-facebook-cmm.dtb \ 1409 + aspeed-bmc-facebook-galaxy100.dtb \ 1408 1410 aspeed-bmc-facebook-minipack.dtb \ 1409 1411 aspeed-bmc-facebook-tiogapass.dtb \ 1410 1412 aspeed-bmc-facebook-wedge40.dtb \ ··· 1415 1413 aspeed-bmc-facebook-yamp.dtb \ 1416 1414 aspeed-bmc-facebook-yosemitev2.dtb \ 1417 1415 aspeed-bmc-ibm-rainier.dtb \ 1416 + aspeed-bmc-ibm-rainier-4u.dtb \ 1418 1417 aspeed-bmc-intel-s2600wf.dtb \ 1419 1418 aspeed-bmc-inspur-fp5280g2.dtb \ 1420 1419 aspeed-bmc-lenovo-hr630.dtb \
+20
arch/arm/boot/dts/aspeed-ast2600-evb.dts
··· 23 23 }; 24 24 }; 25 25 26 + &mdio0 { 27 + status = "okay"; 28 + 29 + ethphy0: ethernet-phy@0 { 30 + compatible = "ethernet-phy-ieee802.3-c22"; 31 + reg = <0>; 32 + }; 33 + }; 34 + 26 35 &mdio1 { 27 36 status = "okay"; 28 37 ··· 58 49 reg = <0>; 59 50 }; 60 51 }; 52 + 53 + &mac0 { 54 + status = "okay"; 55 + 56 + phy-mode = "rgmii"; 57 + phy-handle = <&ethphy0>; 58 + 59 + pinctrl-names = "default"; 60 + pinctrl-0 = <&pinctrl_rgmii1_default>; 61 + }; 62 + 61 63 62 64 &mac1 { 63 65 status = "okay";
+74 -3
arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
··· 13 13 memory@80000000 { 14 14 reg = <0x80000000 0x20000000>; 15 15 }; 16 + 17 + reserved-memory { 18 + #address-cells = <1>; 19 + #size-cells = <1>; 20 + ranges; 21 + 22 + video_engine_memory: jpegbuffer { 23 + size = <0x02000000>; /* 32M */ 24 + alignment = <0x01000000>; 25 + compatible = "shared-dma-pool"; 26 + reusable; 27 + }; 28 + }; 29 + 30 + 16 31 aliases { 17 32 serial0 = &uart1; 18 33 serial4 = &uart5; ··· 97 82 &pinctrl_adc4_default>; 98 83 }; 99 84 85 + &gpio { 86 + status = "okay"; 87 + gpio-line-names = 88 + /*A0-A7*/ "","","FAULT_LED","CHASSIS_ID_LED","","","","", 89 + /*B0-B7*/ "","","","","","","","", 90 + /*C0-C7*/ "CHASSIS_ID_BTN","INTRUDER","AC_LOSS","","","","","", 91 + /*D0-D7*/ "HDT_DBREQ","LOCAL_SPI_ROM_SEL","FPGA_SPI_ROM_SEL","JTAG_MUX_S", 92 + "JTAG_MUX_OE","HDT_SEL","ASERT_WARM_RST_BTN","FPGA_RSVD", 93 + /*E0-E7*/ "","","MON_P0_PWR_BTN","MON_P0_RST_BTN","MON_P0_NMI_BTN", 94 + "MON_P0_PWR_GOOD","MON_PWROK","MON_RESET", 95 + /*F0-F7*/ "MON_P0_PROCHOT","MON_P1_PROCHOT","MON_P0_THERMTRIP", 96 + "MON_P1_THERMTRIP","P0_PRESENT","P1_PRESENT","MON_ATX_PWR_OK","", 97 + /*G0-G7*/ "BRD_REV_ID_3","BRD_REV_ID_2","BRD_REV_ID_1","BRD_REV_ID_0", 98 + "P0_APML_ALERT","P1_APML_ALERT","FPGA ALERT","", 99 + /*H0-H7*/ "BRD_ID_0","BRD_ID_1","BRD_ID_2","BRD_ID_3", 100 + "PCIE_DISCONNECTED","USB_DISCONNECTED","SPARE_0","SPARE_1", 101 + /*I0-I7*/ "","","","","","","","", 102 + /*J0-J7*/ "","","","","","","","", 103 + /*K0-K7*/ "","","","","","","","", 104 + /*L0-L7*/ "","","","","","","","", 105 + /*M0-M7*/ "ASSERT_PWR_BTN","ASSERT_RST_BTN","ASSERT_NMI_BTN", 106 + "ASSERT_LOCAL_LOCK","ASSERT_P0_PROCHOT","ASSERT_P1_PROCHOT", 107 + "ASSERT_CLR_CMOS","ASSERT_BMC_READY", 108 + /*N0-N7*/ "","","","","","","","", 109 + /*O0-O7*/ "","","","","","","","", 110 + /*P0-P7*/ "P0_VDD_CORE_RUN_VRHOT","P0_VDD_SOC_RUN_VRHOT", 111 + "P0_VDD_MEM_ABCD_SUS_VRHOT","P0_VDD_MEM_EFGH_SUS_VRHOT", 112 + "P1_VDD_CORE_RUN_VRHOT","P1_VDD_SOC_RUN_VRHOT", 113 + "P1_VDD_MEM_ABCD_SUS_VRHOT","P1_VDD_MEM_EFGH_SUS_VRHOT", 114 + /*Q0-Q7*/ "","","","","","","","", 115 + /*R0-R7*/ "","","","","","","","", 116 + /*S0-S7*/ "","","","","","","","", 117 + /*T0-T7*/ "","","","","","","","", 118 + /*U0-U7*/ "","","","","","","","", 119 + /*V0-V7*/ "","","","","","","","", 120 + /*W0-W7*/ "","","","","","","","", 121 + /*X0-X7*/ "","","","","","","","", 122 + /*Y0-Y7*/ "","","","","","","","", 123 + /*Z0-Z7*/ "","","","","","","","", 124 + /*AA0-AA7*/ "","SENSOR THERM","","","","","","", 125 + /*AB0-AB7*/ "","","","","","","","", 126 + /*AC0-AC7*/ "","","","","","","",""; 127 + }; 128 + 100 129 //APML for P0 101 130 &i2c0 { 102 131 status = "okay"; ··· 198 139 199 140 &kcs1 { 200 141 status = "okay"; 201 - kcs_addr = <0x60>; 142 + aspeed,lpc-io-reg = <0x60>; 202 143 }; 203 144 204 145 &kcs2 { 205 146 status = "okay"; 206 - kcs_addr = <0x62>; 147 + aspeed,lpc-io-reg = <0x62>; 148 + }; 149 + 150 + &kcs3 { 151 + status = "okay"; 152 + aspeed,lpc-io-reg = <0xCA2>; 207 153 }; 208 154 209 155 &kcs4 { 210 156 status = "okay"; 211 - kcs_addr = <0x97DE>; 157 + aspeed,lpc-io-reg = <0x97DE>; 212 158 }; 213 159 214 160 &lpc_snoop { ··· 279 215 }; 280 216 }; 281 217 218 + &video { 219 + status = "okay"; 220 + memory-region = <&video_engine_memory>; 221 + }; 282 222 223 + &vhub { 224 + status = "okay"; 225 + }; 283 226
+924
arch/arm/boot/dts/aspeed-bmc-bytedance-g220a.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0+ 2 + // Copyright (C) 2020 Bytedance. 3 + /dts-v1/; 4 + 5 + #include "aspeed-g5.dtsi" 6 + #include <dt-bindings/gpio/aspeed-gpio.h> 7 + #include <dt-bindings/i2c/i2c.h> 8 + #include <dt-bindings/leds/leds-pca955x.h> 9 + 10 + / { 11 + model = "Bytedance G220A BMC"; 12 + compatible = "bytedance,g220a-bmc", "aspeed,ast2500"; 13 + 14 + aliases { 15 + serial4 = &uart5; 16 + i2c14 = &channel_3_0; 17 + i2c15 = &channel_3_1; 18 + i2c16 = &channel_3_2; 19 + i2c17 = &channel_3_3; 20 + i2c18 = &channel_6_0; 21 + i2c19 = &channel_6_1; 22 + i2c20 = &channel_6_2; 23 + i2c21 = &channel_6_3; 24 + i2c22 = &channel_6_4; 25 + i2c23 = &channel_6_5; 26 + i2c24 = &channel_6_6; 27 + i2c25 = &channel_6_7; 28 + i2c26 = &channel_6_8; 29 + i2c27 = &channel_6_9; 30 + i2c28 = &channel_6_10; 31 + i2c29 = &channel_6_11; 32 + i2c30 = &channel_6_12; 33 + i2c31 = &channel_6_13; 34 + i2c32 = &channel_6_14; 35 + i2c33 = &channel_6_15; 36 + i2c34 = &channel_6_16; 37 + i2c35 = &channel_6_17; 38 + i2c36 = &channel_6_18; 39 + i2c37 = &channel_6_19; 40 + i2c38 = &channel_6_20; 41 + i2c39 = &channel_6_21; 42 + i2c40 = &channel_6_22; 43 + i2c41 = &channel_6_23; 44 + i2c42 = &channel_6_24; 45 + i2c43 = &channel_6_25; 46 + i2c44 = &channel_10_0; 47 + i2c45 = &channel_10_1; 48 + i2c46 = &channel_10_2; 49 + i2c47 = &channel_10_3; 50 + i2c48 = &channel_10_4; 51 + i2c49 = &channel_10_5; 52 + i2c50 = &channel_10_6; 53 + i2c51 = &channel_10_7; 54 + }; 55 + 56 + chosen { 57 + stdout-path = &uart5; 58 + bootargs = "console=ttyS4,115200 earlyprintk"; 59 + }; 60 + 61 + memory@80000000 { 62 + reg = <0x80000000 0x40000000>; 63 + }; 64 + 65 + reserved-memory { 66 + #address-cells = <1>; 67 + #size-cells = <1>; 68 + ranges; 69 + 70 + vga_memory: framebuffer@bc000000 { 71 + no-map; 72 + reg = <0xbc000000 0x04000000>; /* 64M */ 73 + }; 74 + 75 + video_engine_memory: jpegbuffer { 76 + size = <0x02000000>; /* 32M */ 77 + alignment = <0x01000000>; 78 + compatible = "shared-dma-pool"; 79 + reusable; 80 + }; 81 + }; 82 + 83 + iio-hwmon { 84 + compatible = "iio-hwmon"; 85 + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, 86 + <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>, 87 + <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>, 88 + <&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>; 89 + }; 90 + 91 + leds { 92 + compatible = "gpio-leds"; 93 + bmc_alive { 94 + label = "bmc_alive"; 95 + gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>; 96 + linux,default-trigger = "timer"; 97 + led-pattern = <1000 1000>; 98 + }; 99 + }; 100 + 101 + gpio-keys { 102 + compatible = "gpio-keys"; 103 + burn-in-signal { 104 + label = "burn-in"; 105 + gpios = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_LOW>; 106 + linux,code = <ASPEED_GPIO(R, 5)>; 107 + }; 108 + }; 109 + 110 + gpio-keys-polled { 111 + compatible = "gpio-keys-polled"; 112 + poll-interval = <1000>; 113 + 114 + rear-riser1-presence { 115 + label = "rear-riser1-presence"; 116 + gpios = <&pca0 1 GPIO_ACTIVE_LOW>; 117 + linux,code = <1>; 118 + }; 119 + 120 + alrt-pvddq-cpu0 { 121 + label = "alrt-pvddq-cpu0"; 122 + gpios = <&pca0 8 GPIO_ACTIVE_LOW>; 123 + linux,code = <2>; 124 + }; 125 + 126 + rear-riser0-presence { 127 + label = "rear-riser0-presence"; 128 + gpios = <&pca0 9 GPIO_ACTIVE_LOW>; 129 + linux,code = <3>; 130 + }; 131 + 132 + fault-pvddq-cpu0 { 133 + label = "fault-pvddq-cpu0"; 134 + gpios = <&pca0 10 GPIO_ACTIVE_LOW>; 135 + linux,code = <4>; 136 + }; 137 + 138 + alrt-pvddq-cpu1 { 139 + label = "alrt-pvddq-cpu1"; 140 + gpios = <&pca0 11 GPIO_ACTIVE_LOW>; 141 + linux,code = <5>; 142 + }; 143 + 144 + fault-pvddq-cpu1 { 145 + label = "alrt-pvddq-cpu1"; 146 + gpios = <&pca0 12 GPIO_ACTIVE_LOW>; 147 + linux,code = <6>; 148 + }; 149 + 150 + fault-pvccin-cpu1 { 151 + label = "fault-pvccin-cpuq"; 152 + gpios = <&pca0 13 GPIO_ACTIVE_LOW>; 153 + linux,code = <7>; 154 + }; 155 + 156 + bmc-rom0-wp { 157 + label = "bmc-rom0-wp"; 158 + gpios = <&pca1 0 GPIO_ACTIVE_LOW>; 159 + linux,code = <8>; 160 + }; 161 + 162 + bmc-rom1-wp { 163 + label = "bmc-rom1-wp"; 164 + gpios = <&pca1 1 GPIO_ACTIVE_LOW>; 165 + linux,code = <9>; 166 + }; 167 + 168 + fan0-presence { 169 + label = "fan0-presence"; 170 + gpios = <&pca1 2 GPIO_ACTIVE_LOW>; 171 + linux,code = <10>; 172 + }; 173 + 174 + fan1-presence { 175 + label = "fan1-presence"; 176 + gpios = <&pca1 3 GPIO_ACTIVE_LOW>; 177 + linux,code = <11>; 178 + }; 179 + 180 + fan2-presence { 181 + label = "fan2-presence"; 182 + gpios = <&pca1 4 GPIO_ACTIVE_LOW>; 183 + linux,code = <12>; 184 + }; 185 + 186 + fan3-presence { 187 + label = "fan3-presence"; 188 + gpios = <&pca1 5 GPIO_ACTIVE_LOW>; 189 + linux,code = <13>; 190 + }; 191 + 192 + fan4-presence { 193 + label = "fan4-presence"; 194 + gpios = <&pca1 6 GPIO_ACTIVE_LOW>; 195 + linux,code = <14>; 196 + }; 197 + 198 + fan5-presence { 199 + label = "fan5-presence"; 200 + gpios = <&pca1 7 GPIO_ACTIVE_LOW>; 201 + linux,code = <15>; 202 + }; 203 + 204 + front-bp1-presence { 205 + label = "front-bp1-presence"; 206 + gpios = <&pca1 8 GPIO_ACTIVE_LOW>; 207 + linux,code = <16>; 208 + }; 209 + 210 + rear-bp-presence { 211 + label = "rear-bp-presence"; 212 + gpios = <&pca1 9 GPIO_ACTIVE_LOW>; 213 + linux,code = <17>; 214 + }; 215 + 216 + fault-pvccin-cpu0 { 217 + label = "fault-pvccin-cpu0"; 218 + gpios = <&pca1 10 GPIO_ACTIVE_LOW>; 219 + linux,code = <18>; 220 + }; 221 + 222 + alrt-p1v05-pvcc { 223 + label = "alrt-p1v05-pvcc1"; 224 + gpios = <&pca1 11 GPIO_ACTIVE_LOW>; 225 + linux,code = <19>; 226 + }; 227 + 228 + fault-p1v05-pvccio { 229 + label = "alrt-p1v05-pvcc1"; 230 + gpios = <&pca1 12 GPIO_ACTIVE_LOW>; 231 + linux,code = <20>; 232 + }; 233 + 234 + alrt-p1v8-pvccio { 235 + label = "alrt-p1v8-pvccio"; 236 + gpios = <&pca1 13 GPIO_ACTIVE_LOW>; 237 + linux,code = <21>; 238 + }; 239 + 240 + fault-p1v8-pvccio { 241 + label = "fault-p1v8-pvccio"; 242 + gpios = <&pca1 14 GPIO_ACTIVE_LOW>; 243 + linux,code = <22>; 244 + }; 245 + 246 + front-bp0-presence { 247 + label = "front-bp0-presence"; 248 + gpios = <&pca1 15 GPIO_ACTIVE_LOW>; 249 + linux,code = <23>; 250 + }; 251 + }; 252 + }; 253 + 254 + &fmc { 255 + status = "okay"; 256 + flash@0 { 257 + status = "okay"; 258 + label = "bmc"; 259 + m25p,fast-read; 260 + spi-max-frequency = <50000000>; 261 + #include "openbmc-flash-layout-64.dtsi" 262 + }; 263 + }; 264 + 265 + &spi1 { 266 + status = "okay"; 267 + pinctrl-names = "default"; 268 + pinctrl-0 = <&pinctrl_spi1_default>; 269 + flash@0 { 270 + status = "okay"; 271 + m25p,fast-read; 272 + label = "bios"; 273 + spi-max-frequency = <100000000>; 274 + }; 275 + }; 276 + 277 + &adc { 278 + status = "okay"; 279 + }; 280 + 281 + &gpio { 282 + status = "okay"; 283 + gpio-line-names = 284 + /*A0-A7*/ "SMRST_OCP_N","MAC2_LINK","BMC_CPLD_SMB_RST_R_N","BMC_CPLD_GPIO0", 285 + "","","","", 286 + /*B0-B7*/ "BMC_INIT_R_OK","FM_BOARD_REV_ID2","FM_PROJECT_ID7","FAULT_P12V_STBY_N", 287 + "","CPU0_PROCHOT_LVT3_N","","BIOS_LOAD_DEFAULT_R_N", 288 + /*C0-C7*/ "","","","","","","","", 289 + /*D0-D7*/ "","","","","","","","", 290 + /*E0-E7*/ "FM_PROJECT_ID0","FM_PROJECT_ID1","FM_PROJECT_ID2","FM_PROJECT_ID3", 291 + "FM_PROJECT_ID4","FM_PROJECT_ID5","","", 292 + /*F0-F7*/ "PSU0_PRSNT_N","PSU1_PRSNT_N","","FAULT_P12V_NVME_N", 293 + "BIOS_DEBUG_MODE_R_N","DISABLE_CPU_DDR_R_SPD","COOLING_STRATEGY", 294 + "PCH_GLB_RST_N", 295 + /*G0-G7*/ "P12V_PMBUS_ALERT_N","CPLD_ALERT_N","BMC_RELOAD_N", 296 + "P12V_PVDDQ_PMBUS_ALERT_N","BMC_JTAG_TCK_MUX_R_SEL","","NMI_OUT", 297 + "NMI_BUTTON", 298 + /*H0-H7*/ "BMC_CPLD_JTAG_TDI","BMC_CPLD_JTAG_TDO","BMC_CPLD_JTAG_TCK", 299 + "BMC_CPLD_JTAG_TMS","FM_PROJECT_ID6","FM_BOARD_REV_ID0", 300 + "PCA9546_U70_RST_N","IRQ_SML0_ALERT_N", 301 + /*I0-I7*/ "FAULT_FRONT_RISER_P12V_N","FAULT_OCP_P12V_N","FM_BMC_PCH_SCI_R_N", 302 + "","","","","", 303 + /*J0-J7*/ "FM_CPU0_SKTOCC_N","FM_CPU1_SKTOCC_N","FM_CPU1_DISABLE_COD_N", 304 + "","","","","", 305 + /*K0-K7*/ "","","","","","","","", 306 + /*L0-L7*/ "P12V_FAULT_N","PWRGD_P12V_PCIE_RISER","","LEAKAGE_DETECT_INPUT_N", 307 + "","IRQ_SML1_PMBUS_ALERT_N","","", 308 + /*M0-M7*/ "","","","","","","","", 309 + /*N0-N7*/ "","","","","","","","", 310 + /*O0-O7*/ "","","","","","","","", 311 + /*P0-P7*/ "","","","","","","","", 312 + /*Q0-Q7*/ "","","","","","","FM_PCH_THERMTRIP_N","CHASSIS_INTRUSION", 313 + /*R0-R7*/ "","PVCCIN_CPU1_SMBALERT_N","BMC_PREQ_R_N","FAULT_P12V_PCIE_RISER_N", 314 + "ALT_P12V_PCIE_RISER_N","BURN_BOARD_N","PVCCIN_CPU0_SMBALERT_N","", 315 + /*S0-S7*/ "BMC_PRDY_N","SIO_POWER_GOOD","FM_BMC_PWR_DEBUG_R_N", 316 + "FM_BMC_XDP_DEBUG_EN","","STRAP_BMC_BATTERY_GPIOS5","","", 317 + /*T0-T7*/ "","","","","","","","", 318 + /*U0-U7*/ "","","","","","","","", 319 + /*V0-V7*/ "","","","","","","","", 320 + /*W0-W7*/ "","","","","","","","", 321 + /*X0-X7*/ "","","","","","","","", 322 + /*Y0-Y7*/ "","PWRGD_PSU0_PWROK","CPU1_PROCHOT_LVT3_N","IRQ_BMC_PCH_SMI_LPC_N", 323 + "","","","", 324 + /*Z0-Z7*/ "XDP_PRSNT_N","BMC_XDP_SYS_PWROK","BMC_XDP_JTAG_SEL", 325 + "PCH_BMC_SMI_ACTIVE_R_N","","","","", 326 + /*AA0-AA7*/ "PWRGD_P12V_STBY_OCP","PS_PWROK","RST_PLTRST_BMC_R_N","HDA_SDO_R", 327 + "FM_SLPS4_R_N","PWRGD_PSU1_PWROK","POWER_BUTTON","POWER_OUT", 328 + /*AB0-AB7*/ "","RESET_OUT","SPI_BIOS_MODE_SELECT","POST_COMPLETE","","","","", 329 + /*AC0-AC7*/ "","","","","","","","CPLD_PLTRST_B_N"; 330 + }; 331 + 332 + &kcs3 { 333 + aspeed,lpc-io-reg = <0xCA2>; 334 + status = "okay"; 335 + }; 336 + 337 + &kcs4 { 338 + aspeed,lpc-io-reg = <0xCA4>; 339 + status = "okay"; 340 + }; 341 + 342 + &lpc_snoop { 343 + snoop-ports = <0x80>; 344 + status = "okay"; 345 + }; 346 + 347 + &uart1 { 348 + status = "okay"; 349 + pinctrl-names = "default"; 350 + pinctrl-0 = <&pinctrl_txd1_default 351 + &pinctrl_rxd1_default 352 + &pinctrl_nrts1_default 353 + &pinctrl_ndtr1_default 354 + &pinctrl_ndsr1_default 355 + &pinctrl_ncts1_default 356 + &pinctrl_ndcd1_default 357 + &pinctrl_nri1_default>; 358 + }; 359 + 360 + &uart2 { 361 + status = "okay"; 362 + pinctrl-names = "default"; 363 + pinctrl-0 = <&pinctrl_txd2_default 364 + &pinctrl_rxd2_default 365 + &pinctrl_nrts2_default 366 + &pinctrl_ndtr2_default 367 + &pinctrl_ndsr2_default 368 + &pinctrl_ncts2_default 369 + &pinctrl_ndcd2_default 370 + &pinctrl_nri2_default>; 371 + }; 372 + 373 + &uart3 { 374 + status = "okay"; 375 + }; 376 + 377 + &uart4 { 378 + status = "okay"; 379 + }; 380 + 381 + &uart5 { 382 + status = "okay"; 383 + }; 384 + 385 + &mac0 { 386 + status = "okay"; 387 + pinctrl-names = "default"; 388 + pinctrl-0 = <&pinctrl_rmii1_default>; 389 + clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>, 390 + <&syscon ASPEED_CLK_MAC1RCLK>; 391 + clock-names = "MACCLK", "RCLK"; 392 + use-ncsi; 393 + }; 394 + 395 + &mac1 { 396 + status = "okay"; 397 + pinctrl-names = "default"; 398 + pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; 399 + }; 400 + 401 + &i2c0 { 402 + status = "okay"; 403 + }; 404 + 405 + &i2c1 { 406 + status = "okay"; 407 + }; 408 + 409 + &i2c2 { 410 + status = "okay"; 411 + }; 412 + 413 + &i2c3 { 414 + status = "okay"; 415 + i2c-switch@70 { 416 + compatible = "nxp,pca9546"; 417 + reg = <0x70>; 418 + #address-cells = <1>; 419 + #size-cells = <0>; 420 + 421 + channel_3_0: i2c@0 { 422 + #address-cells = <1>; 423 + #size-cells = <0>; 424 + reg = <0>; 425 + }; 426 + 427 + channel_3_1: i2c@1 { 428 + #address-cells = <1>; 429 + #size-cells = <0>; 430 + reg = <1>; 431 + }; 432 + 433 + channel_3_2: i2c@2 { 434 + #address-cells = <1>; 435 + #size-cells = <0>; 436 + reg = <2>; 437 + }; 438 + 439 + channel_3_3: i2c@3 { 440 + #address-cells = <1>; 441 + #size-cells = <0>; 442 + reg = <3>; 443 + }; 444 + }; 445 + }; 446 + 447 + &i2c4 { 448 + status = "okay"; 449 + 450 + }; 451 + 452 + &i2c5 { 453 + status = "okay"; 454 + }; 455 + 456 + &i2c6 { 457 + status = "okay"; 458 + i2c-switch@72 { 459 + compatible = "nxp,pca9548"; 460 + reg = <0x72>; 461 + #address-cells = <1>; 462 + #size-cells = <0>; 463 + channel_6_0: i2c@0 { 464 + #address-cells = <1>; 465 + #size-cells = <0>; 466 + reg = <0>; 467 + }; 468 + 469 + channel_6_1: i2c@1 { 470 + #address-cells = <1>; 471 + #size-cells = <0>; 472 + reg = <1>; 473 + }; 474 + 475 + channel_6_2: i2c@2 { 476 + #address-cells = <1>; 477 + #size-cells = <0>; 478 + reg = <2>; 479 + }; 480 + 481 + channel_6_3: i2c@3 { 482 + #address-cells = <1>; 483 + #size-cells = <0>; 484 + reg = <3>; 485 + }; 486 + channel_6_4: i2c@4 { 487 + #address-cells = <1>; 488 + #size-cells = <0>; 489 + reg = <4>; 490 + }; 491 + 492 + channel_6_5: i2c@5 { 493 + #address-cells = <1>; 494 + #size-cells = <0>; 495 + reg = <5>; 496 + }; 497 + 498 + channel_6_6: i2c@6 { 499 + #address-cells = <1>; 500 + #size-cells = <0>; 501 + reg = <6>; 502 + }; 503 + 504 + channel_6_7: i2c@7 { 505 + #address-cells = <1>; 506 + #size-cells = <0>; 507 + reg = <7>; 508 + }; 509 + }; 510 + 511 + i2c-switch@70 { 512 + compatible = "nxp,pca9546"; 513 + reg = <0x70>; 514 + #address-cells = <1>; 515 + #size-cells = <0>; 516 + channel_6_8: i2c@0 { 517 + #address-cells = <1>; 518 + #size-cells = <0>; 519 + reg = <0>; 520 + i2c-switch@71 { 521 + compatible = "nxp,pca9546"; 522 + reg = <0x71>; 523 + #address-cells = <1>; 524 + #size-cells = <0>; 525 + channel_6_12: i2c@0 { 526 + #address-cells = <1>; 527 + #size-cells = <0>; 528 + reg = <0>; 529 + 530 + }; 531 + 532 + channel_6_13: i2c@1 { 533 + #address-cells = <1>; 534 + #size-cells = <0>; 535 + reg = <1>; 536 + }; 537 + 538 + channel_6_14: i2c@2 { 539 + #address-cells = <1>; 540 + #size-cells = <0>; 541 + reg = <2>; 542 + }; 543 + 544 + channel_6_15: i2c@3 { 545 + #address-cells = <1>; 546 + #size-cells = <0>; 547 + reg = <3>; 548 + }; 549 + }; 550 + }; 551 + 552 + channel_6_9: i2c@1 { 553 + #address-cells = <1>; 554 + #size-cells = <0>; 555 + reg = <1>; 556 + i2c-switch@71 { 557 + compatible = "nxp,pca9546"; 558 + reg = <0x71>; 559 + #address-cells = <1>; 560 + #size-cells = <0>; 561 + channel_6_16: i2c@0 { 562 + #address-cells = <1>; 563 + #size-cells = <0>; 564 + reg = <0>; 565 + 566 + }; 567 + 568 + channel_6_17: i2c@1 { 569 + #address-cells = <1>; 570 + #size-cells = <0>; 571 + reg = <1>; 572 + }; 573 + 574 + channel_6_18: i2c@2 { 575 + #address-cells = <1>; 576 + #size-cells = <0>; 577 + reg = <2>; 578 + }; 579 + 580 + channel_6_19: i2c@3 { 581 + #address-cells = <1>; 582 + #size-cells = <0>; 583 + reg = <3>; 584 + }; 585 + }; 586 + }; 587 + 588 + channel_6_10: i2c@2 { 589 + #address-cells = <1>; 590 + #size-cells = <0>; 591 + reg = <2>; 592 + i2c-switch@71 { 593 + compatible = "nxp,pca9546"; 594 + reg = <0x71>; 595 + #address-cells = <1>; 596 + #size-cells = <0>; 597 + channel_6_20: i2c@0 { 598 + #address-cells = <1>; 599 + #size-cells = <0>; 600 + reg = <0>; 601 + }; 602 + 603 + channel_6_21: i2c@1 { 604 + #address-cells = <1>; 605 + #size-cells = <0>; 606 + reg = <1>; 607 + }; 608 + 609 + channel_6_22: i2c@2 { 610 + #address-cells = <1>; 611 + #size-cells = <0>; 612 + reg = <2>; 613 + }; 614 + 615 + channel_6_23: i2c@3 { 616 + #address-cells = <1>; 617 + #size-cells = <0>; 618 + reg = <3>; 619 + }; 620 + }; 621 + }; 622 + 623 + channel_6_11: i2c@3 { 624 + #address-cells = <1>; 625 + #size-cells = <0>; 626 + reg = <3>; 627 + i2c-switch@71 { 628 + compatible = "nxp,pca9546"; 629 + reg = <0x71>; 630 + #address-cells = <1>; 631 + #size-cells = <0>; 632 + channel_6_24: i2c@0 { 633 + #address-cells = <1>; 634 + #size-cells = <0>; 635 + reg = <0>; 636 + }; 637 + 638 + channel_6_25: i2c@1 { 639 + #address-cells = <1>; 640 + #size-cells = <0>; 641 + reg = <1>; 642 + }; 643 + }; 644 + }; 645 + }; 646 + }; 647 + 648 + &i2c7 { 649 + status = "okay"; 650 + }; 651 + 652 + &i2c8 { 653 + status = "okay"; 654 + pca0:pca9555@24 { 655 + compatible = "nxp,pca9555"; 656 + reg = <0x24>; 657 + #address-cells = <1>; 658 + #size-cells = <0>; 659 + 660 + gpio-controller; 661 + #gpio-cells = <2>; 662 + gpio@1 { 663 + reg = <1>; 664 + type = <PCA955X_TYPE_GPIO>; 665 + }; 666 + 667 + gpio@8 { 668 + reg = <8>; 669 + type = <PCA955X_TYPE_GPIO>; 670 + }; 671 + 672 + gpio@9 { 673 + reg = <9>; 674 + type = <PCA955X_TYPE_GPIO>; 675 + }; 676 + 677 + gpio@10 { 678 + reg = <10>; 679 + type = <PCA955X_TYPE_GPIO>; 680 + }; 681 + 682 + gpio@11 { 683 + reg = <11>; 684 + type = <PCA955X_TYPE_GPIO>; 685 + }; 686 + 687 + gpio@12 { 688 + reg = <12>; 689 + type = <PCA955X_TYPE_GPIO>; 690 + }; 691 + 692 + gpio@13 { 693 + reg = <13>; 694 + type = <PCA955X_TYPE_GPIO>; 695 + }; 696 + }; 697 + 698 + pca1:pca9555@25 { 699 + compatible = "nxp,pca9555"; 700 + reg = <0x25>; 701 + 702 + #address-cells = <1>; 703 + #size-cells = <0>; 704 + 705 + gpio-controller; 706 + #gpio-cells = <2>; 707 + 708 + gpio@0 { 709 + reg = <0>; 710 + type = <PCA955X_TYPE_GPIO>; 711 + }; 712 + 713 + gpio@1 { 714 + reg = <1>; 715 + type = <PCA955X_TYPE_GPIO>; 716 + }; 717 + 718 + gpio@2 { 719 + reg = <2>; 720 + type = <PCA955X_TYPE_GPIO>; 721 + }; 722 + 723 + gpio@3 { 724 + reg = <3>; 725 + type = <PCA955X_TYPE_GPIO>; 726 + }; 727 + 728 + gpio@4 { 729 + reg = <4>; 730 + type = <PCA955X_TYPE_GPIO>; 731 + }; 732 + 733 + gpio@5 { 734 + reg = <5>; 735 + type = <PCA955X_TYPE_GPIO>; 736 + }; 737 + 738 + gpio@6 { 739 + reg = <6>; 740 + type = <PCA955X_TYPE_GPIO>; 741 + }; 742 + 743 + gpio@7 { 744 + reg = <7>; 745 + type = <PCA955X_TYPE_GPIO>; 746 + }; 747 + gpio@8 { 748 + reg = <8>; 749 + type = <PCA955X_TYPE_GPIO>; 750 + }; 751 + 752 + gpio@9 { 753 + reg = <9>; 754 + type = <PCA955X_TYPE_GPIO>; 755 + }; 756 + 757 + gpio@10 { 758 + reg = <10>; 759 + type = <PCA955X_TYPE_GPIO>; 760 + }; 761 + 762 + gpio@11 { 763 + reg = <11>; 764 + type = <PCA955X_TYPE_GPIO>; 765 + }; 766 + 767 + gpio@12 { 768 + reg = <12>; 769 + type = <PCA955X_TYPE_GPIO>; 770 + }; 771 + 772 + gpio@13 { 773 + reg = <13>; 774 + type = <PCA955X_TYPE_GPIO>; 775 + }; 776 + 777 + gpio@14 { 778 + reg = <14>; 779 + type = <PCA955X_TYPE_GPIO>; 780 + }; 781 + 782 + gpio@15 { 783 + reg = <15>; 784 + type = <PCA955X_TYPE_GPIO>; 785 + }; 786 + }; 787 + }; 788 + 789 + &i2c9 { 790 + status = "okay"; 791 + }; 792 + 793 + &i2c10 { 794 + status = "okay"; 795 + i2c-switch@70 { 796 + compatible = "nxp,pca9546"; 797 + reg = <0x70>; 798 + #address-cells = <1>; 799 + #size-cells = <0>; 800 + channel_10_0: i2c@0 { 801 + #address-cells = <1>; 802 + #size-cells = <0>; 803 + reg = <0>; 804 + }; 805 + 806 + channel_10_1: i2c@1 { 807 + #address-cells = <1>; 808 + #size-cells = <0>; 809 + reg = <1>; 810 + }; 811 + 812 + channel_10_2: i2c@2 { 813 + #address-cells = <1>; 814 + #size-cells = <0>; 815 + reg = <2>; 816 + }; 817 + 818 + channel_10_3: i2c@3 { 819 + #address-cells = <1>; 820 + #size-cells = <0>; 821 + reg = <3>; 822 + }; 823 + }; 824 + 825 + i2c-switch@71 { 826 + compatible = "nxp,pca9546"; 827 + reg = <0x71>; 828 + #address-cells = <1>; 829 + #size-cells = <0>; 830 + channel_10_4: i2c@0 { 831 + #address-cells = <1>; 832 + #size-cells = <0>; 833 + reg = <0>; 834 + }; 835 + 836 + channel_10_5: i2c@1 { 837 + #address-cells = <1>; 838 + #size-cells = <0>; 839 + reg = <1>; 840 + }; 841 + 842 + channel_10_6: i2c@2 { 843 + #address-cells = <1>; 844 + #size-cells = <0>; 845 + reg = <2>; 846 + }; 847 + 848 + channel_10_7: i2c@3 { 849 + #address-cells = <1>; 850 + #size-cells = <0>; 851 + reg = <3>; 852 + }; 853 + }; 854 + }; 855 + 856 + &i2c11 { 857 + status = "okay"; 858 + }; 859 + 860 + &i2c12 { 861 + status = "okay"; 862 + }; 863 + 864 + &i2c13 { 865 + status = "okay"; 866 + }; 867 + 868 + &pwm_tacho { 869 + status = "okay"; 870 + pinctrl-names = "default"; 871 + pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default 872 + &pinctrl_pwm2_default &pinctrl_pwm3_default 873 + &pinctrl_pwm4_default &pinctrl_pwm5_default>; 874 + 875 + fan@0 { 876 + reg = <0x00>; 877 + aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>; 878 + }; 879 + fan@1 { 880 + reg = <0x01>; 881 + aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>; 882 + }; 883 + fan@2 { 884 + reg = <0x02>; 885 + aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>; 886 + }; 887 + fan@3 { 888 + reg = <0x03>; 889 + aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>; 890 + }; 891 + fan@4 { 892 + reg = <0x04>; 893 + aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>; 894 + }; 895 + fan@5 { 896 + reg = <0x05>; 897 + aspeed,fan-tach-ch = /bits/ 8 <0x0a 0x0b>; 898 + }; 899 + }; 900 + 901 + &gpio { 902 + pin_gpio_i3 { 903 + gpio-hog; 904 + gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_LOW>; 905 + output-low; 906 + line-name = "NCSI_BMC_R_SEL"; 907 + }; 908 + 909 + pin_gpio_b6 { 910 + gpio-hog; 911 + gpios = <ASPEED_GPIO(B, 6) GPIO_ACTIVE_LOW>; 912 + output-low; 913 + line-name = "EN_NCSI_SWITCH_N"; 914 + }; 915 + }; 916 + 917 + &video { 918 + status = "okay"; 919 + memory-region = <&video_engine_memory>; 920 + }; 921 + 922 + &vhub { 923 + status = "okay"; 924 + };
+57
arch/arm/boot/dts/aspeed-bmc-facebook-galaxy100.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0+ 2 + // Copyright (c) 2020 Facebook Inc. 3 + /dts-v1/; 4 + 5 + #include "ast2400-facebook-netbmc-common.dtsi" 6 + 7 + / { 8 + model = "Facebook Galaxy 100 BMC"; 9 + compatible = "facebook,galaxy100-bmc", "aspeed,ast2400"; 10 + 11 + chosen { 12 + stdout-path = &uart5; 13 + bootargs = "console=ttyS0,9600n8 root=/dev/ram rw"; 14 + }; 15 + 16 + ast-adc-hwmon { 17 + compatible = "iio-hwmon"; 18 + io-channels = <&adc 3>, <&adc 4>, <&adc 8>, <&adc 9>; 19 + }; 20 + }; 21 + 22 + &wdt2 { 23 + status = "okay"; 24 + aspeed,reset-type = "system"; 25 + }; 26 + 27 + &fmc { 28 + flash@1 { 29 + status = "okay"; 30 + m25p,fast-read; 31 + label = "spi0.1"; 32 + 33 + partitions { 34 + compatible = "fixed-partitions"; 35 + #address-cells = <1>; 36 + #size-cells = <1>; 37 + 38 + flash1@0 { 39 + reg = <0x0 0x2000000>; 40 + label = "flash1"; 41 + }; 42 + }; 43 + }; 44 + }; 45 + 46 + 47 + &i2c9 { 48 + status = "okay"; 49 + }; 50 + 51 + &vhub { 52 + status = "okay"; 53 + }; 54 + 55 + &adc { 56 + status = "okay"; 57 + };
+888
arch/arm/boot/dts/aspeed-bmc-facebook-minipack.dts
··· 70 70 i2c45 = &imux45; 71 71 i2c46 = &imux46; 72 72 i2c47 = &imux47; 73 + 74 + /* 75 + * I2C Switch 24-0071 (channel #0 of 8-0070): 8 channels for 76 + * connecting to left PDB (Power Distribution Board). 77 + */ 78 + i2c48 = &imux48; 79 + i2c49 = &imux49; 80 + i2c50 = &imux50; 81 + i2c51 = &imux51; 82 + i2c52 = &imux52; 83 + i2c53 = &imux53; 84 + i2c54 = &imux54; 85 + i2c55 = &imux55; 86 + 87 + /* 88 + * I2C Switch 25-0072 (channel #1 of 8-0070): 8 channels for 89 + * connecting to right PDB (Power Distribution Board). 90 + */ 91 + i2c56 = &imux56; 92 + i2c57 = &imux57; 93 + i2c58 = &imux58; 94 + i2c59 = &imux59; 95 + i2c60 = &imux60; 96 + i2c61 = &imux61; 97 + i2c62 = &imux62; 98 + i2c63 = &imux63; 99 + 100 + /* 101 + * I2C Switch 26-0076 (channel #2 of 8-0070): 8 channels for 102 + * connecting to top FCM (Fan Control Module). 103 + */ 104 + i2c64 = &imux64; 105 + i2c65 = &imux65; 106 + i2c66 = &imux66; 107 + i2c67 = &imux67; 108 + i2c68 = &imux68; 109 + i2c69 = &imux69; 110 + i2c70 = &imux70; 111 + i2c71 = &imux71; 112 + 113 + /* 114 + * I2C Switch 27-0076 (channel #3 of 8-0070): 8 channels for 115 + * connecting to bottom FCM (Fan Control Module). 116 + */ 117 + i2c72 = &imux72; 118 + i2c73 = &imux73; 119 + i2c74 = &imux74; 120 + i2c75 = &imux75; 121 + i2c76 = &imux76; 122 + i2c77 = &imux77; 123 + i2c78 = &imux78; 124 + i2c79 = &imux79; 125 + 126 + /* 127 + * I2C Switch 40-0073 (channel #0 of 11-0070): connecting 128 + * to PIM (Port Interface Module) #1 (1-based). 129 + */ 130 + i2c80 = &imux80; 131 + i2c81 = &imux81; 132 + i2c82 = &imux82; 133 + i2c83 = &imux83; 134 + i2c84 = &imux84; 135 + i2c85 = &imux85; 136 + i2c86 = &imux86; 137 + i2c87 = &imux87; 138 + 139 + /* 140 + * I2C Switch 41-0073 (channel #1 of 11-0070): connecting 141 + * to PIM (Port Interface Module) #2 (1-based). 142 + */ 143 + i2c88 = &imux88; 144 + i2c89 = &imux89; 145 + i2c90 = &imux90; 146 + i2c91 = &imux91; 147 + i2c92 = &imux92; 148 + i2c93 = &imux93; 149 + i2c94 = &imux94; 150 + i2c95 = &imux95; 151 + 152 + /* 153 + * I2C Switch 42-0073 (channel #2 of 11-0070): connecting 154 + * to PIM (Port Interface Module) #3 (1-based). 155 + */ 156 + i2c96 = &imux96; 157 + i2c97 = &imux97; 158 + i2c98 = &imux98; 159 + i2c99 = &imux99; 160 + i2c100 = &imux100; 161 + i2c101 = &imux101; 162 + i2c102 = &imux102; 163 + i2c103 = &imux103; 164 + 165 + /* 166 + * I2C Switch 43-0073 (channel #3 of 11-0070): connecting 167 + * to PIM (Port Interface Module) #4 (1-based). 168 + */ 169 + i2c104 = &imux104; 170 + i2c105 = &imux105; 171 + i2c106 = &imux106; 172 + i2c107 = &imux107; 173 + i2c108 = &imux108; 174 + i2c109 = &imux109; 175 + i2c110 = &imux110; 176 + i2c111 = &imux111; 177 + 178 + /* 179 + * I2C Switch 44-0073 (channel #4 of 11-0070): connecting 180 + * to PIM (Port Interface Module) #5 (1-based). 181 + */ 182 + i2c112 = &imux112; 183 + i2c113 = &imux113; 184 + i2c114 = &imux114; 185 + i2c115 = &imux115; 186 + i2c116 = &imux116; 187 + i2c117 = &imux117; 188 + i2c118 = &imux118; 189 + i2c119 = &imux119; 190 + 191 + /* 192 + * I2C Switch 45-0073 (channel #5 of 11-0070): connecting 193 + * to PIM (Port Interface Module) #6 (1-based). 194 + */ 195 + i2c120 = &imux120; 196 + i2c121 = &imux121; 197 + i2c122 = &imux122; 198 + i2c123 = &imux123; 199 + i2c124 = &imux124; 200 + i2c125 = &imux125; 201 + i2c126 = &imux126; 202 + i2c127 = &imux127; 203 + 204 + /* 205 + * I2C Switch 46-0073 (channel #6 of 11-0070): connecting 206 + * to PIM (Port Interface Module) #7 (1-based). 207 + */ 208 + i2c128 = &imux128; 209 + i2c129 = &imux129; 210 + i2c130 = &imux130; 211 + i2c131 = &imux131; 212 + i2c132 = &imux132; 213 + i2c133 = &imux133; 214 + i2c134 = &imux134; 215 + i2c135 = &imux135; 216 + 217 + /* 218 + * I2C Switch 47-0073 (channel #7 of 11-0070): connecting 219 + * to PIM (Port Interface Module) #8 (1-based). 220 + */ 221 + i2c136 = &imux136; 222 + i2c137 = &imux137; 223 + i2c138 = &imux138; 224 + i2c139 = &imux139; 225 + i2c140 = &imux140; 226 + i2c141 = &imux141; 227 + i2c142 = &imux142; 228 + i2c143 = &imux143; 73 229 }; 74 230 75 231 chosen { ··· 340 184 &i2c2 { 341 185 status = "okay"; 342 186 187 + /* 188 + * I2C Switch 2-0070 is connecting to SCM (System Controller 189 + * Module). 190 + */ 343 191 i2c-switch@70 { 344 192 compatible = "nxp,pca9548"; 345 193 #address-cells = <1>; 346 194 #size-cells = <0>; 347 195 reg = <0x70>; 196 + i2c-mux-idle-disconnect; 348 197 349 198 imux16: i2c@0 { 350 199 #address-cells = <1>; ··· 430 269 #address-cells = <1>; 431 270 #size-cells = <0>; 432 271 reg = <0x70>; 272 + i2c-mux-idle-disconnect; 433 273 274 + /* 275 + * I2C Switch 8-0070 channel #0: connecting to left PDB 276 + * (Power Distribution Board). 277 + */ 434 278 imux24: i2c@0 { 435 279 #address-cells = <1>; 436 280 #size-cells = <0>; 437 281 reg = <0>; 282 + 283 + i2c-switch@71 { 284 + compatible = "nxp,pca9548"; 285 + #address-cells = <1>; 286 + #size-cells = <0>; 287 + reg = <0x71>; 288 + i2c-mux-idle-disconnect; 289 + 290 + imux48: i2c@0 { 291 + #address-cells = <1>; 292 + #size-cells = <0>; 293 + reg = <0>; 294 + }; 295 + 296 + imux49: i2c@1 { 297 + #address-cells = <1>; 298 + #size-cells = <0>; 299 + reg = <1>; 300 + }; 301 + 302 + imux50: i2c@2 { 303 + #address-cells = <1>; 304 + #size-cells = <0>; 305 + reg = <2>; 306 + }; 307 + 308 + imux51: i2c@3 { 309 + #address-cells = <1>; 310 + #size-cells = <0>; 311 + reg = <3>; 312 + }; 313 + 314 + imux52: i2c@4 { 315 + #address-cells = <1>; 316 + #size-cells = <0>; 317 + reg = <4>; 318 + }; 319 + 320 + imux53: i2c@5 { 321 + #address-cells = <1>; 322 + #size-cells = <0>; 323 + reg = <5>; 324 + }; 325 + 326 + imux54: i2c@6 { 327 + #address-cells = <1>; 328 + #size-cells = <0>; 329 + reg = <6>; 330 + }; 331 + 332 + imux55: i2c@7 { 333 + #address-cells = <1>; 334 + #size-cells = <0>; 335 + reg = <7>; 336 + }; 337 + }; 438 338 }; 439 339 340 + /* 341 + * I2C Switch 8-0070 channel #1: connecting to right PDB 342 + * (Power Distribution Board). 343 + */ 440 344 imux25: i2c@1 { 441 345 #address-cells = <1>; 442 346 #size-cells = <0>; 443 347 reg = <1>; 348 + 349 + i2c-switch@72 { 350 + compatible = "nxp,pca9548"; 351 + #address-cells = <1>; 352 + #size-cells = <0>; 353 + reg = <0x72>; 354 + i2c-mux-idle-disconnect; 355 + 356 + imux56: i2c@0 { 357 + #address-cells = <1>; 358 + #size-cells = <0>; 359 + reg = <0>; 360 + }; 361 + 362 + imux57: i2c@1 { 363 + #address-cells = <1>; 364 + #size-cells = <0>; 365 + reg = <1>; 366 + }; 367 + 368 + imux58: i2c@2 { 369 + #address-cells = <1>; 370 + #size-cells = <0>; 371 + reg = <2>; 372 + }; 373 + 374 + imux59: i2c@3 { 375 + #address-cells = <1>; 376 + #size-cells = <0>; 377 + reg = <3>; 378 + }; 379 + 380 + imux60: i2c@4 { 381 + #address-cells = <1>; 382 + #size-cells = <0>; 383 + reg = <4>; 384 + }; 385 + 386 + imux61: i2c@5 { 387 + #address-cells = <1>; 388 + #size-cells = <0>; 389 + reg = <5>; 390 + }; 391 + 392 + imux62: i2c@6 { 393 + #address-cells = <1>; 394 + #size-cells = <0>; 395 + reg = <6>; 396 + }; 397 + 398 + imux63: i2c@7 { 399 + #address-cells = <1>; 400 + #size-cells = <0>; 401 + reg = <7>; 402 + }; 403 + }; 444 404 }; 445 405 406 + /* 407 + * I2C Switch 8-0070 channel #2: connecting to top FCM 408 + * (Fan Control Module). 409 + */ 446 410 imux26: i2c@2 { 447 411 #address-cells = <1>; 448 412 #size-cells = <0>; 449 413 reg = <2>; 414 + 415 + i2c-switch@76 { 416 + compatible = "nxp,pca9548"; 417 + #address-cells = <1>; 418 + #size-cells = <0>; 419 + reg = <0x76>; 420 + i2c-mux-idle-disconnect; 421 + 422 + imux64: i2c@0 { 423 + #address-cells = <1>; 424 + #size-cells = <0>; 425 + reg = <0>; 426 + }; 427 + 428 + imux65: i2c@1 { 429 + #address-cells = <1>; 430 + #size-cells = <0>; 431 + reg = <1>; 432 + }; 433 + 434 + imux66: i2c@2 { 435 + #address-cells = <1>; 436 + #size-cells = <0>; 437 + reg = <2>; 438 + }; 439 + 440 + imux67: i2c@3 { 441 + #address-cells = <1>; 442 + #size-cells = <0>; 443 + reg = <3>; 444 + }; 445 + 446 + imux68: i2c@4 { 447 + #address-cells = <1>; 448 + #size-cells = <0>; 449 + reg = <4>; 450 + }; 451 + 452 + imux69: i2c@5 { 453 + #address-cells = <1>; 454 + #size-cells = <0>; 455 + reg = <5>; 456 + }; 457 + 458 + imux70: i2c@6 { 459 + #address-cells = <1>; 460 + #size-cells = <0>; 461 + reg = <6>; 462 + }; 463 + 464 + imux71: i2c@7 { 465 + #address-cells = <1>; 466 + #size-cells = <0>; 467 + reg = <7>; 468 + }; 469 + }; 450 470 }; 451 471 472 + /* 473 + * I2C Switch 8-0070 channel #3: connecting to bottom 474 + * FCM (Fan Control Module). 475 + */ 452 476 imux27: i2c@3 { 453 477 #address-cells = <1>; 454 478 #size-cells = <0>; 455 479 reg = <3>; 480 + 481 + i2c-switch@76 { 482 + compatible = "nxp,pca9548"; 483 + #address-cells = <1>; 484 + #size-cells = <0>; 485 + reg = <0x76>; 486 + i2c-mux-idle-disconnect; 487 + 488 + imux72: i2c@0 { 489 + #address-cells = <1>; 490 + #size-cells = <0>; 491 + reg = <0>; 492 + }; 493 + 494 + imux73: i2c@1 { 495 + #address-cells = <1>; 496 + #size-cells = <0>; 497 + reg = <1>; 498 + }; 499 + 500 + imux74: i2c@2 { 501 + #address-cells = <1>; 502 + #size-cells = <0>; 503 + reg = <2>; 504 + }; 505 + 506 + imux75: i2c@3 { 507 + #address-cells = <1>; 508 + #size-cells = <0>; 509 + reg = <3>; 510 + }; 511 + 512 + imux76: i2c@4 { 513 + #address-cells = <1>; 514 + #size-cells = <0>; 515 + reg = <4>; 516 + }; 517 + 518 + imux77: i2c@5 { 519 + #address-cells = <1>; 520 + #size-cells = <0>; 521 + reg = <5>; 522 + }; 523 + 524 + imux78: i2c@6 { 525 + #address-cells = <1>; 526 + #size-cells = <0>; 527 + reg = <6>; 528 + }; 529 + 530 + imux79: i2c@7 { 531 + #address-cells = <1>; 532 + #size-cells = <0>; 533 + reg = <7>; 534 + }; 535 + }; 456 536 }; 457 537 458 538 imux28: i2c@4 { ··· 725 323 &i2c9 { 726 324 status = "okay"; 727 325 326 + /* 327 + * I2C Switch 9-0070 is connecting to MAC/PHY EEPROMs on SMB 328 + * (Switch Main Board). 329 + */ 728 330 i2c-switch@70 { 729 331 compatible = "nxp,pca9548"; 730 332 #address-cells = <1>; 731 333 #size-cells = <0>; 732 334 reg = <0x70>; 335 + i2c-mux-idle-disconnect; 733 336 734 337 imux32: i2c@0 { 735 338 #address-cells = <1>; ··· 798 391 #address-cells = <1>; 799 392 #size-cells = <0>; 800 393 reg = <0x70>; 394 + i2c-mux-idle-disconnect; 801 395 396 + /* 397 + * I2C Switch 11-0070 channel #0: connecting to PIM 398 + * (Port Interface Module) #1 (1-based). 399 + */ 802 400 imux40: i2c@0 { 803 401 #address-cells = <1>; 804 402 #size-cells = <0>; 805 403 reg = <0>; 404 + 405 + i2c-switch@73 { 406 + compatible = "nxp,pca9548"; 407 + #address-cells = <1>; 408 + #size-cells = <0>; 409 + reg = <0x73>; 410 + i2c-mux-idle-disconnect; 411 + 412 + imux80: i2c@0 { 413 + #address-cells = <1>; 414 + #size-cells = <0>; 415 + reg = <0>; 416 + }; 417 + 418 + imux81: i2c@1 { 419 + #address-cells = <1>; 420 + #size-cells = <0>; 421 + reg = <1>; 422 + }; 423 + 424 + imux82: i2c@2 { 425 + #address-cells = <1>; 426 + #size-cells = <0>; 427 + reg = <2>; 428 + }; 429 + 430 + imux83: i2c@3 { 431 + #address-cells = <1>; 432 + #size-cells = <0>; 433 + reg = <3>; 434 + }; 435 + 436 + imux84: i2c@4 { 437 + #address-cells = <1>; 438 + #size-cells = <0>; 439 + reg = <4>; 440 + }; 441 + 442 + imux85: i2c@5 { 443 + #address-cells = <1>; 444 + #size-cells = <0>; 445 + reg = <5>; 446 + }; 447 + 448 + imux86: i2c@6 { 449 + #address-cells = <1>; 450 + #size-cells = <0>; 451 + reg = <6>; 452 + }; 453 + 454 + imux87: i2c@7 { 455 + #address-cells = <1>; 456 + #size-cells = <0>; 457 + reg = <7>; 458 + }; 459 + }; 806 460 }; 807 461 462 + /* 463 + * I2C Switch 11-0070 channel #1: connecting to PIM 464 + * (Port Interface Module) #2 (1-based). 465 + */ 808 466 imux41: i2c@1 { 809 467 #address-cells = <1>; 810 468 #size-cells = <0>; 811 469 reg = <1>; 470 + 471 + i2c-switch@73 { 472 + compatible = "nxp,pca9548"; 473 + #address-cells = <1>; 474 + #size-cells = <0>; 475 + reg = <0x73>; 476 + i2c-mux-idle-disconnect; 477 + 478 + imux88: i2c@0 { 479 + #address-cells = <1>; 480 + #size-cells = <0>; 481 + reg = <0>; 482 + }; 483 + 484 + imux89: i2c@1 { 485 + #address-cells = <1>; 486 + #size-cells = <0>; 487 + reg = <1>; 488 + }; 489 + 490 + imux90: i2c@2 { 491 + #address-cells = <1>; 492 + #size-cells = <0>; 493 + reg = <2>; 494 + }; 495 + 496 + imux91: i2c@3 { 497 + #address-cells = <1>; 498 + #size-cells = <0>; 499 + reg = <3>; 500 + }; 501 + 502 + imux92: i2c@4 { 503 + #address-cells = <1>; 504 + #size-cells = <0>; 505 + reg = <4>; 506 + }; 507 + 508 + imux93: i2c@5 { 509 + #address-cells = <1>; 510 + #size-cells = <0>; 511 + reg = <5>; 512 + }; 513 + 514 + imux94: i2c@6 { 515 + #address-cells = <1>; 516 + #size-cells = <0>; 517 + reg = <6>; 518 + }; 519 + 520 + imux95: i2c@7 { 521 + #address-cells = <1>; 522 + #size-cells = <0>; 523 + reg = <7>; 524 + }; 525 + }; 812 526 }; 813 527 528 + /* 529 + * I2C Switch 11-0070 channel #2: connecting to PIM 530 + * (Port Interface Module) #3 (1-based). 531 + */ 814 532 imux42: i2c@2 { 815 533 #address-cells = <1>; 816 534 #size-cells = <0>; 817 535 reg = <2>; 536 + 537 + i2c-switch@73 { 538 + compatible = "nxp,pca9548"; 539 + #address-cells = <1>; 540 + #size-cells = <0>; 541 + reg = <0x73>; 542 + i2c-mux-idle-disconnect; 543 + 544 + imux96: i2c@0 { 545 + #address-cells = <1>; 546 + #size-cells = <0>; 547 + reg = <0>; 548 + }; 549 + 550 + imux97: i2c@1 { 551 + #address-cells = <1>; 552 + #size-cells = <0>; 553 + reg = <1>; 554 + }; 555 + 556 + imux98: i2c@2 { 557 + #address-cells = <1>; 558 + #size-cells = <0>; 559 + reg = <2>; 560 + }; 561 + 562 + imux99: i2c@3 { 563 + #address-cells = <1>; 564 + #size-cells = <0>; 565 + reg = <3>; 566 + }; 567 + 568 + imux100: i2c@4 { 569 + #address-cells = <1>; 570 + #size-cells = <0>; 571 + reg = <4>; 572 + }; 573 + 574 + imux101: i2c@5 { 575 + #address-cells = <1>; 576 + #size-cells = <0>; 577 + reg = <5>; 578 + }; 579 + 580 + imux102: i2c@6 { 581 + #address-cells = <1>; 582 + #size-cells = <0>; 583 + reg = <6>; 584 + }; 585 + 586 + imux103: i2c@7 { 587 + #address-cells = <1>; 588 + #size-cells = <0>; 589 + reg = <7>; 590 + }; 591 + }; 818 592 }; 819 593 594 + /* 595 + * I2C Switch 11-0070 channel #3: connecting to PIM 596 + * (Port Interface Module) #4 (1-based). 597 + */ 820 598 imux43: i2c@3 { 821 599 #address-cells = <1>; 822 600 #size-cells = <0>; 823 601 reg = <3>; 602 + 603 + i2c-switch@73 { 604 + compatible = "nxp,pca9548"; 605 + #address-cells = <1>; 606 + #size-cells = <0>; 607 + reg = <0x73>; 608 + i2c-mux-idle-disconnect; 609 + 610 + imux104: i2c@0 { 611 + #address-cells = <1>; 612 + #size-cells = <0>; 613 + reg = <0>; 614 + }; 615 + 616 + imux105: i2c@1 { 617 + #address-cells = <1>; 618 + #size-cells = <0>; 619 + reg = <1>; 620 + }; 621 + 622 + imux106: i2c@2 { 623 + #address-cells = <1>; 624 + #size-cells = <0>; 625 + reg = <2>; 626 + }; 627 + 628 + imux107: i2c@3 { 629 + #address-cells = <1>; 630 + #size-cells = <0>; 631 + reg = <3>; 632 + }; 633 + 634 + imux108: i2c@4 { 635 + #address-cells = <1>; 636 + #size-cells = <0>; 637 + reg = <4>; 638 + }; 639 + 640 + imux109: i2c@5 { 641 + #address-cells = <1>; 642 + #size-cells = <0>; 643 + reg = <5>; 644 + }; 645 + 646 + imux110: i2c@6 { 647 + #address-cells = <1>; 648 + #size-cells = <0>; 649 + reg = <6>; 650 + }; 651 + 652 + imux111: i2c@7 { 653 + #address-cells = <1>; 654 + #size-cells = <0>; 655 + reg = <7>; 656 + }; 657 + }; 824 658 }; 825 659 660 + /* 661 + * I2C Switch 11-0070 channel #4: connecting to PIM 662 + * (Port Interface Module) #5 (1-based). 663 + */ 826 664 imux44: i2c@4 { 827 665 #address-cells = <1>; 828 666 #size-cells = <0>; 829 667 reg = <4>; 668 + 669 + i2c-switch@73 { 670 + compatible = "nxp,pca9548"; 671 + #address-cells = <1>; 672 + #size-cells = <0>; 673 + reg = <0x73>; 674 + i2c-mux-idle-disconnect; 675 + 676 + imux112: i2c@0 { 677 + #address-cells = <1>; 678 + #size-cells = <0>; 679 + reg = <0>; 680 + }; 681 + 682 + imux113: i2c@1 { 683 + #address-cells = <1>; 684 + #size-cells = <0>; 685 + reg = <1>; 686 + }; 687 + 688 + imux114: i2c@2 { 689 + #address-cells = <1>; 690 + #size-cells = <0>; 691 + reg = <2>; 692 + }; 693 + 694 + imux115: i2c@3 { 695 + #address-cells = <1>; 696 + #size-cells = <0>; 697 + reg = <3>; 698 + }; 699 + 700 + imux116: i2c@4 { 701 + #address-cells = <1>; 702 + #size-cells = <0>; 703 + reg = <4>; 704 + }; 705 + 706 + imux117: i2c@5 { 707 + #address-cells = <1>; 708 + #size-cells = <0>; 709 + reg = <5>; 710 + }; 711 + 712 + imux118: i2c@6 { 713 + #address-cells = <1>; 714 + #size-cells = <0>; 715 + reg = <6>; 716 + }; 717 + 718 + imux119: i2c@7 { 719 + #address-cells = <1>; 720 + #size-cells = <0>; 721 + reg = <7>; 722 + }; 723 + }; 830 724 }; 831 725 726 + /* 727 + * I2C Switch 11-0070 channel #5: connecting to PIM 728 + * (Port Interface Module) #6 (1-based). 729 + */ 832 730 imux45: i2c@5 { 833 731 #address-cells = <1>; 834 732 #size-cells = <0>; 835 733 reg = <5>; 734 + 735 + i2c-switch@73 { 736 + compatible = "nxp,pca9548"; 737 + #address-cells = <1>; 738 + #size-cells = <0>; 739 + reg = <0x73>; 740 + i2c-mux-idle-disconnect; 741 + 742 + imux120: i2c@0 { 743 + #address-cells = <1>; 744 + #size-cells = <0>; 745 + reg = <0>; 746 + }; 747 + 748 + imux121: i2c@1 { 749 + #address-cells = <1>; 750 + #size-cells = <0>; 751 + reg = <1>; 752 + }; 753 + 754 + imux122: i2c@2 { 755 + #address-cells = <1>; 756 + #size-cells = <0>; 757 + reg = <2>; 758 + }; 759 + 760 + imux123: i2c@3 { 761 + #address-cells = <1>; 762 + #size-cells = <0>; 763 + reg = <3>; 764 + }; 765 + 766 + imux124: i2c@4 { 767 + #address-cells = <1>; 768 + #size-cells = <0>; 769 + reg = <4>; 770 + }; 771 + 772 + imux125: i2c@5 { 773 + #address-cells = <1>; 774 + #size-cells = <0>; 775 + reg = <5>; 776 + }; 777 + 778 + imux126: i2c@6 { 779 + #address-cells = <1>; 780 + #size-cells = <0>; 781 + reg = <6>; 782 + }; 783 + 784 + imux127: i2c@7 { 785 + #address-cells = <1>; 786 + #size-cells = <0>; 787 + reg = <7>; 788 + }; 789 + }; 836 790 }; 837 791 792 + /* 793 + * I2C Switch 11-0070 channel #6: connecting to PIM 794 + * (Port Interface Module) #7 (1-based). 795 + */ 838 796 imux46: i2c@6 { 839 797 #address-cells = <1>; 840 798 #size-cells = <0>; 841 799 reg = <6>; 800 + 801 + i2c-switch@73 { 802 + compatible = "nxp,pca9548"; 803 + #address-cells = <1>; 804 + #size-cells = <0>; 805 + reg = <0x73>; 806 + i2c-mux-idle-disconnect; 807 + 808 + imux128: i2c@0 { 809 + #address-cells = <1>; 810 + #size-cells = <0>; 811 + reg = <0>; 812 + }; 813 + 814 + imux129: i2c@1 { 815 + #address-cells = <1>; 816 + #size-cells = <0>; 817 + reg = <1>; 818 + }; 819 + 820 + imux130: i2c@2 { 821 + #address-cells = <1>; 822 + #size-cells = <0>; 823 + reg = <2>; 824 + }; 825 + 826 + imux131: i2c@3 { 827 + #address-cells = <1>; 828 + #size-cells = <0>; 829 + reg = <3>; 830 + }; 831 + 832 + imux132: i2c@4 { 833 + #address-cells = <1>; 834 + #size-cells = <0>; 835 + reg = <4>; 836 + }; 837 + 838 + imux133: i2c@5 { 839 + #address-cells = <1>; 840 + #size-cells = <0>; 841 + reg = <5>; 842 + }; 843 + 844 + imux134: i2c@6 { 845 + #address-cells = <1>; 846 + #size-cells = <0>; 847 + reg = <6>; 848 + }; 849 + 850 + imux135: i2c@7 { 851 + #address-cells = <1>; 852 + #size-cells = <0>; 853 + reg = <7>; 854 + }; 855 + }; 842 856 }; 843 857 858 + /* 859 + * I2C Switch 11-0070 channel #7: connecting to PIM 860 + * (Port Interface Module) #8 (1-based). 861 + */ 844 862 imux47: i2c@7 { 845 863 #address-cells = <1>; 846 864 #size-cells = <0>; 847 865 reg = <7>; 866 + 867 + i2c-switch@73 { 868 + compatible = "nxp,pca9548"; 869 + #address-cells = <1>; 870 + #size-cells = <0>; 871 + reg = <0x73>; 872 + i2c-mux-idle-disconnect; 873 + 874 + imux136: i2c@0 { 875 + #address-cells = <1>; 876 + #size-cells = <0>; 877 + reg = <0>; 878 + }; 879 + 880 + imux137: i2c@1 { 881 + #address-cells = <1>; 882 + #size-cells = <0>; 883 + reg = <1>; 884 + }; 885 + 886 + imux138: i2c@2 { 887 + #address-cells = <1>; 888 + #size-cells = <0>; 889 + reg = <2>; 890 + }; 891 + 892 + imux139: i2c@3 { 893 + #address-cells = <1>; 894 + #size-cells = <0>; 895 + reg = <3>; 896 + }; 897 + 898 + imux140: i2c@4 { 899 + #address-cells = <1>; 900 + #size-cells = <0>; 901 + reg = <4>; 902 + }; 903 + 904 + imux141: i2c@5 { 905 + #address-cells = <1>; 906 + #size-cells = <0>; 907 + reg = <5>; 908 + }; 909 + 910 + imux142: i2c@6 { 911 + #address-cells = <1>; 912 + #size-cells = <0>; 913 + reg = <6>; 914 + }; 915 + 916 + imux143: i2c@7 { 917 + #address-cells = <1>; 918 + #size-cells = <0>; 919 + reg = <7>; 920 + }; 921 + }; 848 922 }; 849 923 }; 850 924 };
+8 -5
arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
··· 82 82 status = "okay"; 83 83 }; 84 84 85 - &vuart { 86 - // VUART Host Console 87 - status = "okay"; 88 - }; 89 - 90 85 &uart1 { 91 86 // Host Console 92 87 status = "okay"; ··· 188 193 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>, 189 194 <&syscon ASPEED_CLK_MAC1RCLK>; 190 195 clock-names = "MACCLK", "RCLK"; 196 + use-ncsi; 197 + }; 198 + 199 + &mac1 { 200 + status = "okay"; 201 + 202 + pinctrl-names = "default"; 203 + pinctrl-0 = <&pinctrl_rmii2_default>; 191 204 use-ncsi; 192 205 }; 193 206
+15 -105
arch/arm/boot/dts/aspeed-bmc-facebook-wedge100.dts
··· 2 2 // Copyright (c) 2018 Facebook Inc. 3 3 /dts-v1/; 4 4 5 - #include "aspeed-g4.dtsi" 5 + #include "ast2400-facebook-netbmc-common.dtsi" 6 6 7 7 / { 8 8 model = "Facebook Wedge 100 BMC"; 9 9 compatible = "facebook,wedge100-bmc", "aspeed,ast2400"; 10 10 11 - aliases { 12 - /* 13 - * Override the default uart aliases to avoid breaking 14 - * the legacy applications. 15 - */ 16 - serial0 = &uart5; 17 - serial1 = &uart1; 18 - serial2 = &uart3; 19 - serial3 = &uart4; 20 - }; 21 - 22 11 chosen { 23 12 stdout-path = &uart3; 24 13 bootargs = "console=ttyS2,9600n8 root=/dev/ram rw"; 25 14 }; 26 - 27 - memory@40000000 { 28 - reg = <0x40000000 0x20000000>; 29 - }; 30 - }; 31 - 32 - &wdt1 { 33 - status = "okay"; 34 - aspeed,reset-type = "system"; 35 15 }; 36 16 37 17 &wdt2 { ··· 20 40 }; 21 41 22 42 &fmc { 23 - status = "okay"; 24 - flash@0 { 43 + flash@1 { 25 44 status = "okay"; 26 45 m25p,fast-read; 27 - label = "fmc0"; 28 - #include "facebook-bmc-flash-layout.dtsi" 46 + label = "spi0.1"; 47 + 48 + partitions { 49 + compatible = "fixed-partitions"; 50 + #address-cells = <1>; 51 + #size-cells = <1>; 52 + 53 + flash1@0 { 54 + reg = <0x0 0x2000000>; 55 + label = "flash1"; 56 + }; 57 + }; 29 58 }; 30 59 }; 31 60 32 - &uart1 { 33 - status = "okay"; 34 - pinctrl-names = "default"; 35 - pinctrl-0 = <&pinctrl_txd1_default 36 - &pinctrl_rxd1_default>; 37 - }; 38 - 39 - &uart3 { 40 - status = "okay"; 41 - pinctrl-names = "default"; 42 - pinctrl-0 = <&pinctrl_txd3_default 43 - &pinctrl_rxd3_default>; 44 - }; 45 - 46 - &uart4 { 47 - status = "okay"; 48 - pinctrl-names = "default"; 49 - pinctrl-0 = <&pinctrl_txd4_default 50 - &pinctrl_rxd4_default>; 51 - }; 52 - 53 - &uart5 { 54 - status = "okay"; 55 - }; 56 - 57 - &mac1 { 58 - status = "okay"; 59 - pinctrl-names = "default"; 60 - pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; 61 - }; 62 - 63 - &i2c0 { 64 - status = "okay"; 65 - }; 66 - 67 - &i2c1 { 68 - status = "okay"; 69 - }; 70 - 71 - &i2c2 { 72 - status = "okay"; 73 - }; 74 - 75 - &i2c3 { 76 - status = "okay"; 77 - }; 78 - 79 - &i2c4 { 80 - status = "okay"; 81 - }; 82 - 83 - &i2c5 { 84 - status = "okay"; 85 - }; 86 - 87 - &i2c6 { 88 - status = "okay"; 89 - }; 90 - 91 61 &i2c7 { 92 - status = "okay"; 93 - 94 62 i2c-switch@70 { 95 63 compatible = "nxp,pca9548"; 96 64 #address-cells = <1>; 97 65 #size-cells = <0>; 98 66 reg = <0x70>; 67 + i2c-mux-idle-disconnect; 99 68 }; 100 - }; 101 - 102 - &i2c8 { 103 - status = "okay"; 104 69 }; 105 70 106 71 &i2c9 { 107 72 status = "okay"; 108 73 }; 109 74 110 - &i2c10 { 111 - status = "okay"; 112 - }; 113 - 114 - &i2c11 { 115 - status = "okay"; 116 - }; 117 - 118 - &i2c12 { 119 - status = "okay"; 120 - }; 121 - 122 - &i2c13 { 123 - status = "okay"; 124 - }; 125 75 126 76 &vhub { 127 77 status = "okay";
+1 -111
arch/arm/boot/dts/aspeed-bmc-facebook-wedge40.dts
··· 2 2 // Copyright (c) 2018 Facebook Inc. 3 3 /dts-v1/; 4 4 5 - #include "aspeed-g4.dtsi" 5 + #include "ast2400-facebook-netbmc-common.dtsi" 6 6 7 7 / { 8 8 model = "Facebook Wedge 40 BMC"; 9 9 compatible = "facebook,wedge40-bmc", "aspeed,ast2400"; 10 10 11 - aliases { 12 - /* 13 - * Override the default uart aliases to avoid breaking 14 - * the legacy applications. 15 - */ 16 - serial0 = &uart5; 17 - serial1 = &uart1; 18 - serial2 = &uart3; 19 - serial3 = &uart4; 20 - }; 21 - 22 11 chosen { 23 12 stdout-path = &uart3; 24 13 bootargs = "console=ttyS2,9600n8 root=/dev/ram rw"; 25 - }; 26 - 27 - memory@40000000 { 28 - reg = <0x40000000 0x20000000>; 29 14 }; 30 15 31 16 ast-adc-hwmon { ··· 19 34 }; 20 35 }; 21 36 22 - &wdt1 { 23 - status = "okay"; 24 - aspeed,reset-type = "system"; 25 - }; 26 - 27 37 &wdt2 { 28 38 status = "disabled"; 29 - }; 30 - 31 - &fmc { 32 - status = "okay"; 33 - flash@0 { 34 - status = "okay"; 35 - m25p,fast-read; 36 - label = "spi0.0"; 37 - #include "facebook-bmc-flash-layout.dtsi" 38 - }; 39 - }; 40 - 41 - &uart1 { 42 - status = "okay"; 43 - pinctrl-names = "default"; 44 - pinctrl-0 = <&pinctrl_txd1_default 45 - &pinctrl_rxd1_default>; 46 - }; 47 - 48 - &uart3 { 49 - status = "okay"; 50 - pinctrl-names = "default"; 51 - pinctrl-0 = <&pinctrl_txd3_default 52 - &pinctrl_rxd3_default>; 53 - }; 54 - 55 - &uart4 { 56 - status = "okay"; 57 - pinctrl-names = "default"; 58 - pinctrl-0 = <&pinctrl_txd4_default 59 - &pinctrl_rxd4_default 60 - &pinctrl_ndts4_default>; 61 - }; 62 - 63 - &uart5 { 64 - status = "okay"; 65 - }; 66 - 67 - &mac1 { 68 - status = "okay"; 69 - pinctrl-names = "default"; 70 - pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; 71 - }; 72 - 73 - &i2c0 { 74 - status = "okay"; 75 - }; 76 - 77 - &i2c1 { 78 - status = "okay"; 79 - }; 80 - 81 - &i2c2 { 82 - status = "okay"; 83 - }; 84 - 85 - &i2c3 { 86 - status = "okay"; 87 - }; 88 - 89 - &i2c4 { 90 - status = "okay"; 91 - }; 92 - 93 - &i2c5 { 94 - status = "okay"; 95 - }; 96 - 97 - &i2c6 { 98 - status = "okay"; 99 - }; 100 - 101 - &i2c7 { 102 - status = "okay"; 103 - }; 104 - 105 - &i2c8 { 106 - status = "okay"; 107 - }; 108 - 109 - &i2c11 { 110 - status = "okay"; 111 - }; 112 - 113 - &i2c12 { 114 - status = "okay"; 115 - }; 116 - 117 - &vhub { 118 - status = "okay"; 119 39 }; 120 40 121 41 &adc {
+2 -2
arch/arm/boot/dts/aspeed-bmc-facebook-wedge400.dts
··· 124 124 * "data0" partition (4MB) is reserved for persistent 125 125 * data store. 126 126 */ 127 - data0@3800000 { 128 - reg = <0x7c00000 0x800000>; 127 + data0@7c00000 { 128 + reg = <0x7c00000 0x400000>; 129 129 label = "data0"; 130 130 }; 131 131
+37
arch/arm/boot/dts/aspeed-bmc-ibm-rainier-4u.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + // Copyright 2020 IBM Corp. 3 + /dts-v1/; 4 + 5 + #include "aspeed-bmc-ibm-rainier.dts" 6 + 7 + / { 8 + model = "Rainier 4U"; 9 + }; 10 + 11 + &i2c3 { 12 + power-supply@6a { 13 + compatible = "ibm,cffps"; 14 + reg = <0x6a>; 15 + }; 16 + 17 + power-supply@6b { 18 + compatible = "ibm,cffps"; 19 + reg = <0x6b>; 20 + }; 21 + }; 22 + 23 + &fan0 { 24 + tach-pulses = <4>; 25 + }; 26 + 27 + &fan1 { 28 + tach-pulses = <4>; 29 + }; 30 + 31 + &fan2 { 32 + tach-pulses = <4>; 33 + }; 34 + 35 + &fan3 { 36 + tach-pulses = <4>; 37 + };
+22 -17
arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
··· 8 8 #include <dt-bindings/leds/leds-pca955x.h> 9 9 10 10 / { 11 - model = "Rainier"; 11 + model = "Rainier 2U"; 12 12 compatible = "ibm,rainier-bmc", "aspeed,ast2600"; 13 13 14 14 aliases { ··· 47 47 #size-cells = <1>; 48 48 ranges; 49 49 50 - flash_memory: region@B8000000 { 50 + flash_memory: region@b8000000 { 51 51 no-map; 52 - reg = <0xB8000000 0x04000000>; /* 64M */ 52 + reg = <0xb8000000 0x04000000>; /* 64M */ 53 + }; 54 + 55 + ramoops@bc000000 { 56 + compatible = "ramoops"; 57 + reg = <0xbc000000 0x180000>; /* 16 * (3 * 0x8000) */ 58 + record-size = <0x8000>; 59 + console-size = <0x8000>; 60 + pmsg-size = <0x8000>; 61 + max-reason = <3>; /* KMSG_DUMP_EMERG */ 53 62 }; 54 63 55 64 vga_memory: region@bf000000 { ··· 267 258 268 259 cfam0_spi2: spi@40 { 269 260 reg = <0x40>; 261 + compatible = "ibm,fsi2spi-restricted"; 270 262 #address-cells = <1>; 271 263 #size-cells = <0>; 272 264 ··· 284 274 285 275 cfam0_spi3: spi@60 { 286 276 reg = <0x60>; 277 + compatible = "ibm,fsi2spi-restricted"; 287 278 #address-cells = <1>; 288 279 #size-cells = <0>; 289 280 ··· 381 370 382 371 cfam1_spi2: spi@40 { 383 372 reg = <0x40>; 373 + compatible = "ibm,fsi2spi-restricted"; 384 374 #address-cells = <1>; 385 375 #size-cells = <0>; 386 376 ··· 398 386 399 387 cfam1_spi3: spi@60 { 400 388 reg = <0x60>; 389 + compatible = "ibm,fsi2spi-restricted"; 401 390 #address-cells = <1>; 402 391 #size-cells = <0>; 403 392 ··· 493 480 494 481 cfam2_spi2: spi@40 { 495 482 reg = <0x40>; 483 + compatible = "ibm,fsi2spi-restricted"; 496 484 #address-cells = <1>; 497 485 #size-cells = <0>; 498 486 ··· 510 496 511 497 cfam2_spi3: spi@60 { 512 498 reg = <0x60>; 499 + compatible = "ibm,fsi2spi-restricted"; 513 500 #address-cells = <1>; 514 501 #size-cells = <0>; 515 502 ··· 608 593 power-supply@69 { 609 594 compatible = "ibm,cffps"; 610 595 reg = <0x69>; 611 - }; 612 - 613 - power-supply@6a { 614 - compatible = "ibm,cffps"; 615 - reg = <0x6a>; 616 - }; 617 - 618 - power-supply@6b { 619 - compatible = "ibm,cffps"; 620 - reg = <0x6b>; 621 596 }; 622 597 }; 623 598 ··· 728 723 #address-cells = <1>; 729 724 #size-cells = <0>; 730 725 731 - fan@0 { 726 + fan0: fan@0 { 732 727 compatible = "pmbus-fan"; 733 728 reg = <0>; 734 729 tach-pulses = <2>; 735 730 }; 736 731 737 - fan@1 { 732 + fan1: fan@1 { 738 733 compatible = "pmbus-fan"; 739 734 reg = <1>; 740 735 tach-pulses = <2>; 741 736 }; 742 737 743 - fan@2 { 738 + fan2: fan@2 { 744 739 compatible = "pmbus-fan"; 745 740 reg = <2>; 746 741 tach-pulses = <2>; 747 742 }; 748 743 749 - fan@3 { 744 + fan3: fan@3 { 750 745 compatible = "pmbus-fan"; 751 746 reg = <3>; 752 747 tach-pulses = <2>;
+2 -2
arch/arm/boot/dts/aspeed-bmc-intel-s2600wf.dts
··· 22 22 #size-cells = <1>; 23 23 ranges; 24 24 25 - vga_memory: framebuffer@7f000000 { 25 + vga_memory: framebuffer@9f000000 { 26 26 no-map; 27 - reg = <0x7f000000 0x01000000>; 27 + reg = <0x9f000000 0x01000000>; /* 16M */ 28 28 }; 29 29 }; 30 30
+10 -1
arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts
··· 26 26 #size-cells = <1>; 27 27 ranges; 28 28 29 - flash_memory: region@ba000000 { 29 + flash_memory: region@b8000000 { 30 30 no-map; 31 31 reg = <0xb8000000 0x4000000>; /* 64M */ 32 + }; 33 + 34 + ramoops@bc000000 { 35 + compatible = "ramoops"; 36 + reg = <0xbc000000 0x180000>; /* 16 * (3 * 0x8000) */ 37 + record-size = <0x8000>; 38 + console-size = <0x8000>; 39 + pmsg-size = <0x8000>; 40 + max-reason = <3>; /* KMSG_DUMP_EMERG */ 32 41 }; 33 42 34 43 vga_memory: region@bf000000 {
+1 -1
arch/arm/boot/dts/aspeed-g6.dtsi
··· 357 357 #gpio-cells = <2>; 358 358 gpio-controller; 359 359 compatible = "aspeed,ast2600-gpio"; 360 - reg = <0x1e780000 0x800>; 360 + reg = <0x1e780000 0x400>; 361 361 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 362 362 gpio-ranges = <&pinctrl 0 0 208>; 363 363 ngpios = <208>;
+117
arch/arm/boot/dts/ast2400-facebook-netbmc-common.dtsi
··· 1 + // SPDX-License-Identifier: GPL-2.0+ 2 + // Copyright (c) 2020 Facebook Inc. 3 + /dts-v1/; 4 + 5 + #include "aspeed-g4.dtsi" 6 + 7 + / { 8 + aliases { 9 + /* 10 + * Override the default uart aliases to avoid breaking 11 + * the legacy applications. 12 + */ 13 + serial0 = &uart5; 14 + serial1 = &uart1; 15 + serial2 = &uart3; 16 + serial3 = &uart4; 17 + }; 18 + 19 + memory@40000000 { 20 + reg = <0x40000000 0x20000000>; 21 + }; 22 + }; 23 + 24 + &wdt1 { 25 + status = "okay"; 26 + aspeed,reset-type = "system"; 27 + }; 28 + 29 + &fmc { 30 + status = "okay"; 31 + flash@0 { 32 + status = "okay"; 33 + m25p,fast-read; 34 + label = "spi0.0"; 35 + #include "facebook-bmc-flash-layout.dtsi" 36 + }; 37 + }; 38 + 39 + &uart1 { 40 + status = "okay"; 41 + pinctrl-names = "default"; 42 + pinctrl-0 = <&pinctrl_txd1_default 43 + &pinctrl_rxd1_default>; 44 + }; 45 + 46 + &uart3 { 47 + status = "okay"; 48 + pinctrl-names = "default"; 49 + pinctrl-0 = <&pinctrl_txd3_default 50 + &pinctrl_rxd3_default>; 51 + }; 52 + 53 + &uart4 { 54 + status = "okay"; 55 + pinctrl-names = "default"; 56 + pinctrl-0 = <&pinctrl_txd4_default 57 + &pinctrl_rxd4_default 58 + &pinctrl_ndts4_default>; 59 + }; 60 + 61 + &uart5 { 62 + status = "okay"; 63 + }; 64 + 65 + &mac1 { 66 + status = "okay"; 67 + pinctrl-names = "default"; 68 + pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; 69 + }; 70 + 71 + &i2c0 { 72 + status = "okay"; 73 + }; 74 + 75 + &i2c1 { 76 + status = "okay"; 77 + }; 78 + 79 + &i2c2 { 80 + status = "okay"; 81 + }; 82 + 83 + &i2c3 { 84 + status = "okay"; 85 + }; 86 + 87 + &i2c4 { 88 + status = "okay"; 89 + }; 90 + 91 + &i2c5 { 92 + status = "okay"; 93 + }; 94 + 95 + &i2c6 { 96 + status = "okay"; 97 + }; 98 + 99 + &i2c7 { 100 + status = "okay"; 101 + }; 102 + 103 + &i2c8 { 104 + status = "okay"; 105 + }; 106 + 107 + &i2c11 { 108 + status = "okay"; 109 + }; 110 + 111 + &i2c12 { 112 + status = "okay"; 113 + }; 114 + 115 + &vhub { 116 + status = "okay"; 117 + };
+35
arch/arm/boot/dts/openbmc-flash-layout-64.dtsi
··· 1 + // SPDX-License-Identifier: GPL-2.0+ 2 + /* 3 + * Copyright (C) 2020 Bytedance. 4 + */ 5 + 6 + partitions { 7 + compatible = "fixed-partitions"; 8 + #address-cells = <1>; 9 + #size-cells = <1>; 10 + 11 + u-boot@0 { 12 + reg = <0x0 0x60000>; // 384KB 13 + label = "u-boot"; 14 + }; 15 + 16 + u-boot-env@60000 { 17 + reg = <0x60000 0x20000>; // 128KB 18 + label = "u-boot-env"; 19 + }; 20 + 21 + kernel@80000 { 22 + reg = <0x80000 0x500000>; // 5MB 23 + label = "kernel"; 24 + }; 25 + 26 + rofs@580000 { 27 + reg = <0x580000 0x2a80000>; // 42.5MB 28 + label = "rofs"; 29 + }; 30 + 31 + rwfs@3000000 { 32 + reg = <0x3000000 0x1000000>; // 16MB 33 + label = "rwfs"; 34 + }; 35 + };