Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: mstar: SMP support

This patch adds SMP support for MStar/Sigmastar chips that have a second core
like those in the infinity2m family.

So far only single and dual core chips have been found so this does
the bare minimum to boot the second core. From what I can tell not having
the "holding pen" code to handle multiple cores is fine if there is only
one core the will get booted. This might need to be reconsidered if chips
with more cores turn up.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20201201134330.3037007-11-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

authored by

Daniel Palmer and committed by
Arnd Bergmann
5919eec0 ecaafac1

+48
+48
arch/arm/mach-mstar/mstarv7.c
··· 31 31 #define MSTARV7_L3BRIDGE_FLUSH_TRIGGER BIT(0) 32 32 #define MSTARV7_L3BRIDGE_STATUS_DONE BIT(12) 33 33 34 + #ifdef CONFIG_SMP 35 + #define MSTARV7_CPU1_BOOT_ADDR_HIGH 0x4c 36 + #define MSTARV7_CPU1_BOOT_ADDR_LOW 0x50 37 + #define MSTARV7_CPU1_UNLOCK 0x58 38 + #define MSTARV7_CPU1_UNLOCK_MAGIC 0xbabe 39 + #endif 40 + 34 41 static void __iomem *l3bridge; 35 42 36 43 static const char * const mstarv7_board_dt_compat[] __initconst = { ··· 70 63 } 71 64 } 72 65 66 + #ifdef CONFIG_SMP 67 + static int mstarv7_boot_secondary(unsigned int cpu, struct task_struct *idle) 68 + { 69 + struct device_node *np; 70 + u32 bootaddr = (u32) __pa_symbol(secondary_startup_arm); 71 + void __iomem *smpctrl; 72 + 73 + /* 74 + * right now we don't know how to boot anything except 75 + * cpu 1. 76 + */ 77 + if (cpu != 1) 78 + return -EINVAL; 79 + 80 + np = of_find_compatible_node(NULL, NULL, "mstar,smpctrl"); 81 + smpctrl = of_iomap(np, 0); 82 + 83 + if (!smpctrl) 84 + return -ENODEV; 85 + 86 + /* set the boot address for the second cpu */ 87 + writew(bootaddr & 0xffff, smpctrl + MSTARV7_CPU1_BOOT_ADDR_LOW); 88 + writew((bootaddr >> 16) & 0xffff, smpctrl + MSTARV7_CPU1_BOOT_ADDR_HIGH); 89 + 90 + /* unlock the second cpu */ 91 + writew(MSTARV7_CPU1_UNLOCK_MAGIC, smpctrl + MSTARV7_CPU1_UNLOCK); 92 + 93 + /* and away we go...*/ 94 + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); 95 + 96 + iounmap(smpctrl); 97 + 98 + return 0; 99 + } 100 + 101 + static const struct smp_operations __initdata mstarv7_smp_ops = { 102 + .smp_boot_secondary = mstarv7_boot_secondary, 103 + }; 104 + #endif 105 + 73 106 static void __init mstarv7_init(void) 74 107 { 75 108 struct device_node *np; ··· 125 78 DT_MACHINE_START(MSTARV7_DT, "MStar/Sigmastar Armv7 (Device Tree)") 126 79 .dt_compat = mstarv7_board_dt_compat, 127 80 .init_machine = mstarv7_init, 81 + .smp = smp_ops(mstarv7_smp_ops), 128 82 MACHINE_END