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linux
Merge tag 'reset-for-4.6' of git://git.pengutronix.de/git/pza/linux into next/drivers
Reset controller changes for v4.6
- add support for the imgtec Pistachio SoC reset controller
- make struct reset_control_ops const
- move DT cell size check into the core to avoid code duplication
in the drivers
* tag 'reset-for-4.6' of git://git.pengutronix.de/git/pza/linux:
reset: sti: Make reset_control_ops const
reset: zynq: Make reset_control_ops const
reset: socfpga: Make reset_control_ops const
reset: hi6220: Make reset_control_ops const
reset: ath79: Make reset_control_ops const
reset: lpc18xx: Make reset_control_ops const
reset: sunxi: Make reset_control_ops const
reset: img: Make reset_control_ops const
reset: berlin: Make reset_control_ops const
reset: berlin: drop DT cell size check
reset: img: Add Pistachio reset controller driver
reset: img: Add pistachio reset controller binding document
reset: hisilicon: check return value of reset_controller_register()
reset: Move DT cell size check to the core
reset: Make reset_control_ops const
reset: remove unnecessary local variable initialization from of_reset_control_get_by_index
Signed-off-by: Olof Johansson <olof@lixom.net>
+262
-19
+55
Documentation/devicetree/bindings/reset/img,pistachio-reset.txt
+55
Documentation/devicetree/bindings/reset/img,pistachio-reset.txt
···
1
+
Pistachio Reset Controller
2
+
=============================================================================
3
+
4
+
This binding describes a reset controller device that is used to enable and
5
+
disable individual IP blocks within the Pistachio SoC using "soft reset"
6
+
control bits found in the Pistachio SoC top level registers.
7
+
8
+
The actual action taken when soft reset is asserted is hardware dependent.
9
+
However, when asserted it may not be possible to access the hardware's
10
+
registers, and following an assert/deassert sequence the hardware's previous
11
+
state may no longer be valid.
12
+
13
+
Please refer to Documentation/devicetree/bindings/reset/reset.txt
14
+
for common reset controller binding usage.
15
+
16
+
Required properties:
17
+
18
+
- compatible: Contains "img,pistachio-reset"
19
+
20
+
- #reset-cells: Contains 1
21
+
22
+
Example:
23
+
24
+
cr_periph: clk@18148000 {
25
+
compatible = "img,pistachio-cr-periph", "syscon", "simple-mfd";
26
+
reg = <0x18148000 0x1000>;
27
+
clocks = <&clk_periph PERIPH_CLK_SYS>;
28
+
clock-names = "sys";
29
+
#clock-cells = <1>;
30
+
31
+
pistachio_reset: reset-controller {
32
+
compatible = "img,pistachio-reset";
33
+
#reset-cells = <1>;
34
+
};
35
+
};
36
+
37
+
Specifying reset control of devices
38
+
=======================================
39
+
40
+
Device nodes should specify the reset channel required in their "resets"
41
+
property, containing a phandle to the pistachio reset device node and an
42
+
index specifying which reset to use, as described in
43
+
Documentation/devicetree/bindings/reset/reset.txt.
44
+
45
+
Example:
46
+
47
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spdif_out: spdif-out@18100d00 {
48
+
...
49
+
resets = <&pistachio_reset PISTACHIO_RESET_SPDIF_OUT>;
50
+
reset-names = "rst";
51
+
...
52
+
};
53
+
54
+
Macro definitions for the supported resets can be found in:
55
+
include/dt-bindings/reset/pistachio-resets.h
+1
drivers/reset/Makefile
+1
drivers/reset/Makefile
···
2
2
obj-$(CONFIG_ARCH_LPC18XX) += reset-lpc18xx.o
3
3
obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o
4
4
obj-$(CONFIG_ARCH_BERLIN) += reset-berlin.o
5
+
obj-$(CONFIG_MACH_PISTACHIO) += reset-pistachio.o
5
6
obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
6
7
obj-$(CONFIG_ARCH_STI) += sti/
7
8
obj-$(CONFIG_ARCH_HISI) += hisilicon/
+6
-4
drivers/reset/core.c
+6
-4
drivers/reset/core.c
···
45
45
static int of_reset_simple_xlate(struct reset_controller_dev *rcdev,
46
46
const struct of_phandle_args *reset_spec)
47
47
{
48
-
if (WARN_ON(reset_spec->args_count != rcdev->of_reset_n_cells))
49
-
return -EINVAL;
50
-
51
48
if (reset_spec->args[0] >= rcdev->nr_resets)
52
49
return -EINVAL;
53
50
···
149
152
struct reset_control *of_reset_control_get_by_index(struct device_node *node,
150
153
int index)
151
154
{
152
-
struct reset_control *rstc = ERR_PTR(-EPROBE_DEFER);
155
+
struct reset_control *rstc;
153
156
struct reset_controller_dev *r, *rcdev;
154
157
struct of_phandle_args args;
155
158
int rstc_id;
···
173
176
if (!rcdev) {
174
177
mutex_unlock(&reset_controller_list_mutex);
175
178
return ERR_PTR(-EPROBE_DEFER);
179
+
}
180
+
181
+
if (WARN_ON(args.args_count != rcdev->of_reset_n_cells)) {
182
+
mutex_unlock(&reset_controller_list_mutex);
183
+
return ERR_PTR(-EINVAL);
176
184
}
177
185
178
186
rstc_id = rcdev->of_xlate(rcdev, &args);
+2
-4
drivers/reset/hisilicon/hi6220_reset.c
+2
-4
drivers/reset/hisilicon/hi6220_reset.c
···
57
57
return 0;
58
58
}
59
59
60
-
static struct reset_control_ops hi6220_reset_ops = {
60
+
static const struct reset_control_ops hi6220_reset_ops = {
61
61
.assert = hi6220_reset_assert,
62
62
.deassert = hi6220_reset_deassert,
63
63
};
···
83
83
data->rc_dev.ops = &hi6220_reset_ops;
84
84
data->rc_dev.of_node = pdev->dev.of_node;
85
85
86
-
reset_controller_register(&data->rc_dev);
87
-
88
-
return 0;
86
+
return reset_controller_register(&data->rc_dev);
89
87
}
90
88
91
89
static const struct of_device_id hi6220_reset_match[] = {
+1
-1
drivers/reset/reset-ath79.c
+1
-1
drivers/reset/reset-ath79.c
+1
-4
drivers/reset/reset-berlin.c
+1
-4
drivers/reset/reset-berlin.c
···
46
46
return 0;
47
47
}
48
48
49
-
static struct reset_control_ops berlin_reset_ops = {
49
+
static const struct reset_control_ops berlin_reset_ops = {
50
50
.reset = berlin_reset_reset,
51
51
};
52
52
···
54
54
const struct of_phandle_args *reset_spec)
55
55
{
56
56
unsigned offset, bit;
57
-
58
-
if (WARN_ON(reset_spec->args_count != rcdev->of_reset_n_cells))
59
-
return -EINVAL;
60
57
61
58
offset = reset_spec->args[0];
62
59
bit = reset_spec->args[1];
+1
-1
drivers/reset/reset-lpc18xx.c
+1
-1
drivers/reset/reset-lpc18xx.c
···
136
136
return !(readl(rc->base + offset) & bit);
137
137
}
138
138
139
-
static struct reset_control_ops lpc18xx_rgu_ops = {
139
+
static const struct reset_control_ops lpc18xx_rgu_ops = {
140
140
.reset = lpc18xx_rgu_reset,
141
141
.assert = lpc18xx_rgu_assert,
142
142
.deassert = lpc18xx_rgu_deassert,
+154
drivers/reset/reset-pistachio.c
+154
drivers/reset/reset-pistachio.c
···
1
+
/*
2
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* Pistachio SoC Reset Controller driver
3
+
*
4
+
* Copyright (C) 2015 Imagination Technologies Ltd.
5
+
*
6
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* Author: Damien Horsley <Damien.Horsley@imgtec.com>
7
+
*
8
+
* This program is free software; you can redistribute it and/or modify it
9
+
* under the terms and conditions of the GNU General Public License,
10
+
* version 2, as published by the Free Software Foundation.
11
+
*/
12
+
13
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#include <linux/module.h>
14
+
#include <linux/of.h>
15
+
#include <linux/platform_device.h>
16
+
#include <linux/regmap.h>
17
+
#include <linux/reset-controller.h>
18
+
#include <linux/slab.h>
19
+
#include <linux/mfd/syscon.h>
20
+
21
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#include <dt-bindings/reset/pistachio-resets.h>
22
+
23
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#define PISTACHIO_SOFT_RESET 0
24
+
25
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struct pistachio_reset_data {
26
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struct reset_controller_dev rcdev;
27
+
struct regmap *periph_regs;
28
+
};
29
+
30
+
static inline int pistachio_reset_shift(unsigned long id)
31
+
{
32
+
switch (id) {
33
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case PISTACHIO_RESET_I2C0:
34
+
case PISTACHIO_RESET_I2C1:
35
+
case PISTACHIO_RESET_I2C2:
36
+
case PISTACHIO_RESET_I2C3:
37
+
case PISTACHIO_RESET_I2S_IN:
38
+
case PISTACHIO_RESET_PRL_OUT:
39
+
case PISTACHIO_RESET_SPDIF_OUT:
40
+
case PISTACHIO_RESET_SPI:
41
+
case PISTACHIO_RESET_PWM_PDM:
42
+
case PISTACHIO_RESET_UART0:
43
+
case PISTACHIO_RESET_UART1:
44
+
case PISTACHIO_RESET_QSPI:
45
+
case PISTACHIO_RESET_MDC:
46
+
case PISTACHIO_RESET_SDHOST:
47
+
case PISTACHIO_RESET_ETHERNET:
48
+
case PISTACHIO_RESET_IR:
49
+
case PISTACHIO_RESET_HASH:
50
+
case PISTACHIO_RESET_TIMER:
51
+
return id;
52
+
case PISTACHIO_RESET_I2S_OUT:
53
+
case PISTACHIO_RESET_SPDIF_IN:
54
+
case PISTACHIO_RESET_EVT:
55
+
return id + 6;
56
+
case PISTACHIO_RESET_USB_H:
57
+
case PISTACHIO_RESET_USB_PR:
58
+
case PISTACHIO_RESET_USB_PHY_PR:
59
+
case PISTACHIO_RESET_USB_PHY_PON:
60
+
return id + 7;
61
+
default:
62
+
return -EINVAL;
63
+
}
64
+
}
65
+
66
+
static int pistachio_reset_assert(struct reset_controller_dev *rcdev,
67
+
unsigned long id)
68
+
{
69
+
struct pistachio_reset_data *rd;
70
+
u32 mask;
71
+
int shift;
72
+
73
+
rd = container_of(rcdev, struct pistachio_reset_data, rcdev);
74
+
shift = pistachio_reset_shift(id);
75
+
if (shift < 0)
76
+
return shift;
77
+
mask = BIT(shift);
78
+
79
+
return regmap_update_bits(rd->periph_regs, PISTACHIO_SOFT_RESET,
80
+
mask, mask);
81
+
}
82
+
83
+
static int pistachio_reset_deassert(struct reset_controller_dev *rcdev,
84
+
unsigned long id)
85
+
{
86
+
struct pistachio_reset_data *rd;
87
+
u32 mask;
88
+
int shift;
89
+
90
+
rd = container_of(rcdev, struct pistachio_reset_data, rcdev);
91
+
shift = pistachio_reset_shift(id);
92
+
if (shift < 0)
93
+
return shift;
94
+
mask = BIT(shift);
95
+
96
+
return regmap_update_bits(rd->periph_regs, PISTACHIO_SOFT_RESET,
97
+
mask, 0);
98
+
}
99
+
100
+
static const struct reset_control_ops pistachio_reset_ops = {
101
+
.assert = pistachio_reset_assert,
102
+
.deassert = pistachio_reset_deassert,
103
+
};
104
+
105
+
static int pistachio_reset_probe(struct platform_device *pdev)
106
+
{
107
+
struct pistachio_reset_data *rd;
108
+
struct device *dev = &pdev->dev;
109
+
struct device_node *np = pdev->dev.of_node;
110
+
111
+
rd = devm_kzalloc(dev, sizeof(*rd), GFP_KERNEL);
112
+
if (!rd)
113
+
return -ENOMEM;
114
+
115
+
rd->periph_regs = syscon_node_to_regmap(np->parent);
116
+
if (IS_ERR(rd->periph_regs))
117
+
return PTR_ERR(rd->periph_regs);
118
+
119
+
rd->rcdev.owner = THIS_MODULE;
120
+
rd->rcdev.nr_resets = PISTACHIO_RESET_MAX + 1;
121
+
rd->rcdev.ops = &pistachio_reset_ops;
122
+
rd->rcdev.of_node = np;
123
+
124
+
return reset_controller_register(&rd->rcdev);
125
+
}
126
+
127
+
static int pistachio_reset_remove(struct platform_device *pdev)
128
+
{
129
+
struct pistachio_reset_data *data = platform_get_drvdata(pdev);
130
+
131
+
reset_controller_unregister(&data->rcdev);
132
+
133
+
return 0;
134
+
}
135
+
136
+
static const struct of_device_id pistachio_reset_dt_ids[] = {
137
+
{ .compatible = "img,pistachio-reset", },
138
+
{ /* sentinel */ },
139
+
};
140
+
MODULE_DEVICE_TABLE(of, pistachio_reset_dt_ids);
141
+
142
+
static struct platform_driver pistachio_reset_driver = {
143
+
.probe = pistachio_reset_probe,
144
+
.remove = pistachio_reset_remove,
145
+
.driver = {
146
+
.name = "pistachio-reset",
147
+
.of_match_table = pistachio_reset_dt_ids,
148
+
},
149
+
};
150
+
module_platform_driver(pistachio_reset_driver);
151
+
152
+
MODULE_AUTHOR("Damien Horsley <Damien.Horsley@imgtec.com>");
153
+
MODULE_DESCRIPTION("Pistacho Reset Controller Driver");
154
+
MODULE_LICENSE("GPL v2");
+1
-1
drivers/reset/reset-socfpga.c
+1
-1
drivers/reset/reset-socfpga.c
+1
-1
drivers/reset/reset-sunxi.c
+1
-1
drivers/reset/reset-sunxi.c
+1
-1
drivers/reset/reset-zynq.c
+1
-1
drivers/reset/reset-zynq.c
+1
-1
drivers/reset/sti/reset-syscfg.c
+1
-1
drivers/reset/sti/reset-syscfg.c
···
134
134
return rst->active_low ? !ret_val : !!ret_val;
135
135
}
136
136
137
-
static struct reset_control_ops syscfg_reset_ops = {
137
+
static const struct reset_control_ops syscfg_reset_ops = {
138
138
.reset = syscfg_reset_dev,
139
139
.assert = syscfg_reset_assert,
140
140
.deassert = syscfg_reset_deassert,
+36
include/dt-bindings/reset/pistachio-resets.h
+36
include/dt-bindings/reset/pistachio-resets.h
···
1
+
/*
2
+
* This header provides constants for the reset controller
3
+
* present in the Pistachio SoC
4
+
*/
5
+
6
+
#ifndef _PISTACHIO_RESETS_H
7
+
#define _PISTACHIO_RESETS_H
8
+
9
+
#define PISTACHIO_RESET_I2C0 0
10
+
#define PISTACHIO_RESET_I2C1 1
11
+
#define PISTACHIO_RESET_I2C2 2
12
+
#define PISTACHIO_RESET_I2C3 3
13
+
#define PISTACHIO_RESET_I2S_IN 4
14
+
#define PISTACHIO_RESET_PRL_OUT 5
15
+
#define PISTACHIO_RESET_SPDIF_OUT 6
16
+
#define PISTACHIO_RESET_SPI 7
17
+
#define PISTACHIO_RESET_PWM_PDM 8
18
+
#define PISTACHIO_RESET_UART0 9
19
+
#define PISTACHIO_RESET_UART1 10
20
+
#define PISTACHIO_RESET_QSPI 11
21
+
#define PISTACHIO_RESET_MDC 12
22
+
#define PISTACHIO_RESET_SDHOST 13
23
+
#define PISTACHIO_RESET_ETHERNET 14
24
+
#define PISTACHIO_RESET_IR 15
25
+
#define PISTACHIO_RESET_HASH 16
26
+
#define PISTACHIO_RESET_TIMER 17
27
+
#define PISTACHIO_RESET_I2S_OUT 18
28
+
#define PISTACHIO_RESET_SPDIF_IN 19
29
+
#define PISTACHIO_RESET_EVT 20
30
+
#define PISTACHIO_RESET_USB_H 21
31
+
#define PISTACHIO_RESET_USB_PR 22
32
+
#define PISTACHIO_RESET_USB_PHY_PR 23
33
+
#define PISTACHIO_RESET_USB_PHY_PON 24
34
+
#define PISTACHIO_RESET_MAX 24
35
+
36
+
#endif
+1
-1
include/linux/reset-controller.h
+1
-1
include/linux/reset-controller.h