Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'at91-ab-4.6-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/drivers

From Alexandre Belloni:

"This is a rework of the PMC driver. It touches multiple subsystems so
the easiest path is through arm-soc."

drivers update for 4.6:
- Big PMC rework that touches clk, PM, usb

* tag 'at91-ab-4.6-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
clk: at91: remove useless includes
clk: at91: pmc: remove useless capacities handling
clk: at91: pmc: drop at91_pmc_base
usb: gadget: atmel: access the PMC using regmap
ARM: at91: remove useless includes and function prototypes
ARM: at91: pm: move idle functions to pm.c
ARM: at91: pm: find and remap the pmc
ARM: at91: pm: simply call at91_pm_init
clk: at91: pmc: move pmc structures to C file
clk: at91: pmc: merge at91_pmc_init in atmel_pmc_probe
clk: at91: remove IRQ handling and use polling
clk: at91: make use of syscon/regmap internally
clk: at91: make use of syscon to share PMC registers in several drivers

Signed-off-by: Olof Johansson <olof@lixom.net>

+722 -1292
+1
arch/arm/mach-at91/Kconfig
··· 104 104 config COMMON_CLK_AT91 105 105 bool 106 106 select COMMON_CLK 107 + select MFD_SYSCON 107 108 108 109 config HAVE_AT91_SMD 109 110 bool
-2
arch/arm/mach-at91/at91rm9200.c
··· 12 12 #include <linux/of_platform.h> 13 13 14 14 #include <asm/mach/arch.h> 15 - #include <asm/system_misc.h> 16 15 17 16 #include "generic.h" 18 17 #include "soc.h" ··· 32 33 33 34 of_platform_populate(NULL, of_default_bus_match_table, NULL, soc_dev); 34 35 35 - arm_pm_idle = at91rm9200_idle; 36 36 at91rm9200_pm_init(); 37 37 } 38 38
-2
arch/arm/mach-at91/at91sam9.c
··· 62 62 soc_dev = soc_device_to_device(soc); 63 63 64 64 of_platform_populate(NULL, of_default_bus_match_table, NULL, soc_dev); 65 - 66 - arm_pm_idle = at91sam9_idle; 67 65 } 68 66 69 67 static void __init at91sam9_dt_device_init(void)
+2 -11
arch/arm/mach-at91/generic.h
··· 11 11 #ifndef _AT91_GENERIC_H 12 12 #define _AT91_GENERIC_H 13 13 14 - #include <linux/of.h> 15 - #include <linux/reboot.h> 16 - 17 - /* Map io */ 18 - extern void __init at91_map_io(void); 19 - extern void __init at91_alt_map_io(void); 20 - 21 - /* idle */ 22 - extern void at91rm9200_idle(void); 23 - extern void at91sam9_idle(void); 24 - 25 14 #ifdef CONFIG_PM 26 15 extern void __init at91rm9200_pm_init(void); 27 16 extern void __init at91sam9260_pm_init(void); 28 17 extern void __init at91sam9g45_pm_init(void); 29 18 extern void __init at91sam9x5_pm_init(void); 19 + extern void __init sama5_pm_init(void); 30 20 #else 31 21 static inline void __init at91rm9200_pm_init(void) { } 32 22 static inline void __init at91sam9260_pm_init(void) { } 33 23 static inline void __init at91sam9g45_pm_init(void) { } 34 24 static inline void __init at91sam9x5_pm_init(void) { } 25 + static inline void __init sama5_pm_init(void) { } 35 26 #endif 36 27 37 28 #endif /* _AT91_GENERIC_H */
+59 -11
arch/arm/mach-at91/pm.c
··· 31 31 #include <asm/mach/irq.h> 32 32 #include <asm/fncpy.h> 33 33 #include <asm/cacheflush.h> 34 + #include <asm/system_misc.h> 34 35 35 36 #include "generic.h" 36 37 #include "pm.h" 38 + 39 + static void __iomem *pmc; 37 40 38 41 /* 39 42 * FIXME: this is needed to communicate between the pinctrl driver and ··· 90 87 unsigned long scsr; 91 88 int i; 92 89 93 - scsr = at91_pmc_read(AT91_PMC_SCSR); 90 + scsr = readl(pmc + AT91_PMC_SCSR); 94 91 95 92 /* USB must not be using PLLB */ 96 93 if ((scsr & at91_pm_data.uhp_udp_mask) != 0) { ··· 104 101 105 102 if ((scsr & (AT91_PMC_PCK0 << i)) == 0) 106 103 continue; 107 - 108 - css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS; 104 + css = readl(pmc + AT91_PMC_PCKR(i)) & AT91_PMC_CSS; 109 105 if (css != AT91_PMC_CSS_SLOW) { 110 106 pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css); 111 107 return 0; ··· 147 145 flush_cache_all(); 148 146 outer_disable(); 149 147 150 - at91_suspend_sram_fn(at91_pmc_base, at91_ramc_base[0], 151 - at91_ramc_base[1], pm_data); 148 + at91_suspend_sram_fn(pmc, at91_ramc_base[0], 149 + at91_ramc_base[1], pm_data); 152 150 153 151 outer_resume(); 154 152 } ··· 355 353 at91_pm_set_standby(standby); 356 354 } 357 355 356 + void at91rm9200_idle(void) 357 + { 358 + /* 359 + * Disable the processor clock. The processor will be automatically 360 + * re-enabled by an interrupt or by a reset. 361 + */ 362 + writel(AT91_PMC_PCK, pmc + AT91_PMC_SCDR); 363 + } 364 + 365 + void at91sam9_idle(void) 366 + { 367 + writel(AT91_PMC_PCK, pmc + AT91_PMC_SCDR); 368 + cpu_do_idle(); 369 + } 370 + 358 371 static void __init at91_pm_sram_init(void) 359 372 { 360 373 struct gen_pool *sram_pool; ··· 416 399 &at91_pm_suspend_in_sram, at91_pm_suspend_in_sram_sz); 417 400 } 418 401 419 - static void __init at91_pm_init(void) 402 + static const struct of_device_id atmel_pmc_ids[] __initconst = { 403 + { .compatible = "atmel,at91rm9200-pmc" }, 404 + { .compatible = "atmel,at91sam9260-pmc" }, 405 + { .compatible = "atmel,at91sam9g45-pmc" }, 406 + { .compatible = "atmel,at91sam9n12-pmc" }, 407 + { .compatible = "atmel,at91sam9x5-pmc" }, 408 + { .compatible = "atmel,sama5d3-pmc" }, 409 + { .compatible = "atmel,sama5d2-pmc" }, 410 + { /* sentinel */ }, 411 + }; 412 + 413 + static void __init at91_pm_init(void (*pm_idle)(void)) 420 414 { 421 - at91_pm_sram_init(); 415 + struct device_node *pmc_np; 422 416 423 417 if (at91_cpuidle_device.dev.platform_data) 424 418 platform_device_register(&at91_cpuidle_device); 419 + 420 + pmc_np = of_find_matching_node(NULL, atmel_pmc_ids); 421 + pmc = of_iomap(pmc_np, 0); 422 + if (!pmc) { 423 + pr_err("AT91: PM not supported, PMC not found\n"); 424 + return; 425 + } 426 + 427 + if (pm_idle) 428 + arm_pm_idle = pm_idle; 429 + 430 + at91_pm_sram_init(); 425 431 426 432 if (at91_suspend_sram_fn) 427 433 suspend_set_ops(&at91_pm_ops); ··· 464 424 at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP; 465 425 at91_pm_data.memctrl = AT91_MEMCTRL_MC; 466 426 467 - at91_pm_init(); 427 + at91_pm_init(at91rm9200_idle); 468 428 } 469 429 470 430 void __init at91sam9260_pm_init(void) ··· 472 432 at91_dt_ramc(); 473 433 at91_pm_data.memctrl = AT91_MEMCTRL_SDRAMC; 474 434 at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP; 475 - return at91_pm_init(); 435 + at91_pm_init(at91sam9_idle); 476 436 } 477 437 478 438 void __init at91sam9g45_pm_init(void) ··· 480 440 at91_dt_ramc(); 481 441 at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP; 482 442 at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR; 483 - return at91_pm_init(); 443 + at91_pm_init(at91sam9_idle); 484 444 } 485 445 486 446 void __init at91sam9x5_pm_init(void) ··· 488 448 at91_dt_ramc(); 489 449 at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP; 490 450 at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR; 491 - return at91_pm_init(); 451 + at91_pm_init(at91sam9_idle); 452 + } 453 + 454 + void __init sama5_pm_init(void) 455 + { 456 + at91_dt_ramc(); 457 + at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP; 458 + at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR; 459 + at91_pm_init(NULL); 492 460 }
+1 -1
arch/arm/mach-at91/sama5.c
··· 51 51 soc_dev = soc_device_to_device(soc); 52 52 53 53 of_platform_populate(NULL, of_default_bus_match_table, NULL, soc_dev); 54 - at91sam9x5_pm_init(); 54 + sama5_pm_init(); 55 55 } 56 56 57 57 static const char *const sama5_dt_board_compat[] __initconst = {
+53 -40
drivers/clk/at91/clk-generated.c
··· 15 15 #include <linux/clkdev.h> 16 16 #include <linux/clk/at91_pmc.h> 17 17 #include <linux/of.h> 18 - #include <linux/of_address.h> 19 - #include <linux/io.h> 18 + #include <linux/mfd/syscon.h> 19 + #include <linux/regmap.h> 20 20 21 21 #include "pmc.h" 22 22 ··· 28 28 29 29 struct clk_generated { 30 30 struct clk_hw hw; 31 - struct at91_pmc *pmc; 31 + struct regmap *regmap; 32 32 struct clk_range range; 33 + spinlock_t *lock; 33 34 u32 id; 34 35 u32 gckdiv; 35 36 u8 parent_id; ··· 42 41 static int clk_generated_enable(struct clk_hw *hw) 43 42 { 44 43 struct clk_generated *gck = to_clk_generated(hw); 45 - struct at91_pmc *pmc = gck->pmc; 46 - u32 tmp; 44 + unsigned long flags; 47 45 48 46 pr_debug("GCLK: %s, gckdiv = %d, parent id = %d\n", 49 47 __func__, gck->gckdiv, gck->parent_id); 50 48 51 - pmc_lock(pmc); 52 - pmc_write(pmc, AT91_PMC_PCR, (gck->id & AT91_PMC_PCR_PID_MASK)); 53 - tmp = pmc_read(pmc, AT91_PMC_PCR) & 54 - ~(AT91_PMC_PCR_GCKDIV_MASK | AT91_PMC_PCR_GCKCSS_MASK); 55 - pmc_write(pmc, AT91_PMC_PCR, tmp | AT91_PMC_PCR_GCKCSS(gck->parent_id) 56 - | AT91_PMC_PCR_CMD 57 - | AT91_PMC_PCR_GCKDIV(gck->gckdiv) 58 - | AT91_PMC_PCR_GCKEN); 59 - pmc_unlock(pmc); 49 + spin_lock_irqsave(gck->lock, flags); 50 + regmap_write(gck->regmap, AT91_PMC_PCR, 51 + (gck->id & AT91_PMC_PCR_PID_MASK)); 52 + regmap_update_bits(gck->regmap, AT91_PMC_PCR, 53 + AT91_PMC_PCR_GCKDIV_MASK | AT91_PMC_PCR_GCKCSS_MASK | 54 + AT91_PMC_PCR_CMD | AT91_PMC_PCR_GCKEN, 55 + AT91_PMC_PCR_GCKCSS(gck->parent_id) | 56 + AT91_PMC_PCR_CMD | 57 + AT91_PMC_PCR_GCKDIV(gck->gckdiv) | 58 + AT91_PMC_PCR_GCKEN); 59 + spin_unlock_irqrestore(gck->lock, flags); 60 60 return 0; 61 61 } 62 62 63 63 static void clk_generated_disable(struct clk_hw *hw) 64 64 { 65 65 struct clk_generated *gck = to_clk_generated(hw); 66 - struct at91_pmc *pmc = gck->pmc; 67 - u32 tmp; 66 + unsigned long flags; 68 67 69 - pmc_lock(pmc); 70 - pmc_write(pmc, AT91_PMC_PCR, (gck->id & AT91_PMC_PCR_PID_MASK)); 71 - tmp = pmc_read(pmc, AT91_PMC_PCR) & ~AT91_PMC_PCR_GCKEN; 72 - pmc_write(pmc, AT91_PMC_PCR, tmp | AT91_PMC_PCR_CMD); 73 - pmc_unlock(pmc); 68 + spin_lock_irqsave(gck->lock, flags); 69 + regmap_write(gck->regmap, AT91_PMC_PCR, 70 + (gck->id & AT91_PMC_PCR_PID_MASK)); 71 + regmap_update_bits(gck->regmap, AT91_PMC_PCR, 72 + AT91_PMC_PCR_CMD | AT91_PMC_PCR_GCKEN, 73 + AT91_PMC_PCR_CMD); 74 + spin_unlock_irqrestore(gck->lock, flags); 74 75 } 75 76 76 77 static int clk_generated_is_enabled(struct clk_hw *hw) 77 78 { 78 79 struct clk_generated *gck = to_clk_generated(hw); 79 - struct at91_pmc *pmc = gck->pmc; 80 - int ret; 80 + unsigned long flags; 81 + unsigned int status; 81 82 82 - pmc_lock(pmc); 83 - pmc_write(pmc, AT91_PMC_PCR, (gck->id & AT91_PMC_PCR_PID_MASK)); 84 - ret = !!(pmc_read(pmc, AT91_PMC_PCR) & AT91_PMC_PCR_GCKEN); 85 - pmc_unlock(pmc); 83 + spin_lock_irqsave(gck->lock, flags); 84 + regmap_write(gck->regmap, AT91_PMC_PCR, 85 + (gck->id & AT91_PMC_PCR_PID_MASK)); 86 + regmap_read(gck->regmap, AT91_PMC_PCR, &status); 87 + spin_unlock_irqrestore(gck->lock, flags); 86 88 87 - return ret; 89 + return status & AT91_PMC_PCR_GCKEN ? 1 : 0; 88 90 } 89 91 90 92 static unsigned long ··· 218 214 */ 219 215 static void clk_generated_startup(struct clk_generated *gck) 220 216 { 221 - struct at91_pmc *pmc = gck->pmc; 222 217 u32 tmp; 218 + unsigned long flags; 223 219 224 - pmc_lock(pmc); 225 - pmc_write(pmc, AT91_PMC_PCR, (gck->id & AT91_PMC_PCR_PID_MASK)); 226 - tmp = pmc_read(pmc, AT91_PMC_PCR); 227 - pmc_unlock(pmc); 220 + spin_lock_irqsave(gck->lock, flags); 221 + regmap_write(gck->regmap, AT91_PMC_PCR, 222 + (gck->id & AT91_PMC_PCR_PID_MASK)); 223 + regmap_read(gck->regmap, AT91_PMC_PCR, &tmp); 224 + spin_unlock_irqrestore(gck->lock, flags); 228 225 229 226 gck->parent_id = (tmp & AT91_PMC_PCR_GCKCSS_MASK) 230 227 >> AT91_PMC_PCR_GCKCSS_OFFSET; ··· 234 229 } 235 230 236 231 static struct clk * __init 237 - at91_clk_register_generated(struct at91_pmc *pmc, const char *name, 238 - const char **parent_names, u8 num_parents, 232 + at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock, const char 233 + *name, const char **parent_names, u8 num_parents, 239 234 u8 id, const struct clk_range *range) 240 235 { 241 236 struct clk_generated *gck; ··· 254 249 255 250 gck->id = id; 256 251 gck->hw.init = &init; 257 - gck->pmc = pmc; 252 + gck->regmap = regmap; 253 + gck->lock = lock; 258 254 gck->range = *range; 259 255 260 256 clk = clk_register(NULL, &gck->hw); ··· 267 261 return clk; 268 262 } 269 263 270 - void __init of_sama5d2_clk_generated_setup(struct device_node *np, 271 - struct at91_pmc *pmc) 264 + void __init of_sama5d2_clk_generated_setup(struct device_node *np) 272 265 { 273 266 int num; 274 267 u32 id; ··· 277 272 const char *parent_names[GENERATED_SOURCE_MAX]; 278 273 struct device_node *gcknp; 279 274 struct clk_range range = CLK_RANGE(0, 0); 275 + struct regmap *regmap; 280 276 281 277 num_parents = of_clk_get_parent_count(np); 282 278 if (num_parents <= 0 || num_parents > GENERATED_SOURCE_MAX) ··· 287 281 288 282 num = of_get_child_count(np); 289 283 if (!num || num > PERIPHERAL_MAX) 284 + return; 285 + 286 + regmap = syscon_node_to_regmap(of_get_parent(np)); 287 + if (IS_ERR(regmap)) 290 288 return; 291 289 292 290 for_each_child_of_node(np, gcknp) { ··· 306 296 of_at91_get_clk_range(gcknp, "atmel,clk-output-range", 307 297 &range); 308 298 309 - clk = at91_clk_register_generated(pmc, name, parent_names, 310 - num_parents, id, &range); 299 + clk = at91_clk_register_generated(regmap, &pmc_pcr_lock, name, 300 + parent_names, num_parents, 301 + id, &range); 311 302 if (IS_ERR(clk)) 312 303 continue; 313 304 314 305 of_clk_add_provider(gcknp, of_clk_src_simple_get, clk); 315 306 } 316 307 } 308 + CLK_OF_DECLARE(of_sama5d2_clk_generated_setup, "atmel,sama5d2-clk-generated", 309 + of_sama5d2_clk_generated_setup);
+20 -20
drivers/clk/at91/clk-h32mx.c
··· 15 15 #include <linux/clk-provider.h> 16 16 #include <linux/clkdev.h> 17 17 #include <linux/clk/at91_pmc.h> 18 - #include <linux/delay.h> 19 18 #include <linux/of.h> 20 - #include <linux/of_address.h> 21 - #include <linux/of_irq.h> 22 - #include <linux/io.h> 23 - #include <linux/interrupt.h> 24 - #include <linux/irq.h> 25 - #include <linux/sched.h> 26 - #include <linux/wait.h> 19 + #include <linux/regmap.h> 20 + #include <linux/mfd/syscon.h> 27 21 28 22 #include "pmc.h" 29 23 ··· 25 31 26 32 struct clk_sama5d4_h32mx { 27 33 struct clk_hw hw; 28 - struct at91_pmc *pmc; 34 + struct regmap *regmap; 29 35 }; 30 36 31 37 #define to_clk_sama5d4_h32mx(hw) container_of(hw, struct clk_sama5d4_h32mx, hw) ··· 34 40 unsigned long parent_rate) 35 41 { 36 42 struct clk_sama5d4_h32mx *h32mxclk = to_clk_sama5d4_h32mx(hw); 43 + unsigned int mckr; 37 44 38 - if (pmc_read(h32mxclk->pmc, AT91_PMC_MCKR) & AT91_PMC_H32MXDIV) 45 + regmap_read(h32mxclk->regmap, AT91_PMC_MCKR, &mckr); 46 + if (mckr & AT91_PMC_H32MXDIV) 39 47 return parent_rate / 2; 40 48 41 49 if (parent_rate > H32MX_MAX_FREQ) ··· 66 70 unsigned long parent_rate) 67 71 { 68 72 struct clk_sama5d4_h32mx *h32mxclk = to_clk_sama5d4_h32mx(hw); 69 - struct at91_pmc *pmc = h32mxclk->pmc; 70 - u32 tmp; 73 + u32 mckr = 0; 71 74 72 75 if (parent_rate != rate && (parent_rate / 2) != rate) 73 76 return -EINVAL; 74 77 75 - pmc_lock(pmc); 76 - tmp = pmc_read(pmc, AT91_PMC_MCKR) & ~AT91_PMC_H32MXDIV; 77 78 if ((parent_rate / 2) == rate) 78 - tmp |= AT91_PMC_H32MXDIV; 79 - pmc_write(pmc, AT91_PMC_MCKR, tmp); 80 - pmc_unlock(pmc); 79 + mckr = AT91_PMC_H32MXDIV; 80 + 81 + regmap_update_bits(h32mxclk->regmap, AT91_PMC_MCKR, 82 + AT91_PMC_H32MXDIV, mckr); 81 83 82 84 return 0; 83 85 } ··· 86 92 .set_rate = clk_sama5d4_h32mx_set_rate, 87 93 }; 88 94 89 - void __init of_sama5d4_clk_h32mx_setup(struct device_node *np, 90 - struct at91_pmc *pmc) 95 + static void __init of_sama5d4_clk_h32mx_setup(struct device_node *np) 91 96 { 92 97 struct clk_sama5d4_h32mx *h32mxclk; 93 98 struct clk_init_data init; 94 99 const char *parent_name; 100 + struct regmap *regmap; 95 101 struct clk *clk; 102 + 103 + regmap = syscon_node_to_regmap(of_get_parent(np)); 104 + if (IS_ERR(regmap)) 105 + return; 96 106 97 107 h32mxclk = kzalloc(sizeof(*h32mxclk), GFP_KERNEL); 98 108 if (!h32mxclk) ··· 111 113 init.flags = CLK_SET_RATE_GATE; 112 114 113 115 h32mxclk->hw.init = &init; 114 - h32mxclk->pmc = pmc; 116 + h32mxclk->regmap = regmap; 115 117 116 118 clk = clk_register(NULL, &h32mxclk->hw); 117 119 if (!clk) { ··· 121 123 122 124 of_clk_add_provider(np, of_clk_src_simple_get, clk); 123 125 } 126 + CLK_OF_DECLARE(of_sama5d4_clk_h32mx_setup, "atmel,sama5d4-clk-h32mx", 127 + of_sama5d4_clk_h32mx_setup);
+143 -181
drivers/clk/at91/clk-main.c
··· 13 13 #include <linux/clk/at91_pmc.h> 14 14 #include <linux/delay.h> 15 15 #include <linux/of.h> 16 - #include <linux/of_address.h> 17 - #include <linux/of_irq.h> 18 - #include <linux/io.h> 19 - #include <linux/interrupt.h> 20 - #include <linux/irq.h> 21 - #include <linux/sched.h> 22 - #include <linux/wait.h> 16 + #include <linux/mfd/syscon.h> 17 + #include <linux/regmap.h> 23 18 24 19 #include "pmc.h" 25 20 ··· 29 34 30 35 struct clk_main_osc { 31 36 struct clk_hw hw; 32 - struct at91_pmc *pmc; 33 - unsigned int irq; 34 - wait_queue_head_t wait; 37 + struct regmap *regmap; 35 38 }; 36 39 37 40 #define to_clk_main_osc(hw) container_of(hw, struct clk_main_osc, hw) 38 41 39 42 struct clk_main_rc_osc { 40 43 struct clk_hw hw; 41 - struct at91_pmc *pmc; 42 - unsigned int irq; 43 - wait_queue_head_t wait; 44 + struct regmap *regmap; 44 45 unsigned long frequency; 45 46 unsigned long accuracy; 46 47 }; ··· 45 54 46 55 struct clk_rm9200_main { 47 56 struct clk_hw hw; 48 - struct at91_pmc *pmc; 57 + struct regmap *regmap; 49 58 }; 50 59 51 60 #define to_clk_rm9200_main(hw) container_of(hw, struct clk_rm9200_main, hw) 52 61 53 62 struct clk_sam9x5_main { 54 63 struct clk_hw hw; 55 - struct at91_pmc *pmc; 56 - unsigned int irq; 57 - wait_queue_head_t wait; 64 + struct regmap *regmap; 58 65 u8 parent; 59 66 }; 60 67 61 68 #define to_clk_sam9x5_main(hw) container_of(hw, struct clk_sam9x5_main, hw) 62 69 63 - static irqreturn_t clk_main_osc_irq_handler(int irq, void *dev_id) 70 + static inline bool clk_main_osc_ready(struct regmap *regmap) 64 71 { 65 - struct clk_main_osc *osc = dev_id; 72 + unsigned int status; 66 73 67 - wake_up(&osc->wait); 68 - disable_irq_nosync(osc->irq); 74 + regmap_read(regmap, AT91_PMC_SR, &status); 69 75 70 - return IRQ_HANDLED; 76 + return status & AT91_PMC_MOSCS; 71 77 } 72 78 73 79 static int clk_main_osc_prepare(struct clk_hw *hw) 74 80 { 75 81 struct clk_main_osc *osc = to_clk_main_osc(hw); 76 - struct at91_pmc *pmc = osc->pmc; 82 + struct regmap *regmap = osc->regmap; 77 83 u32 tmp; 78 84 79 - tmp = pmc_read(pmc, AT91_CKGR_MOR) & ~MOR_KEY_MASK; 85 + regmap_read(regmap, AT91_CKGR_MOR, &tmp); 86 + tmp &= ~MOR_KEY_MASK; 87 + 80 88 if (tmp & AT91_PMC_OSCBYPASS) 81 89 return 0; 82 90 83 91 if (!(tmp & AT91_PMC_MOSCEN)) { 84 92 tmp |= AT91_PMC_MOSCEN | AT91_PMC_KEY; 85 - pmc_write(pmc, AT91_CKGR_MOR, tmp); 93 + regmap_write(regmap, AT91_CKGR_MOR, tmp); 86 94 } 87 95 88 - while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCS)) { 89 - enable_irq(osc->irq); 90 - wait_event(osc->wait, 91 - pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCS); 92 - } 96 + while (!clk_main_osc_ready(regmap)) 97 + cpu_relax(); 93 98 94 99 return 0; 95 100 } ··· 93 106 static void clk_main_osc_unprepare(struct clk_hw *hw) 94 107 { 95 108 struct clk_main_osc *osc = to_clk_main_osc(hw); 96 - struct at91_pmc *pmc = osc->pmc; 97 - u32 tmp = pmc_read(pmc, AT91_CKGR_MOR); 109 + struct regmap *regmap = osc->regmap; 110 + u32 tmp; 98 111 112 + regmap_read(regmap, AT91_CKGR_MOR, &tmp); 99 113 if (tmp & AT91_PMC_OSCBYPASS) 100 114 return; 101 115 ··· 104 116 return; 105 117 106 118 tmp &= ~(AT91_PMC_KEY | AT91_PMC_MOSCEN); 107 - pmc_write(pmc, AT91_CKGR_MOR, tmp | AT91_PMC_KEY); 119 + regmap_write(regmap, AT91_CKGR_MOR, tmp | AT91_PMC_KEY); 108 120 } 109 121 110 122 static int clk_main_osc_is_prepared(struct clk_hw *hw) 111 123 { 112 124 struct clk_main_osc *osc = to_clk_main_osc(hw); 113 - struct at91_pmc *pmc = osc->pmc; 114 - u32 tmp = pmc_read(pmc, AT91_CKGR_MOR); 125 + struct regmap *regmap = osc->regmap; 126 + u32 tmp, status; 115 127 128 + regmap_read(regmap, AT91_CKGR_MOR, &tmp); 116 129 if (tmp & AT91_PMC_OSCBYPASS) 117 130 return 1; 118 131 119 - return !!((pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCS) && 120 - (pmc_read(pmc, AT91_CKGR_MOR) & AT91_PMC_MOSCEN)); 132 + regmap_read(regmap, AT91_PMC_SR, &status); 133 + 134 + return (status & AT91_PMC_MOSCS) && (tmp & AT91_PMC_MOSCEN); 121 135 } 122 136 123 137 static const struct clk_ops main_osc_ops = { ··· 129 139 }; 130 140 131 141 static struct clk * __init 132 - at91_clk_register_main_osc(struct at91_pmc *pmc, 133 - unsigned int irq, 142 + at91_clk_register_main_osc(struct regmap *regmap, 134 143 const char *name, 135 144 const char *parent_name, 136 145 bool bypass) 137 146 { 138 - int ret; 139 147 struct clk_main_osc *osc; 140 148 struct clk *clk = NULL; 141 149 struct clk_init_data init; 142 150 143 - if (!pmc || !irq || !name || !parent_name) 151 + if (!name || !parent_name) 144 152 return ERR_PTR(-EINVAL); 145 153 146 154 osc = kzalloc(sizeof(*osc), GFP_KERNEL); ··· 152 164 init.flags = CLK_IGNORE_UNUSED; 153 165 154 166 osc->hw.init = &init; 155 - osc->pmc = pmc; 156 - osc->irq = irq; 157 - 158 - init_waitqueue_head(&osc->wait); 159 - irq_set_status_flags(osc->irq, IRQ_NOAUTOEN); 160 - ret = request_irq(osc->irq, clk_main_osc_irq_handler, 161 - IRQF_TRIGGER_HIGH, name, osc); 162 - if (ret) { 163 - kfree(osc); 164 - return ERR_PTR(ret); 165 - } 167 + osc->regmap = regmap; 166 168 167 169 if (bypass) 168 - pmc_write(pmc, AT91_CKGR_MOR, 169 - (pmc_read(pmc, AT91_CKGR_MOR) & 170 - ~(MOR_KEY_MASK | AT91_PMC_MOSCEN)) | 171 - AT91_PMC_OSCBYPASS | AT91_PMC_KEY); 170 + regmap_update_bits(regmap, 171 + AT91_CKGR_MOR, MOR_KEY_MASK | 172 + AT91_PMC_MOSCEN, 173 + AT91_PMC_OSCBYPASS | AT91_PMC_KEY); 172 174 173 175 clk = clk_register(NULL, &osc->hw); 174 - if (IS_ERR(clk)) { 175 - free_irq(irq, osc); 176 + if (IS_ERR(clk)) 176 177 kfree(osc); 177 - } 178 178 179 179 return clk; 180 180 } 181 181 182 - void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np, 183 - struct at91_pmc *pmc) 182 + static void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np) 184 183 { 185 184 struct clk *clk; 186 - unsigned int irq; 187 185 const char *name = np->name; 188 186 const char *parent_name; 187 + struct regmap *regmap; 189 188 bool bypass; 190 189 191 190 of_property_read_string(np, "clock-output-names", &name); 192 191 bypass = of_property_read_bool(np, "atmel,osc-bypass"); 193 192 parent_name = of_clk_get_parent_name(np, 0); 194 193 195 - irq = irq_of_parse_and_map(np, 0); 196 - if (!irq) 194 + regmap = syscon_node_to_regmap(of_get_parent(np)); 195 + if (IS_ERR(regmap)) 197 196 return; 198 197 199 - clk = at91_clk_register_main_osc(pmc, irq, name, parent_name, bypass); 198 + clk = at91_clk_register_main_osc(regmap, name, parent_name, bypass); 200 199 if (IS_ERR(clk)) 201 200 return; 202 201 203 202 of_clk_add_provider(np, of_clk_src_simple_get, clk); 204 203 } 204 + CLK_OF_DECLARE(at91rm9200_clk_main_osc, "atmel,at91rm9200-clk-main-osc", 205 + of_at91rm9200_clk_main_osc_setup); 205 206 206 - static irqreturn_t clk_main_rc_osc_irq_handler(int irq, void *dev_id) 207 + static bool clk_main_rc_osc_ready(struct regmap *regmap) 207 208 { 208 - struct clk_main_rc_osc *osc = dev_id; 209 + unsigned int status; 209 210 210 - wake_up(&osc->wait); 211 - disable_irq_nosync(osc->irq); 211 + regmap_read(regmap, AT91_PMC_SR, &status); 212 212 213 - return IRQ_HANDLED; 213 + return status & AT91_PMC_MOSCRCS; 214 214 } 215 215 216 216 static int clk_main_rc_osc_prepare(struct clk_hw *hw) 217 217 { 218 218 struct clk_main_rc_osc *osc = to_clk_main_rc_osc(hw); 219 - struct at91_pmc *pmc = osc->pmc; 220 - u32 tmp; 219 + struct regmap *regmap = osc->regmap; 220 + unsigned int mor; 221 221 222 - tmp = pmc_read(pmc, AT91_CKGR_MOR) & ~MOR_KEY_MASK; 222 + regmap_read(regmap, AT91_CKGR_MOR, &mor); 223 223 224 - if (!(tmp & AT91_PMC_MOSCRCEN)) { 225 - tmp |= AT91_PMC_MOSCRCEN | AT91_PMC_KEY; 226 - pmc_write(pmc, AT91_CKGR_MOR, tmp); 227 - } 224 + if (!(mor & AT91_PMC_MOSCRCEN)) 225 + regmap_update_bits(regmap, AT91_CKGR_MOR, 226 + MOR_KEY_MASK | AT91_PMC_MOSCRCEN, 227 + AT91_PMC_MOSCRCEN | AT91_PMC_KEY); 228 228 229 - while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCRCS)) { 230 - enable_irq(osc->irq); 231 - wait_event(osc->wait, 232 - pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCRCS); 233 - } 229 + while (!clk_main_rc_osc_ready(regmap)) 230 + cpu_relax(); 234 231 235 232 return 0; 236 233 } ··· 223 250 static void clk_main_rc_osc_unprepare(struct clk_hw *hw) 224 251 { 225 252 struct clk_main_rc_osc *osc = to_clk_main_rc_osc(hw); 226 - struct at91_pmc *pmc = osc->pmc; 227 - u32 tmp = pmc_read(pmc, AT91_CKGR_MOR); 253 + struct regmap *regmap = osc->regmap; 254 + unsigned int mor; 228 255 229 - if (!(tmp & AT91_PMC_MOSCRCEN)) 256 + regmap_read(regmap, AT91_CKGR_MOR, &mor); 257 + 258 + if (!(mor & AT91_PMC_MOSCRCEN)) 230 259 return; 231 260 232 - tmp &= ~(MOR_KEY_MASK | AT91_PMC_MOSCRCEN); 233 - pmc_write(pmc, AT91_CKGR_MOR, tmp | AT91_PMC_KEY); 261 + regmap_update_bits(regmap, AT91_CKGR_MOR, 262 + MOR_KEY_MASK | AT91_PMC_MOSCRCEN, AT91_PMC_KEY); 234 263 } 235 264 236 265 static int clk_main_rc_osc_is_prepared(struct clk_hw *hw) 237 266 { 238 267 struct clk_main_rc_osc *osc = to_clk_main_rc_osc(hw); 239 - struct at91_pmc *pmc = osc->pmc; 268 + struct regmap *regmap = osc->regmap; 269 + unsigned int mor, status; 240 270 241 - return !!((pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCRCS) && 242 - (pmc_read(pmc, AT91_CKGR_MOR) & AT91_PMC_MOSCRCEN)); 271 + regmap_read(regmap, AT91_CKGR_MOR, &mor); 272 + regmap_read(regmap, AT91_PMC_SR, &status); 273 + 274 + return (mor & AT91_PMC_MOSCRCEN) && (status & AT91_PMC_MOSCRCS); 243 275 } 244 276 245 277 static unsigned long clk_main_rc_osc_recalc_rate(struct clk_hw *hw, ··· 272 294 }; 273 295 274 296 static struct clk * __init 275 - at91_clk_register_main_rc_osc(struct at91_pmc *pmc, 276 - unsigned int irq, 297 + at91_clk_register_main_rc_osc(struct regmap *regmap, 277 298 const char *name, 278 299 u32 frequency, u32 accuracy) 279 300 { 280 - int ret; 281 301 struct clk_main_rc_osc *osc; 282 302 struct clk *clk = NULL; 283 303 struct clk_init_data init; 284 304 285 - if (!pmc || !irq || !name || !frequency) 305 + if (!name || !frequency) 286 306 return ERR_PTR(-EINVAL); 287 307 288 308 osc = kzalloc(sizeof(*osc), GFP_KERNEL); ··· 294 318 init.flags = CLK_IS_ROOT | CLK_IGNORE_UNUSED; 295 319 296 320 osc->hw.init = &init; 297 - osc->pmc = pmc; 298 - osc->irq = irq; 321 + osc->regmap = regmap; 299 322 osc->frequency = frequency; 300 323 osc->accuracy = accuracy; 301 324 302 - init_waitqueue_head(&osc->wait); 303 - irq_set_status_flags(osc->irq, IRQ_NOAUTOEN); 304 - ret = request_irq(osc->irq, clk_main_rc_osc_irq_handler, 305 - IRQF_TRIGGER_HIGH, name, osc); 306 - if (ret) 307 - return ERR_PTR(ret); 308 - 309 325 clk = clk_register(NULL, &osc->hw); 310 - if (IS_ERR(clk)) { 311 - free_irq(irq, osc); 326 + if (IS_ERR(clk)) 312 327 kfree(osc); 313 - } 314 328 315 329 return clk; 316 330 } 317 331 318 - void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np, 319 - struct at91_pmc *pmc) 332 + static void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np) 320 333 { 321 334 struct clk *clk; 322 - unsigned int irq; 323 335 u32 frequency = 0; 324 336 u32 accuracy = 0; 325 337 const char *name = np->name; 338 + struct regmap *regmap; 326 339 327 340 of_property_read_string(np, "clock-output-names", &name); 328 341 of_property_read_u32(np, "clock-frequency", &frequency); 329 342 of_property_read_u32(np, "clock-accuracy", &accuracy); 330 343 331 - irq = irq_of_parse_and_map(np, 0); 332 - if (!irq) 344 + regmap = syscon_node_to_regmap(of_get_parent(np)); 345 + if (IS_ERR(regmap)) 333 346 return; 334 347 335 - clk = at91_clk_register_main_rc_osc(pmc, irq, name, frequency, 336 - accuracy); 348 + clk = at91_clk_register_main_rc_osc(regmap, name, frequency, accuracy); 337 349 if (IS_ERR(clk)) 338 350 return; 339 351 340 352 of_clk_add_provider(np, of_clk_src_simple_get, clk); 341 353 } 354 + CLK_OF_DECLARE(at91sam9x5_clk_main_rc_osc, "atmel,at91sam9x5-clk-main-rc-osc", 355 + of_at91sam9x5_clk_main_rc_osc_setup); 342 356 343 357 344 - static int clk_main_probe_frequency(struct at91_pmc *pmc) 358 + static int clk_main_probe_frequency(struct regmap *regmap) 345 359 { 346 360 unsigned long prep_time, timeout; 347 - u32 tmp; 361 + unsigned int mcfr; 348 362 349 363 timeout = jiffies + usecs_to_jiffies(MAINFRDY_TIMEOUT); 350 364 do { 351 365 prep_time = jiffies; 352 - tmp = pmc_read(pmc, AT91_CKGR_MCFR); 353 - if (tmp & AT91_PMC_MAINRDY) 366 + regmap_read(regmap, AT91_CKGR_MCFR, &mcfr); 367 + if (mcfr & AT91_PMC_MAINRDY) 354 368 return 0; 355 369 usleep_range(MAINF_LOOP_MIN_WAIT, MAINF_LOOP_MAX_WAIT); 356 370 } while (time_before(prep_time, timeout)); ··· 348 382 return -ETIMEDOUT; 349 383 } 350 384 351 - static unsigned long clk_main_recalc_rate(struct at91_pmc *pmc, 385 + static unsigned long clk_main_recalc_rate(struct regmap *regmap, 352 386 unsigned long parent_rate) 353 387 { 354 - u32 tmp; 388 + unsigned int mcfr; 355 389 356 390 if (parent_rate) 357 391 return parent_rate; 358 392 359 393 pr_warn("Main crystal frequency not set, using approximate value\n"); 360 - tmp = pmc_read(pmc, AT91_CKGR_MCFR); 361 - if (!(tmp & AT91_PMC_MAINRDY)) 394 + regmap_read(regmap, AT91_CKGR_MCFR, &mcfr); 395 + if (!(mcfr & AT91_PMC_MAINRDY)) 362 396 return 0; 363 397 364 - return ((tmp & AT91_PMC_MAINF) * SLOW_CLOCK_FREQ) / MAINF_DIV; 398 + return ((mcfr & AT91_PMC_MAINF) * SLOW_CLOCK_FREQ) / MAINF_DIV; 365 399 } 366 400 367 401 static int clk_rm9200_main_prepare(struct clk_hw *hw) 368 402 { 369 403 struct clk_rm9200_main *clkmain = to_clk_rm9200_main(hw); 370 404 371 - return clk_main_probe_frequency(clkmain->pmc); 405 + return clk_main_probe_frequency(clkmain->regmap); 372 406 } 373 407 374 408 static int clk_rm9200_main_is_prepared(struct clk_hw *hw) 375 409 { 376 410 struct clk_rm9200_main *clkmain = to_clk_rm9200_main(hw); 411 + unsigned int status; 377 412 378 - return !!(pmc_read(clkmain->pmc, AT91_CKGR_MCFR) & AT91_PMC_MAINRDY); 413 + regmap_read(clkmain->regmap, AT91_CKGR_MCFR, &status); 414 + 415 + return status & AT91_PMC_MAINRDY ? 1 : 0; 379 416 } 380 417 381 418 static unsigned long clk_rm9200_main_recalc_rate(struct clk_hw *hw, ··· 386 417 { 387 418 struct clk_rm9200_main *clkmain = to_clk_rm9200_main(hw); 388 419 389 - return clk_main_recalc_rate(clkmain->pmc, parent_rate); 420 + return clk_main_recalc_rate(clkmain->regmap, parent_rate); 390 421 } 391 422 392 423 static const struct clk_ops rm9200_main_ops = { ··· 396 427 }; 397 428 398 429 static struct clk * __init 399 - at91_clk_register_rm9200_main(struct at91_pmc *pmc, 430 + at91_clk_register_rm9200_main(struct regmap *regmap, 400 431 const char *name, 401 432 const char *parent_name) 402 433 { ··· 404 435 struct clk *clk = NULL; 405 436 struct clk_init_data init; 406 437 407 - if (!pmc || !name) 438 + if (!name) 408 439 return ERR_PTR(-EINVAL); 409 440 410 441 if (!parent_name) ··· 421 452 init.flags = 0; 422 453 423 454 clkmain->hw.init = &init; 424 - clkmain->pmc = pmc; 455 + clkmain->regmap = regmap; 425 456 426 457 clk = clk_register(NULL, &clkmain->hw); 427 458 if (IS_ERR(clk)) ··· 430 461 return clk; 431 462 } 432 463 433 - void __init of_at91rm9200_clk_main_setup(struct device_node *np, 434 - struct at91_pmc *pmc) 464 + static void __init of_at91rm9200_clk_main_setup(struct device_node *np) 435 465 { 436 466 struct clk *clk; 437 467 const char *parent_name; 438 468 const char *name = np->name; 469 + struct regmap *regmap; 439 470 440 471 parent_name = of_clk_get_parent_name(np, 0); 441 472 of_property_read_string(np, "clock-output-names", &name); 442 473 443 - clk = at91_clk_register_rm9200_main(pmc, name, parent_name); 474 + regmap = syscon_node_to_regmap(of_get_parent(np)); 475 + if (IS_ERR(regmap)) 476 + return; 477 + 478 + clk = at91_clk_register_rm9200_main(regmap, name, parent_name); 444 479 if (IS_ERR(clk)) 445 480 return; 446 481 447 482 of_clk_add_provider(np, of_clk_src_simple_get, clk); 448 483 } 484 + CLK_OF_DECLARE(at91rm9200_clk_main, "atmel,at91rm9200-clk-main", 485 + of_at91rm9200_clk_main_setup); 449 486 450 - static irqreturn_t clk_sam9x5_main_irq_handler(int irq, void *dev_id) 487 + static inline bool clk_sam9x5_main_ready(struct regmap *regmap) 451 488 { 452 - struct clk_sam9x5_main *clkmain = dev_id; 489 + unsigned int status; 453 490 454 - wake_up(&clkmain->wait); 455 - disable_irq_nosync(clkmain->irq); 491 + regmap_read(regmap, AT91_PMC_SR, &status); 456 492 457 - return IRQ_HANDLED; 493 + return status & AT91_PMC_MOSCSELS ? 1 : 0; 458 494 } 459 495 460 496 static int clk_sam9x5_main_prepare(struct clk_hw *hw) 461 497 { 462 498 struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw); 463 - struct at91_pmc *pmc = clkmain->pmc; 499 + struct regmap *regmap = clkmain->regmap; 464 500 465 - while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS)) { 466 - enable_irq(clkmain->irq); 467 - wait_event(clkmain->wait, 468 - pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS); 469 - } 501 + while (!clk_sam9x5_main_ready(regmap)) 502 + cpu_relax(); 470 503 471 - return clk_main_probe_frequency(pmc); 504 + return clk_main_probe_frequency(regmap); 472 505 } 473 506 474 507 static int clk_sam9x5_main_is_prepared(struct clk_hw *hw) 475 508 { 476 509 struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw); 477 510 478 - return !!(pmc_read(clkmain->pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS); 511 + return clk_sam9x5_main_ready(clkmain->regmap); 479 512 } 480 513 481 514 static unsigned long clk_sam9x5_main_recalc_rate(struct clk_hw *hw, ··· 485 514 { 486 515 struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw); 487 516 488 - return clk_main_recalc_rate(clkmain->pmc, parent_rate); 517 + return clk_main_recalc_rate(clkmain->regmap, parent_rate); 489 518 } 490 519 491 520 static int clk_sam9x5_main_set_parent(struct clk_hw *hw, u8 index) 492 521 { 493 522 struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw); 494 - struct at91_pmc *pmc = clkmain->pmc; 495 - u32 tmp; 523 + struct regmap *regmap = clkmain->regmap; 524 + unsigned int tmp; 496 525 497 526 if (index > 1) 498 527 return -EINVAL; 499 528 500 - tmp = pmc_read(pmc, AT91_CKGR_MOR) & ~MOR_KEY_MASK; 529 + regmap_read(regmap, AT91_CKGR_MOR, &tmp); 530 + tmp &= ~MOR_KEY_MASK; 501 531 502 532 if (index && !(tmp & AT91_PMC_MOSCSEL)) 503 - pmc_write(pmc, AT91_CKGR_MOR, tmp | AT91_PMC_MOSCSEL); 533 + regmap_write(regmap, AT91_CKGR_MOR, tmp | AT91_PMC_MOSCSEL); 504 534 else if (!index && (tmp & AT91_PMC_MOSCSEL)) 505 - pmc_write(pmc, AT91_CKGR_MOR, tmp & ~AT91_PMC_MOSCSEL); 535 + regmap_write(regmap, AT91_CKGR_MOR, tmp & ~AT91_PMC_MOSCSEL); 506 536 507 - while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS)) { 508 - enable_irq(clkmain->irq); 509 - wait_event(clkmain->wait, 510 - pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS); 511 - } 537 + while (!clk_sam9x5_main_ready(regmap)) 538 + cpu_relax(); 512 539 513 540 return 0; 514 541 } ··· 514 545 static u8 clk_sam9x5_main_get_parent(struct clk_hw *hw) 515 546 { 516 547 struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw); 548 + unsigned int status; 517 549 518 - return !!(pmc_read(clkmain->pmc, AT91_CKGR_MOR) & AT91_PMC_MOSCEN); 550 + regmap_read(clkmain->regmap, AT91_CKGR_MOR, &status); 551 + 552 + return status & AT91_PMC_MOSCEN ? 1 : 0; 519 553 } 520 554 521 555 static const struct clk_ops sam9x5_main_ops = { ··· 530 558 }; 531 559 532 560 static struct clk * __init 533 - at91_clk_register_sam9x5_main(struct at91_pmc *pmc, 534 - unsigned int irq, 561 + at91_clk_register_sam9x5_main(struct regmap *regmap, 535 562 const char *name, 536 563 const char **parent_names, 537 564 int num_parents) 538 565 { 539 - int ret; 540 566 struct clk_sam9x5_main *clkmain; 541 567 struct clk *clk = NULL; 542 568 struct clk_init_data init; 569 + unsigned int status; 543 570 544 - if (!pmc || !irq || !name) 571 + if (!name) 545 572 return ERR_PTR(-EINVAL); 546 573 547 574 if (!parent_names || !num_parents) ··· 557 586 init.flags = CLK_SET_PARENT_GATE; 558 587 559 588 clkmain->hw.init = &init; 560 - clkmain->pmc = pmc; 561 - clkmain->irq = irq; 562 - clkmain->parent = !!(pmc_read(clkmain->pmc, AT91_CKGR_MOR) & 563 - AT91_PMC_MOSCEN); 564 - init_waitqueue_head(&clkmain->wait); 565 - irq_set_status_flags(clkmain->irq, IRQ_NOAUTOEN); 566 - ret = request_irq(clkmain->irq, clk_sam9x5_main_irq_handler, 567 - IRQF_TRIGGER_HIGH, name, clkmain); 568 - if (ret) 569 - return ERR_PTR(ret); 589 + clkmain->regmap = regmap; 590 + regmap_read(clkmain->regmap, AT91_CKGR_MOR, &status); 591 + clkmain->parent = status & AT91_PMC_MOSCEN ? 1 : 0; 570 592 571 593 clk = clk_register(NULL, &clkmain->hw); 572 - if (IS_ERR(clk)) { 573 - free_irq(clkmain->irq, clkmain); 594 + if (IS_ERR(clk)) 574 595 kfree(clkmain); 575 - } 576 596 577 597 return clk; 578 598 } 579 599 580 - void __init of_at91sam9x5_clk_main_setup(struct device_node *np, 581 - struct at91_pmc *pmc) 600 + static void __init of_at91sam9x5_clk_main_setup(struct device_node *np) 582 601 { 583 602 struct clk *clk; 584 603 const char *parent_names[2]; 585 604 int num_parents; 586 - unsigned int irq; 587 605 const char *name = np->name; 606 + struct regmap *regmap; 588 607 589 608 num_parents = of_clk_get_parent_count(np); 590 609 if (num_parents <= 0 || num_parents > 2) 591 610 return; 592 611 593 612 of_clk_parent_fill(np, parent_names, num_parents); 613 + regmap = syscon_node_to_regmap(of_get_parent(np)); 614 + if (IS_ERR(regmap)) 615 + return; 594 616 595 617 of_property_read_string(np, "clock-output-names", &name); 596 618 597 - irq = irq_of_parse_and_map(np, 0); 598 - if (!irq) 599 - return; 600 - 601 - clk = at91_clk_register_sam9x5_main(pmc, irq, name, parent_names, 619 + clk = at91_clk_register_sam9x5_main(regmap, name, parent_names, 602 620 num_parents); 603 621 if (IS_ERR(clk)) 604 622 return; 605 623 606 624 of_clk_add_provider(np, of_clk_src_simple_get, clk); 607 625 } 626 + CLK_OF_DECLARE(at91sam9x5_clk_main, "atmel,at91sam9x5-clk-main", 627 + of_at91sam9x5_clk_main_setup);
+37 -57
drivers/clk/at91/clk-master.c
··· 12 12 #include <linux/clkdev.h> 13 13 #include <linux/clk/at91_pmc.h> 14 14 #include <linux/of.h> 15 - #include <linux/of_address.h> 16 - #include <linux/of_irq.h> 17 - #include <linux/io.h> 18 - #include <linux/wait.h> 19 - #include <linux/sched.h> 20 - #include <linux/interrupt.h> 21 - #include <linux/irq.h> 15 + #include <linux/mfd/syscon.h> 16 + #include <linux/regmap.h> 22 17 23 18 #include "pmc.h" 24 19 ··· 39 44 40 45 struct clk_master { 41 46 struct clk_hw hw; 42 - struct at91_pmc *pmc; 43 - unsigned int irq; 44 - wait_queue_head_t wait; 47 + struct regmap *regmap; 45 48 const struct clk_master_layout *layout; 46 49 const struct clk_master_characteristics *characteristics; 47 50 }; 48 51 49 - static irqreturn_t clk_master_irq_handler(int irq, void *dev_id) 52 + static inline bool clk_master_ready(struct regmap *regmap) 50 53 { 51 - struct clk_master *master = (struct clk_master *)dev_id; 54 + unsigned int status; 52 55 53 - wake_up(&master->wait); 54 - disable_irq_nosync(master->irq); 56 + regmap_read(regmap, AT91_PMC_SR, &status); 55 57 56 - return IRQ_HANDLED; 58 + return status & AT91_PMC_MCKRDY ? 1 : 0; 57 59 } 60 + 58 61 static int clk_master_prepare(struct clk_hw *hw) 59 62 { 60 63 struct clk_master *master = to_clk_master(hw); 61 - struct at91_pmc *pmc = master->pmc; 62 64 63 - while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MCKRDY)) { 64 - enable_irq(master->irq); 65 - wait_event(master->wait, 66 - pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MCKRDY); 67 - } 65 + while (!clk_master_ready(master->regmap)) 66 + cpu_relax(); 68 67 69 68 return 0; 70 69 } ··· 67 78 { 68 79 struct clk_master *master = to_clk_master(hw); 69 80 70 - return !!(pmc_read(master->pmc, AT91_PMC_SR) & AT91_PMC_MCKRDY); 81 + return clk_master_ready(master->regmap); 71 82 } 72 83 73 84 static unsigned long clk_master_recalc_rate(struct clk_hw *hw, ··· 77 88 u8 div; 78 89 unsigned long rate = parent_rate; 79 90 struct clk_master *master = to_clk_master(hw); 80 - struct at91_pmc *pmc = master->pmc; 81 91 const struct clk_master_layout *layout = master->layout; 82 92 const struct clk_master_characteristics *characteristics = 83 93 master->characteristics; 84 - u32 tmp; 94 + unsigned int mckr; 85 95 86 - pmc_lock(pmc); 87 - tmp = pmc_read(pmc, AT91_PMC_MCKR) & layout->mask; 88 - pmc_unlock(pmc); 96 + regmap_read(master->regmap, AT91_PMC_MCKR, &mckr); 97 + mckr &= layout->mask; 89 98 90 - pres = (tmp >> layout->pres_shift) & MASTER_PRES_MASK; 91 - div = (tmp >> MASTER_DIV_SHIFT) & MASTER_DIV_MASK; 99 + pres = (mckr >> layout->pres_shift) & MASTER_PRES_MASK; 100 + div = (mckr >> MASTER_DIV_SHIFT) & MASTER_DIV_MASK; 92 101 93 102 if (characteristics->have_div3_pres && pres == MASTER_PRES_MAX) 94 103 rate /= 3; ··· 106 119 static u8 clk_master_get_parent(struct clk_hw *hw) 107 120 { 108 121 struct clk_master *master = to_clk_master(hw); 109 - struct at91_pmc *pmc = master->pmc; 122 + unsigned int mckr; 110 123 111 - return pmc_read(pmc, AT91_PMC_MCKR) & AT91_PMC_CSS; 124 + regmap_read(master->regmap, AT91_PMC_MCKR, &mckr); 125 + 126 + return mckr & AT91_PMC_CSS; 112 127 } 113 128 114 129 static const struct clk_ops master_ops = { ··· 121 132 }; 122 133 123 134 static struct clk * __init 124 - at91_clk_register_master(struct at91_pmc *pmc, unsigned int irq, 135 + at91_clk_register_master(struct regmap *regmap, 125 136 const char *name, int num_parents, 126 137 const char **parent_names, 127 138 const struct clk_master_layout *layout, 128 139 const struct clk_master_characteristics *characteristics) 129 140 { 130 - int ret; 131 141 struct clk_master *master; 132 142 struct clk *clk = NULL; 133 143 struct clk_init_data init; 134 144 135 - if (!pmc || !irq || !name || !num_parents || !parent_names) 145 + if (!name || !num_parents || !parent_names) 136 146 return ERR_PTR(-EINVAL); 137 147 138 148 master = kzalloc(sizeof(*master), GFP_KERNEL); ··· 147 159 master->hw.init = &init; 148 160 master->layout = layout; 149 161 master->characteristics = characteristics; 150 - master->pmc = pmc; 151 - master->irq = irq; 152 - init_waitqueue_head(&master->wait); 153 - irq_set_status_flags(master->irq, IRQ_NOAUTOEN); 154 - ret = request_irq(master->irq, clk_master_irq_handler, 155 - IRQF_TRIGGER_HIGH, "clk-master", master); 156 - if (ret) { 157 - kfree(master); 158 - return ERR_PTR(ret); 159 - } 162 + master->regmap = regmap; 160 163 161 164 clk = clk_register(NULL, &master->hw); 162 165 if (IS_ERR(clk)) { 163 - free_irq(master->irq, master); 164 166 kfree(master); 165 167 } 166 168 ··· 195 217 } 196 218 197 219 static void __init 198 - of_at91_clk_master_setup(struct device_node *np, struct at91_pmc *pmc, 220 + of_at91_clk_master_setup(struct device_node *np, 199 221 const struct clk_master_layout *layout) 200 222 { 201 223 struct clk *clk; 202 224 int num_parents; 203 - unsigned int irq; 204 225 const char *parent_names[MASTER_SOURCE_MAX]; 205 226 const char *name = np->name; 206 227 struct clk_master_characteristics *characteristics; 228 + struct regmap *regmap; 207 229 208 230 num_parents = of_clk_get_parent_count(np); 209 231 if (num_parents <= 0 || num_parents > MASTER_SOURCE_MAX) ··· 217 239 if (!characteristics) 218 240 return; 219 241 220 - irq = irq_of_parse_and_map(np, 0); 221 - if (!irq) 222 - goto out_free_characteristics; 242 + regmap = syscon_node_to_regmap(of_get_parent(np)); 243 + if (IS_ERR(regmap)) 244 + return; 223 245 224 - clk = at91_clk_register_master(pmc, irq, name, num_parents, 246 + clk = at91_clk_register_master(regmap, name, num_parents, 225 247 parent_names, layout, 226 248 characteristics); 227 249 if (IS_ERR(clk)) ··· 234 256 kfree(characteristics); 235 257 } 236 258 237 - void __init of_at91rm9200_clk_master_setup(struct device_node *np, 238 - struct at91_pmc *pmc) 259 + static void __init of_at91rm9200_clk_master_setup(struct device_node *np) 239 260 { 240 - of_at91_clk_master_setup(np, pmc, &at91rm9200_master_layout); 261 + of_at91_clk_master_setup(np, &at91rm9200_master_layout); 241 262 } 263 + CLK_OF_DECLARE(at91rm9200_clk_master, "atmel,at91rm9200-clk-master", 264 + of_at91rm9200_clk_master_setup); 242 265 243 - void __init of_at91sam9x5_clk_master_setup(struct device_node *np, 244 - struct at91_pmc *pmc) 266 + static void __init of_at91sam9x5_clk_master_setup(struct device_node *np) 245 267 { 246 - of_at91_clk_master_setup(np, pmc, &at91sam9x5_master_layout); 268 + of_at91_clk_master_setup(np, &at91sam9x5_master_layout); 247 269 } 270 + CLK_OF_DECLARE(at91sam9x5_clk_master, "atmel,at91sam9x5-clk-master", 271 + of_at91sam9x5_clk_master_setup);
+79 -58
drivers/clk/at91/clk-peripheral.c
··· 12 12 #include <linux/clkdev.h> 13 13 #include <linux/clk/at91_pmc.h> 14 14 #include <linux/of.h> 15 - #include <linux/of_address.h> 16 - #include <linux/io.h> 15 + #include <linux/mfd/syscon.h> 16 + #include <linux/regmap.h> 17 17 18 18 #include "pmc.h" 19 + 20 + DEFINE_SPINLOCK(pmc_pcr_lock); 19 21 20 22 #define PERIPHERAL_MAX 64 21 23 ··· 35 33 36 34 struct clk_peripheral { 37 35 struct clk_hw hw; 38 - struct at91_pmc *pmc; 36 + struct regmap *regmap; 39 37 u32 id; 40 38 }; 41 39 ··· 43 41 44 42 struct clk_sam9x5_peripheral { 45 43 struct clk_hw hw; 46 - struct at91_pmc *pmc; 44 + struct regmap *regmap; 47 45 struct clk_range range; 46 + spinlock_t *lock; 48 47 u32 id; 49 48 u32 div; 50 49 bool auto_div; ··· 57 54 static int clk_peripheral_enable(struct clk_hw *hw) 58 55 { 59 56 struct clk_peripheral *periph = to_clk_peripheral(hw); 60 - struct at91_pmc *pmc = periph->pmc; 61 57 int offset = AT91_PMC_PCER; 62 58 u32 id = periph->id; 63 59 ··· 64 62 return 0; 65 63 if (id > PERIPHERAL_ID_MAX) 66 64 offset = AT91_PMC_PCER1; 67 - pmc_write(pmc, offset, PERIPHERAL_MASK(id)); 65 + regmap_write(periph->regmap, offset, PERIPHERAL_MASK(id)); 66 + 68 67 return 0; 69 68 } 70 69 71 70 static void clk_peripheral_disable(struct clk_hw *hw) 72 71 { 73 72 struct clk_peripheral *periph = to_clk_peripheral(hw); 74 - struct at91_pmc *pmc = periph->pmc; 75 73 int offset = AT91_PMC_PCDR; 76 74 u32 id = periph->id; 77 75 ··· 79 77 return; 80 78 if (id > PERIPHERAL_ID_MAX) 81 79 offset = AT91_PMC_PCDR1; 82 - pmc_write(pmc, offset, PERIPHERAL_MASK(id)); 80 + regmap_write(periph->regmap, offset, PERIPHERAL_MASK(id)); 83 81 } 84 82 85 83 static int clk_peripheral_is_enabled(struct clk_hw *hw) 86 84 { 87 85 struct clk_peripheral *periph = to_clk_peripheral(hw); 88 - struct at91_pmc *pmc = periph->pmc; 89 86 int offset = AT91_PMC_PCSR; 87 + unsigned int status; 90 88 u32 id = periph->id; 91 89 92 90 if (id < PERIPHERAL_ID_MIN) 93 91 return 1; 94 92 if (id > PERIPHERAL_ID_MAX) 95 93 offset = AT91_PMC_PCSR1; 96 - return !!(pmc_read(pmc, offset) & PERIPHERAL_MASK(id)); 94 + regmap_read(periph->regmap, offset, &status); 95 + 96 + return status & PERIPHERAL_MASK(id) ? 1 : 0; 97 97 } 98 98 99 99 static const struct clk_ops peripheral_ops = { ··· 105 101 }; 106 102 107 103 static struct clk * __init 108 - at91_clk_register_peripheral(struct at91_pmc *pmc, const char *name, 104 + at91_clk_register_peripheral(struct regmap *regmap, const char *name, 109 105 const char *parent_name, u32 id) 110 106 { 111 107 struct clk_peripheral *periph; 112 108 struct clk *clk = NULL; 113 109 struct clk_init_data init; 114 110 115 - if (!pmc || !name || !parent_name || id > PERIPHERAL_ID_MAX) 111 + if (!name || !parent_name || id > PERIPHERAL_ID_MAX) 116 112 return ERR_PTR(-EINVAL); 117 113 118 114 periph = kzalloc(sizeof(*periph), GFP_KERNEL); ··· 127 123 128 124 periph->id = id; 129 125 periph->hw.init = &init; 130 - periph->pmc = pmc; 126 + periph->regmap = regmap; 131 127 132 128 clk = clk_register(NULL, &periph->hw); 133 129 if (IS_ERR(clk)) ··· 164 160 static int clk_sam9x5_peripheral_enable(struct clk_hw *hw) 165 161 { 166 162 struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw); 167 - struct at91_pmc *pmc = periph->pmc; 168 - u32 tmp; 163 + unsigned long flags; 169 164 170 165 if (periph->id < PERIPHERAL_ID_MIN) 171 166 return 0; 172 167 173 - pmc_lock(pmc); 174 - pmc_write(pmc, AT91_PMC_PCR, (periph->id & AT91_PMC_PCR_PID_MASK)); 175 - tmp = pmc_read(pmc, AT91_PMC_PCR) & ~AT91_PMC_PCR_DIV_MASK; 176 - pmc_write(pmc, AT91_PMC_PCR, tmp | AT91_PMC_PCR_DIV(periph->div) 177 - | AT91_PMC_PCR_CMD 178 - | AT91_PMC_PCR_EN); 179 - pmc_unlock(pmc); 168 + spin_lock_irqsave(periph->lock, flags); 169 + regmap_write(periph->regmap, AT91_PMC_PCR, 170 + (periph->id & AT91_PMC_PCR_PID_MASK)); 171 + regmap_update_bits(periph->regmap, AT91_PMC_PCR, 172 + AT91_PMC_PCR_DIV_MASK | AT91_PMC_PCR_CMD | 173 + AT91_PMC_PCR_EN, 174 + AT91_PMC_PCR_DIV(periph->div) | 175 + AT91_PMC_PCR_CMD | 176 + AT91_PMC_PCR_EN); 177 + spin_unlock_irqrestore(periph->lock, flags); 178 + 180 179 return 0; 181 180 } 182 181 183 182 static void clk_sam9x5_peripheral_disable(struct clk_hw *hw) 184 183 { 185 184 struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw); 186 - struct at91_pmc *pmc = periph->pmc; 187 - u32 tmp; 185 + unsigned long flags; 188 186 189 187 if (periph->id < PERIPHERAL_ID_MIN) 190 188 return; 191 189 192 - pmc_lock(pmc); 193 - pmc_write(pmc, AT91_PMC_PCR, (periph->id & AT91_PMC_PCR_PID_MASK)); 194 - tmp = pmc_read(pmc, AT91_PMC_PCR) & ~AT91_PMC_PCR_EN; 195 - pmc_write(pmc, AT91_PMC_PCR, tmp | AT91_PMC_PCR_CMD); 196 - pmc_unlock(pmc); 190 + spin_lock_irqsave(periph->lock, flags); 191 + regmap_write(periph->regmap, AT91_PMC_PCR, 192 + (periph->id & AT91_PMC_PCR_PID_MASK)); 193 + regmap_update_bits(periph->regmap, AT91_PMC_PCR, 194 + AT91_PMC_PCR_EN | AT91_PMC_PCR_CMD, 195 + AT91_PMC_PCR_CMD); 196 + spin_unlock_irqrestore(periph->lock, flags); 197 197 } 198 198 199 199 static int clk_sam9x5_peripheral_is_enabled(struct clk_hw *hw) 200 200 { 201 201 struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw); 202 - struct at91_pmc *pmc = periph->pmc; 203 - int ret; 202 + unsigned long flags; 203 + unsigned int status; 204 204 205 205 if (periph->id < PERIPHERAL_ID_MIN) 206 206 return 1; 207 207 208 - pmc_lock(pmc); 209 - pmc_write(pmc, AT91_PMC_PCR, (periph->id & AT91_PMC_PCR_PID_MASK)); 210 - ret = !!(pmc_read(pmc, AT91_PMC_PCR) & AT91_PMC_PCR_EN); 211 - pmc_unlock(pmc); 208 + spin_lock_irqsave(periph->lock, flags); 209 + regmap_write(periph->regmap, AT91_PMC_PCR, 210 + (periph->id & AT91_PMC_PCR_PID_MASK)); 211 + regmap_read(periph->regmap, AT91_PMC_PCR, &status); 212 + spin_unlock_irqrestore(periph->lock, flags); 212 213 213 - return ret; 214 + return status & AT91_PMC_PCR_EN ? 1 : 0; 214 215 } 215 216 216 217 static unsigned long ··· 223 214 unsigned long parent_rate) 224 215 { 225 216 struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw); 226 - struct at91_pmc *pmc = periph->pmc; 227 - u32 tmp; 217 + unsigned long flags; 218 + unsigned int status; 228 219 229 220 if (periph->id < PERIPHERAL_ID_MIN) 230 221 return parent_rate; 231 222 232 - pmc_lock(pmc); 233 - pmc_write(pmc, AT91_PMC_PCR, (periph->id & AT91_PMC_PCR_PID_MASK)); 234 - tmp = pmc_read(pmc, AT91_PMC_PCR); 235 - pmc_unlock(pmc); 223 + spin_lock_irqsave(periph->lock, flags); 224 + regmap_write(periph->regmap, AT91_PMC_PCR, 225 + (periph->id & AT91_PMC_PCR_PID_MASK)); 226 + regmap_read(periph->regmap, AT91_PMC_PCR, &status); 227 + spin_unlock_irqrestore(periph->lock, flags); 236 228 237 - if (tmp & AT91_PMC_PCR_EN) { 238 - periph->div = PERIPHERAL_RSHIFT(tmp); 229 + if (status & AT91_PMC_PCR_EN) { 230 + periph->div = PERIPHERAL_RSHIFT(status); 239 231 periph->auto_div = false; 240 232 } else { 241 233 clk_sam9x5_peripheral_autodiv(periph); ··· 328 318 }; 329 319 330 320 static struct clk * __init 331 - at91_clk_register_sam9x5_peripheral(struct at91_pmc *pmc, const char *name, 332 - const char *parent_name, u32 id, 333 - const struct clk_range *range) 321 + at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock, 322 + const char *name, const char *parent_name, 323 + u32 id, const struct clk_range *range) 334 324 { 335 325 struct clk_sam9x5_peripheral *periph; 336 326 struct clk *clk = NULL; 337 327 struct clk_init_data init; 338 328 339 - if (!pmc || !name || !parent_name) 329 + if (!name || !parent_name) 340 330 return ERR_PTR(-EINVAL); 341 331 342 332 periph = kzalloc(sizeof(*periph), GFP_KERNEL); ··· 352 342 periph->id = id; 353 343 periph->hw.init = &init; 354 344 periph->div = 0; 355 - periph->pmc = pmc; 345 + periph->regmap = regmap; 346 + periph->lock = lock; 356 347 periph->auto_div = true; 357 348 periph->range = *range; 358 349 ··· 367 356 } 368 357 369 358 static void __init 370 - of_at91_clk_periph_setup(struct device_node *np, struct at91_pmc *pmc, u8 type) 359 + of_at91_clk_periph_setup(struct device_node *np, u8 type) 371 360 { 372 361 int num; 373 362 u32 id; ··· 375 364 const char *parent_name; 376 365 const char *name; 377 366 struct device_node *periphclknp; 367 + struct regmap *regmap; 378 368 379 369 parent_name = of_clk_get_parent_name(np, 0); 380 370 if (!parent_name) ··· 383 371 384 372 num = of_get_child_count(np); 385 373 if (!num || num > PERIPHERAL_MAX) 374 + return; 375 + 376 + regmap = syscon_node_to_regmap(of_get_parent(np)); 377 + if (IS_ERR(regmap)) 386 378 return; 387 379 388 380 for_each_child_of_node(np, periphclknp) { ··· 400 384 name = periphclknp->name; 401 385 402 386 if (type == PERIPHERAL_AT91RM9200) { 403 - clk = at91_clk_register_peripheral(pmc, name, 387 + clk = at91_clk_register_peripheral(regmap, name, 404 388 parent_name, id); 405 389 } else { 406 390 struct clk_range range = CLK_RANGE(0, 0); ··· 409 393 "atmel,clk-output-range", 410 394 &range); 411 395 412 - clk = at91_clk_register_sam9x5_peripheral(pmc, name, 396 + clk = at91_clk_register_sam9x5_peripheral(regmap, 397 + &pmc_pcr_lock, 398 + name, 413 399 parent_name, 414 400 id, &range); 415 401 } ··· 423 405 } 424 406 } 425 407 426 - void __init of_at91rm9200_clk_periph_setup(struct device_node *np, 427 - struct at91_pmc *pmc) 408 + static void __init of_at91rm9200_clk_periph_setup(struct device_node *np) 428 409 { 429 - of_at91_clk_periph_setup(np, pmc, PERIPHERAL_AT91RM9200); 410 + of_at91_clk_periph_setup(np, PERIPHERAL_AT91RM9200); 430 411 } 412 + CLK_OF_DECLARE(at91rm9200_clk_periph, "atmel,at91rm9200-clk-peripheral", 413 + of_at91rm9200_clk_periph_setup); 431 414 432 - void __init of_at91sam9x5_clk_periph_setup(struct device_node *np, 433 - struct at91_pmc *pmc) 415 + static void __init of_at91sam9x5_clk_periph_setup(struct device_node *np) 434 416 { 435 - of_at91_clk_periph_setup(np, pmc, PERIPHERAL_AT91SAM9X5); 417 + of_at91_clk_periph_setup(np, PERIPHERAL_AT91SAM9X5); 436 418 } 419 + CLK_OF_DECLARE(at91sam9x5_clk_periph, "atmel,at91sam9x5-clk-peripheral", 420 + of_at91sam9x5_clk_periph_setup); 421 +
+65 -83
drivers/clk/at91/clk-pll.c
··· 12 12 #include <linux/clkdev.h> 13 13 #include <linux/clk/at91_pmc.h> 14 14 #include <linux/of.h> 15 - #include <linux/of_address.h> 16 - #include <linux/of_irq.h> 17 - #include <linux/io.h> 18 - #include <linux/kernel.h> 19 - #include <linux/wait.h> 20 - #include <linux/sched.h> 21 - #include <linux/interrupt.h> 22 - #include <linux/irq.h> 15 + #include <linux/mfd/syscon.h> 16 + #include <linux/regmap.h> 23 17 24 18 #include "pmc.h" 25 19 ··· 52 58 53 59 struct clk_pll { 54 60 struct clk_hw hw; 55 - struct at91_pmc *pmc; 56 - unsigned int irq; 57 - wait_queue_head_t wait; 61 + struct regmap *regmap; 58 62 u8 id; 59 63 u8 div; 60 64 u8 range; ··· 61 69 const struct clk_pll_characteristics *characteristics; 62 70 }; 63 71 64 - static irqreturn_t clk_pll_irq_handler(int irq, void *dev_id) 72 + static inline bool clk_pll_ready(struct regmap *regmap, int id) 65 73 { 66 - struct clk_pll *pll = (struct clk_pll *)dev_id; 74 + unsigned int status; 67 75 68 - wake_up(&pll->wait); 69 - disable_irq_nosync(pll->irq); 76 + regmap_read(regmap, AT91_PMC_SR, &status); 70 77 71 - return IRQ_HANDLED; 78 + return status & PLL_STATUS_MASK(id) ? 1 : 0; 72 79 } 73 80 74 81 static int clk_pll_prepare(struct clk_hw *hw) 75 82 { 76 83 struct clk_pll *pll = to_clk_pll(hw); 77 - struct at91_pmc *pmc = pll->pmc; 84 + struct regmap *regmap = pll->regmap; 78 85 const struct clk_pll_layout *layout = pll->layout; 79 86 const struct clk_pll_characteristics *characteristics = 80 87 pll->characteristics; ··· 81 90 u32 mask = PLL_STATUS_MASK(id); 82 91 int offset = PLL_REG(id); 83 92 u8 out = 0; 84 - u32 pllr, icpr; 93 + unsigned int pllr; 94 + unsigned int status; 85 95 u8 div; 86 96 u16 mul; 87 97 88 - pllr = pmc_read(pmc, offset); 98 + regmap_read(regmap, offset, &pllr); 89 99 div = PLL_DIV(pllr); 90 100 mul = PLL_MUL(pllr, layout); 91 101 92 - if ((pmc_read(pmc, AT91_PMC_SR) & mask) && 102 + regmap_read(regmap, AT91_PMC_SR, &status); 103 + if ((status & mask) && 93 104 (div == pll->div && mul == pll->mul)) 94 105 return 0; 95 106 96 107 if (characteristics->out) 97 108 out = characteristics->out[pll->range]; 98 - if (characteristics->icpll) { 99 - icpr = pmc_read(pmc, AT91_PMC_PLLICPR) & ~PLL_ICPR_MASK(id); 100 - icpr |= (characteristics->icpll[pll->range] << 101 - PLL_ICPR_SHIFT(id)); 102 - pmc_write(pmc, AT91_PMC_PLLICPR, icpr); 103 - } 104 109 105 - pllr &= ~layout->pllr_mask; 106 - pllr |= layout->pllr_mask & 107 - (pll->div | (PLL_MAX_COUNT << PLL_COUNT_SHIFT) | 108 - (out << PLL_OUT_SHIFT) | 109 - ((pll->mul & layout->mul_mask) << layout->mul_shift)); 110 - pmc_write(pmc, offset, pllr); 110 + if (characteristics->icpll) 111 + regmap_update_bits(regmap, AT91_PMC_PLLICPR, PLL_ICPR_MASK(id), 112 + characteristics->icpll[pll->range] << PLL_ICPR_SHIFT(id)); 111 113 112 - while (!(pmc_read(pmc, AT91_PMC_SR) & mask)) { 113 - enable_irq(pll->irq); 114 - wait_event(pll->wait, 115 - pmc_read(pmc, AT91_PMC_SR) & mask); 116 - } 114 + regmap_update_bits(regmap, offset, layout->pllr_mask, 115 + pll->div | (PLL_MAX_COUNT << PLL_COUNT_SHIFT) | 116 + (out << PLL_OUT_SHIFT) | 117 + ((pll->mul & layout->mul_mask) << layout->mul_shift)); 118 + 119 + while (!clk_pll_ready(regmap, pll->id)) 120 + cpu_relax(); 117 121 118 122 return 0; 119 123 } ··· 116 130 static int clk_pll_is_prepared(struct clk_hw *hw) 117 131 { 118 132 struct clk_pll *pll = to_clk_pll(hw); 119 - struct at91_pmc *pmc = pll->pmc; 120 133 121 - return !!(pmc_read(pmc, AT91_PMC_SR) & 122 - PLL_STATUS_MASK(pll->id)); 134 + return clk_pll_ready(pll->regmap, pll->id); 123 135 } 124 136 125 137 static void clk_pll_unprepare(struct clk_hw *hw) 126 138 { 127 139 struct clk_pll *pll = to_clk_pll(hw); 128 - struct at91_pmc *pmc = pll->pmc; 129 - const struct clk_pll_layout *layout = pll->layout; 130 - int offset = PLL_REG(pll->id); 131 - u32 tmp = pmc_read(pmc, offset) & ~(layout->pllr_mask); 140 + unsigned int mask = pll->layout->pllr_mask; 132 141 133 - pmc_write(pmc, offset, tmp); 142 + regmap_update_bits(pll->regmap, PLL_REG(pll->id), mask, ~mask); 134 143 } 135 144 136 145 static unsigned long clk_pll_recalc_rate(struct clk_hw *hw, 137 146 unsigned long parent_rate) 138 147 { 139 148 struct clk_pll *pll = to_clk_pll(hw); 149 + unsigned int pllr; 150 + u16 mul; 151 + u8 div; 140 152 141 - if (!pll->div || !pll->mul) 153 + regmap_read(pll->regmap, PLL_REG(pll->id), &pllr); 154 + 155 + div = PLL_DIV(pllr); 156 + mul = PLL_MUL(pllr, pll->layout); 157 + 158 + if (!div || !mul) 142 159 return 0; 143 160 144 - return (parent_rate / pll->div) * (pll->mul + 1); 161 + return (parent_rate / div) * (mul + 1); 145 162 } 146 163 147 164 static long clk_pll_get_best_div_mul(struct clk_pll *pll, unsigned long rate, ··· 297 308 }; 298 309 299 310 static struct clk * __init 300 - at91_clk_register_pll(struct at91_pmc *pmc, unsigned int irq, const char *name, 311 + at91_clk_register_pll(struct regmap *regmap, const char *name, 301 312 const char *parent_name, u8 id, 302 313 const struct clk_pll_layout *layout, 303 314 const struct clk_pll_characteristics *characteristics) ··· 305 316 struct clk_pll *pll; 306 317 struct clk *clk = NULL; 307 318 struct clk_init_data init; 308 - int ret; 309 319 int offset = PLL_REG(id); 310 - u32 tmp; 320 + unsigned int pllr; 311 321 312 322 if (id > PLL_MAX_ID) 313 323 return ERR_PTR(-EINVAL); ··· 325 337 pll->hw.init = &init; 326 338 pll->layout = layout; 327 339 pll->characteristics = characteristics; 328 - pll->pmc = pmc; 329 - pll->irq = irq; 330 - tmp = pmc_read(pmc, offset) & layout->pllr_mask; 331 - pll->div = PLL_DIV(tmp); 332 - pll->mul = PLL_MUL(tmp, layout); 333 - init_waitqueue_head(&pll->wait); 334 - irq_set_status_flags(pll->irq, IRQ_NOAUTOEN); 335 - ret = request_irq(pll->irq, clk_pll_irq_handler, IRQF_TRIGGER_HIGH, 336 - id ? "clk-pllb" : "clk-plla", pll); 337 - if (ret) { 338 - kfree(pll); 339 - return ERR_PTR(ret); 340 - } 340 + pll->regmap = regmap; 341 + regmap_read(regmap, offset, &pllr); 342 + pll->div = PLL_DIV(pllr); 343 + pll->mul = PLL_MUL(pllr, layout); 341 344 342 345 clk = clk_register(NULL, &pll->hw); 343 346 if (IS_ERR(clk)) { 344 - free_irq(pll->irq, pll); 345 347 kfree(pll); 346 348 } 347 349 ··· 461 483 } 462 484 463 485 static void __init 464 - of_at91_clk_pll_setup(struct device_node *np, struct at91_pmc *pmc, 486 + of_at91_clk_pll_setup(struct device_node *np, 465 487 const struct clk_pll_layout *layout) 466 488 { 467 489 u32 id; 468 - unsigned int irq; 469 490 struct clk *clk; 491 + struct regmap *regmap; 470 492 const char *parent_name; 471 493 const char *name = np->name; 472 494 struct clk_pll_characteristics *characteristics; ··· 478 500 479 501 of_property_read_string(np, "clock-output-names", &name); 480 502 503 + regmap = syscon_node_to_regmap(of_get_parent(np)); 504 + if (IS_ERR(regmap)) 505 + return; 506 + 481 507 characteristics = of_at91_clk_pll_get_characteristics(np); 482 508 if (!characteristics) 483 509 return; 484 510 485 - irq = irq_of_parse_and_map(np, 0); 486 - if (!irq) 487 - return; 488 - 489 - clk = at91_clk_register_pll(pmc, irq, name, parent_name, id, layout, 511 + clk = at91_clk_register_pll(regmap, name, parent_name, id, layout, 490 512 characteristics); 491 513 if (IS_ERR(clk)) 492 514 goto out_free_characteristics; ··· 498 520 kfree(characteristics); 499 521 } 500 522 501 - void __init of_at91rm9200_clk_pll_setup(struct device_node *np, 502 - struct at91_pmc *pmc) 523 + static void __init of_at91rm9200_clk_pll_setup(struct device_node *np) 503 524 { 504 - of_at91_clk_pll_setup(np, pmc, &at91rm9200_pll_layout); 525 + of_at91_clk_pll_setup(np, &at91rm9200_pll_layout); 505 526 } 527 + CLK_OF_DECLARE(at91rm9200_clk_pll, "atmel,at91rm9200-clk-pll", 528 + of_at91rm9200_clk_pll_setup); 506 529 507 - void __init of_at91sam9g45_clk_pll_setup(struct device_node *np, 508 - struct at91_pmc *pmc) 530 + static void __init of_at91sam9g45_clk_pll_setup(struct device_node *np) 509 531 { 510 - of_at91_clk_pll_setup(np, pmc, &at91sam9g45_pll_layout); 532 + of_at91_clk_pll_setup(np, &at91sam9g45_pll_layout); 511 533 } 534 + CLK_OF_DECLARE(at91sam9g45_clk_pll, "atmel,at91sam9g45-clk-pll", 535 + of_at91sam9g45_clk_pll_setup); 512 536 513 - void __init of_at91sam9g20_clk_pllb_setup(struct device_node *np, 514 - struct at91_pmc *pmc) 537 + static void __init of_at91sam9g20_clk_pllb_setup(struct device_node *np) 515 538 { 516 - of_at91_clk_pll_setup(np, pmc, &at91sam9g20_pllb_layout); 539 + of_at91_clk_pll_setup(np, &at91sam9g20_pllb_layout); 517 540 } 541 + CLK_OF_DECLARE(at91sam9g20_clk_pllb, "atmel,at91sam9g20-clk-pllb", 542 + of_at91sam9g20_clk_pllb_setup); 518 543 519 - void __init of_sama5d3_clk_pll_setup(struct device_node *np, 520 - struct at91_pmc *pmc) 544 + static void __init of_sama5d3_clk_pll_setup(struct device_node *np) 521 545 { 522 - of_at91_clk_pll_setup(np, pmc, &sama5d3_pll_layout); 546 + of_at91_clk_pll_setup(np, &sama5d3_pll_layout); 523 547 } 548 + CLK_OF_DECLARE(sama5d3_clk_pll, "atmel,sama5d3-clk-pll", 549 + of_sama5d3_clk_pll_setup);
+20 -24
drivers/clk/at91/clk-plldiv.c
··· 12 12 #include <linux/clkdev.h> 13 13 #include <linux/clk/at91_pmc.h> 14 14 #include <linux/of.h> 15 - #include <linux/of_address.h> 16 - #include <linux/io.h> 15 + #include <linux/mfd/syscon.h> 16 + #include <linux/regmap.h> 17 17 18 18 #include "pmc.h" 19 19 ··· 21 21 22 22 struct clk_plldiv { 23 23 struct clk_hw hw; 24 - struct at91_pmc *pmc; 24 + struct regmap *regmap; 25 25 }; 26 26 27 27 static unsigned long clk_plldiv_recalc_rate(struct clk_hw *hw, 28 28 unsigned long parent_rate) 29 29 { 30 30 struct clk_plldiv *plldiv = to_clk_plldiv(hw); 31 - struct at91_pmc *pmc = plldiv->pmc; 31 + unsigned int mckr; 32 32 33 - if (pmc_read(pmc, AT91_PMC_MCKR) & AT91_PMC_PLLADIV2) 33 + regmap_read(plldiv->regmap, AT91_PMC_MCKR, &mckr); 34 + 35 + if (mckr & AT91_PMC_PLLADIV2) 34 36 return parent_rate / 2; 35 37 36 38 return parent_rate; ··· 59 57 unsigned long parent_rate) 60 58 { 61 59 struct clk_plldiv *plldiv = to_clk_plldiv(hw); 62 - struct at91_pmc *pmc = plldiv->pmc; 63 - u32 tmp; 64 60 65 - if (parent_rate != rate && (parent_rate / 2) != rate) 61 + if ((parent_rate != rate) && (parent_rate / 2 != rate)) 66 62 return -EINVAL; 67 63 68 - pmc_lock(pmc); 69 - tmp = pmc_read(pmc, AT91_PMC_MCKR) & ~AT91_PMC_PLLADIV2; 70 - if ((parent_rate / 2) == rate) 71 - tmp |= AT91_PMC_PLLADIV2; 72 - pmc_write(pmc, AT91_PMC_MCKR, tmp); 73 - pmc_unlock(pmc); 64 + regmap_update_bits(plldiv->regmap, AT91_PMC_MCKR, AT91_PMC_PLLADIV2, 65 + parent_rate != rate ? AT91_PMC_PLLADIV2 : 0); 74 66 75 67 return 0; 76 68 } ··· 76 80 }; 77 81 78 82 static struct clk * __init 79 - at91_clk_register_plldiv(struct at91_pmc *pmc, const char *name, 83 + at91_clk_register_plldiv(struct regmap *regmap, const char *name, 80 84 const char *parent_name) 81 85 { 82 86 struct clk_plldiv *plldiv; ··· 94 98 init.flags = CLK_SET_RATE_GATE; 95 99 96 100 plldiv->hw.init = &init; 97 - plldiv->pmc = pmc; 101 + plldiv->regmap = regmap; 98 102 99 103 clk = clk_register(NULL, &plldiv->hw); 100 104 ··· 105 109 } 106 110 107 111 static void __init 108 - of_at91_clk_plldiv_setup(struct device_node *np, struct at91_pmc *pmc) 112 + of_at91sam9x5_clk_plldiv_setup(struct device_node *np) 109 113 { 110 114 struct clk *clk; 111 115 const char *parent_name; 112 116 const char *name = np->name; 117 + struct regmap *regmap; 113 118 114 119 parent_name = of_clk_get_parent_name(np, 0); 115 120 116 121 of_property_read_string(np, "clock-output-names", &name); 117 122 118 - clk = at91_clk_register_plldiv(pmc, name, parent_name); 123 + regmap = syscon_node_to_regmap(of_get_parent(np)); 124 + if (IS_ERR(regmap)) 125 + return; 119 126 127 + clk = at91_clk_register_plldiv(regmap, name, parent_name); 120 128 if (IS_ERR(clk)) 121 129 return; 122 130 123 131 of_clk_add_provider(np, of_clk_src_simple_get, clk); 124 132 return; 125 133 } 126 - 127 - void __init of_at91sam9x5_clk_plldiv_setup(struct device_node *np, 128 - struct at91_pmc *pmc) 129 - { 130 - of_at91_clk_plldiv_setup(np, pmc); 131 - } 134 + CLK_OF_DECLARE(at91sam9x5_clk_plldiv, "atmel,at91sam9x5-clk-plldiv", 135 + of_at91sam9x5_clk_plldiv_setup);
+51 -45
drivers/clk/at91/clk-programmable.c
··· 12 12 #include <linux/clkdev.h> 13 13 #include <linux/clk/at91_pmc.h> 14 14 #include <linux/of.h> 15 - #include <linux/of_address.h> 16 - #include <linux/io.h> 17 - #include <linux/wait.h> 18 - #include <linux/sched.h> 15 + #include <linux/mfd/syscon.h> 16 + #include <linux/regmap.h> 19 17 20 18 #include "pmc.h" 21 19 ··· 22 24 23 25 #define PROG_STATUS_MASK(id) (1 << ((id) + 8)) 24 26 #define PROG_PRES_MASK 0x7 27 + #define PROG_PRES(layout, pckr) ((pckr >> layout->pres_shift) & PROG_PRES_MASK) 25 28 #define PROG_MAX_RM9200_CSS 3 26 29 27 30 struct clk_programmable_layout { ··· 33 34 34 35 struct clk_programmable { 35 36 struct clk_hw hw; 36 - struct at91_pmc *pmc; 37 + struct regmap *regmap; 37 38 u8 id; 38 39 const struct clk_programmable_layout *layout; 39 40 }; ··· 43 44 static unsigned long clk_programmable_recalc_rate(struct clk_hw *hw, 44 45 unsigned long parent_rate) 45 46 { 46 - u32 pres; 47 47 struct clk_programmable *prog = to_clk_programmable(hw); 48 - struct at91_pmc *pmc = prog->pmc; 49 - const struct clk_programmable_layout *layout = prog->layout; 48 + unsigned int pckr; 50 49 51 - pres = (pmc_read(pmc, AT91_PMC_PCKR(prog->id)) >> layout->pres_shift) & 52 - PROG_PRES_MASK; 53 - return parent_rate >> pres; 50 + regmap_read(prog->regmap, AT91_PMC_PCKR(prog->id), &pckr); 51 + 52 + return parent_rate >> PROG_PRES(prog->layout, pckr); 54 53 } 55 54 56 55 static int clk_programmable_determine_rate(struct clk_hw *hw, ··· 98 101 { 99 102 struct clk_programmable *prog = to_clk_programmable(hw); 100 103 const struct clk_programmable_layout *layout = prog->layout; 101 - struct at91_pmc *pmc = prog->pmc; 102 - u32 tmp = pmc_read(pmc, AT91_PMC_PCKR(prog->id)) & ~layout->css_mask; 104 + unsigned int mask = layout->css_mask; 105 + unsigned int pckr = 0; 103 106 104 107 if (layout->have_slck_mck) 105 - tmp &= AT91_PMC_CSSMCK_MCK; 108 + mask |= AT91_PMC_CSSMCK_MCK; 106 109 107 110 if (index > layout->css_mask) { 108 - if (index > PROG_MAX_RM9200_CSS && layout->have_slck_mck) { 109 - tmp |= AT91_PMC_CSSMCK_MCK; 110 - return 0; 111 - } else { 111 + if (index > PROG_MAX_RM9200_CSS && !layout->have_slck_mck) 112 112 return -EINVAL; 113 - } 113 + 114 + pckr |= AT91_PMC_CSSMCK_MCK; 114 115 } 115 116 116 - pmc_write(pmc, AT91_PMC_PCKR(prog->id), tmp | index); 117 + regmap_update_bits(prog->regmap, AT91_PMC_PCKR(prog->id), mask, pckr); 118 + 117 119 return 0; 118 120 } 119 121 120 122 static u8 clk_programmable_get_parent(struct clk_hw *hw) 121 123 { 122 - u32 tmp; 123 - u8 ret; 124 124 struct clk_programmable *prog = to_clk_programmable(hw); 125 - struct at91_pmc *pmc = prog->pmc; 126 125 const struct clk_programmable_layout *layout = prog->layout; 126 + unsigned int pckr; 127 + u8 ret; 127 128 128 - tmp = pmc_read(pmc, AT91_PMC_PCKR(prog->id)); 129 - ret = tmp & layout->css_mask; 130 - if (layout->have_slck_mck && (tmp & AT91_PMC_CSSMCK_MCK) && !ret) 129 + regmap_read(prog->regmap, AT91_PMC_PCKR(prog->id), &pckr); 130 + 131 + ret = pckr & layout->css_mask; 132 + 133 + if (layout->have_slck_mck && (pckr & AT91_PMC_CSSMCK_MCK) && !ret) 131 134 ret = PROG_MAX_RM9200_CSS + 1; 132 135 133 136 return ret; ··· 137 140 unsigned long parent_rate) 138 141 { 139 142 struct clk_programmable *prog = to_clk_programmable(hw); 140 - struct at91_pmc *pmc = prog->pmc; 141 143 const struct clk_programmable_layout *layout = prog->layout; 142 144 unsigned long div = parent_rate / rate; 145 + unsigned int pckr; 143 146 int shift = 0; 144 - u32 tmp = pmc_read(pmc, AT91_PMC_PCKR(prog->id)) & 145 - ~(PROG_PRES_MASK << layout->pres_shift); 147 + 148 + regmap_read(prog->regmap, AT91_PMC_PCKR(prog->id), &pckr); 146 149 147 150 if (!div) 148 151 return -EINVAL; 149 152 150 153 shift = fls(div) - 1; 151 154 152 - if (div != (1<<shift)) 155 + if (div != (1 << shift)) 153 156 return -EINVAL; 154 157 155 158 if (shift >= PROG_PRES_MASK) 156 159 return -EINVAL; 157 160 158 - pmc_write(pmc, AT91_PMC_PCKR(prog->id), 159 - tmp | (shift << layout->pres_shift)); 161 + regmap_update_bits(prog->regmap, AT91_PMC_PCKR(prog->id), 162 + PROG_PRES_MASK << layout->pres_shift, 163 + shift << layout->pres_shift); 160 164 161 165 return 0; 162 166 } ··· 171 173 }; 172 174 173 175 static struct clk * __init 174 - at91_clk_register_programmable(struct at91_pmc *pmc, 176 + at91_clk_register_programmable(struct regmap *regmap, 175 177 const char *name, const char **parent_names, 176 178 u8 num_parents, u8 id, 177 179 const struct clk_programmable_layout *layout) ··· 196 198 prog->id = id; 197 199 prog->layout = layout; 198 200 prog->hw.init = &init; 199 - prog->pmc = pmc; 201 + prog->regmap = regmap; 200 202 201 203 clk = clk_register(NULL, &prog->hw); 202 204 if (IS_ERR(clk)) ··· 224 226 }; 225 227 226 228 static void __init 227 - of_at91_clk_prog_setup(struct device_node *np, struct at91_pmc *pmc, 229 + of_at91_clk_prog_setup(struct device_node *np, 228 230 const struct clk_programmable_layout *layout) 229 231 { 230 232 int num; ··· 234 236 const char *parent_names[PROG_SOURCE_MAX]; 235 237 const char *name; 236 238 struct device_node *progclknp; 239 + struct regmap *regmap; 237 240 238 241 num_parents = of_clk_get_parent_count(np); 239 242 if (num_parents <= 0 || num_parents > PROG_SOURCE_MAX) ··· 246 247 if (!num || num > (PROG_ID_MAX + 1)) 247 248 return; 248 249 250 + regmap = syscon_node_to_regmap(of_get_parent(np)); 251 + if (IS_ERR(regmap)) 252 + return; 253 + 249 254 for_each_child_of_node(np, progclknp) { 250 255 if (of_property_read_u32(progclknp, "reg", &id)) 251 256 continue; ··· 257 254 if (of_property_read_string(np, "clock-output-names", &name)) 258 255 name = progclknp->name; 259 256 260 - clk = at91_clk_register_programmable(pmc, name, 257 + clk = at91_clk_register_programmable(regmap, name, 261 258 parent_names, num_parents, 262 259 id, layout); 263 260 if (IS_ERR(clk)) ··· 268 265 } 269 266 270 267 271 - void __init of_at91rm9200_clk_prog_setup(struct device_node *np, 272 - struct at91_pmc *pmc) 268 + static void __init of_at91rm9200_clk_prog_setup(struct device_node *np) 273 269 { 274 - of_at91_clk_prog_setup(np, pmc, &at91rm9200_programmable_layout); 270 + of_at91_clk_prog_setup(np, &at91rm9200_programmable_layout); 275 271 } 272 + CLK_OF_DECLARE(at91rm9200_clk_prog, "atmel,at91rm9200-clk-programmable", 273 + of_at91rm9200_clk_prog_setup); 276 274 277 - void __init of_at91sam9g45_clk_prog_setup(struct device_node *np, 278 - struct at91_pmc *pmc) 275 + static void __init of_at91sam9g45_clk_prog_setup(struct device_node *np) 279 276 { 280 - of_at91_clk_prog_setup(np, pmc, &at91sam9g45_programmable_layout); 277 + of_at91_clk_prog_setup(np, &at91sam9g45_programmable_layout); 281 278 } 279 + CLK_OF_DECLARE(at91sam9g45_clk_prog, "atmel,at91sam9g45-clk-programmable", 280 + of_at91sam9g45_clk_prog_setup); 282 281 283 - void __init of_at91sam9x5_clk_prog_setup(struct device_node *np, 284 - struct at91_pmc *pmc) 282 + static void __init of_at91sam9x5_clk_prog_setup(struct device_node *np) 285 283 { 286 - of_at91_clk_prog_setup(np, pmc, &at91sam9x5_programmable_layout); 284 + of_at91_clk_prog_setup(np, &at91sam9x5_programmable_layout); 287 285 } 286 + CLK_OF_DECLARE(at91sam9x5_clk_prog, "atmel,at91sam9x5-clk-programmable", 287 + of_at91sam9x5_clk_prog_setup);
+19 -16
drivers/clk/at91/clk-slow.c
··· 12 12 13 13 #include <linux/clk-provider.h> 14 14 #include <linux/clkdev.h> 15 - #include <linux/slab.h> 16 15 #include <linux/clk/at91_pmc.h> 17 16 #include <linux/delay.h> 18 17 #include <linux/of.h> 19 - #include <linux/of_address.h> 20 - #include <linux/of_irq.h> 21 - #include <linux/io.h> 22 - #include <linux/interrupt.h> 23 - #include <linux/irq.h> 24 - #include <linux/sched.h> 25 - #include <linux/wait.h> 18 + #include <linux/mfd/syscon.h> 19 + #include <linux/regmap.h> 26 20 27 21 #include "pmc.h" 28 22 #include "sckc.h" ··· 52 58 53 59 struct clk_sam9260_slow { 54 60 struct clk_hw hw; 55 - struct at91_pmc *pmc; 61 + struct regmap *regmap; 56 62 }; 57 63 58 64 #define to_clk_sam9260_slow(hw) container_of(hw, struct clk_sam9260_slow, hw) ··· 382 388 static u8 clk_sam9260_slow_get_parent(struct clk_hw *hw) 383 389 { 384 390 struct clk_sam9260_slow *slowck = to_clk_sam9260_slow(hw); 391 + unsigned int status; 385 392 386 - return !!(pmc_read(slowck->pmc, AT91_PMC_SR) & AT91_PMC_OSCSEL); 393 + regmap_read(slowck->regmap, AT91_PMC_SR, &status); 394 + 395 + return status & AT91_PMC_OSCSEL ? 1 : 0; 387 396 } 388 397 389 398 static const struct clk_ops sam9260_slow_ops = { ··· 394 397 }; 395 398 396 399 static struct clk * __init 397 - at91_clk_register_sam9260_slow(struct at91_pmc *pmc, 400 + at91_clk_register_sam9260_slow(struct regmap *regmap, 398 401 const char *name, 399 402 const char **parent_names, 400 403 int num_parents) ··· 403 406 struct clk *clk = NULL; 404 407 struct clk_init_data init; 405 408 406 - if (!pmc || !name) 409 + if (!name) 407 410 return ERR_PTR(-EINVAL); 408 411 409 412 if (!parent_names || !num_parents) ··· 420 423 init.flags = 0; 421 424 422 425 slowck->hw.init = &init; 423 - slowck->pmc = pmc; 426 + slowck->regmap = regmap; 424 427 425 428 clk = clk_register(NULL, &slowck->hw); 426 429 if (IS_ERR(clk)) ··· 429 432 return clk; 430 433 } 431 434 432 - void __init of_at91sam9260_clk_slow_setup(struct device_node *np, 433 - struct at91_pmc *pmc) 435 + static void __init of_at91sam9260_clk_slow_setup(struct device_node *np) 434 436 { 435 437 struct clk *clk; 436 438 const char *parent_names[2]; 437 439 int num_parents; 438 440 const char *name = np->name; 441 + struct regmap *regmap; 439 442 440 443 num_parents = of_clk_get_parent_count(np); 441 444 if (num_parents != 2) 442 445 return; 443 446 444 447 of_clk_parent_fill(np, parent_names, num_parents); 448 + regmap = syscon_node_to_regmap(of_get_parent(np)); 449 + if (IS_ERR(regmap)) 450 + return; 445 451 446 452 of_property_read_string(np, "clock-output-names", &name); 447 453 448 - clk = at91_clk_register_sam9260_slow(pmc, name, parent_names, 454 + clk = at91_clk_register_sam9260_slow(regmap, name, parent_names, 449 455 num_parents); 450 456 if (IS_ERR(clk)) 451 457 return; 452 458 453 459 of_clk_add_provider(np, of_clk_src_simple_get, clk); 454 460 } 461 + 462 + CLK_OF_DECLARE(at91sam9260_clk_slow, "atmel,at91sam9260-clk-slow", 463 + of_at91sam9260_clk_slow_setup);
+30 -26
drivers/clk/at91/clk-smd.c
··· 12 12 #include <linux/clkdev.h> 13 13 #include <linux/clk/at91_pmc.h> 14 14 #include <linux/of.h> 15 - #include <linux/of_address.h> 16 - #include <linux/io.h> 15 + #include <linux/mfd/syscon.h> 16 + #include <linux/regmap.h> 17 17 18 18 #include "pmc.h" 19 19 ··· 24 24 25 25 struct at91sam9x5_clk_smd { 26 26 struct clk_hw hw; 27 - struct at91_pmc *pmc; 27 + struct regmap *regmap; 28 28 }; 29 29 30 30 #define to_at91sam9x5_clk_smd(hw) \ ··· 33 33 static unsigned long at91sam9x5_clk_smd_recalc_rate(struct clk_hw *hw, 34 34 unsigned long parent_rate) 35 35 { 36 - u32 tmp; 37 - u8 smddiv; 38 36 struct at91sam9x5_clk_smd *smd = to_at91sam9x5_clk_smd(hw); 39 - struct at91_pmc *pmc = smd->pmc; 37 + unsigned int smdr; 38 + u8 smddiv; 40 39 41 - tmp = pmc_read(pmc, AT91_PMC_SMD); 42 - smddiv = (tmp & AT91_PMC_SMD_DIV) >> SMD_DIV_SHIFT; 40 + regmap_read(smd->regmap, AT91_PMC_SMD, &smdr); 41 + smddiv = (smdr & AT91_PMC_SMD_DIV) >> SMD_DIV_SHIFT; 42 + 43 43 return parent_rate / (smddiv + 1); 44 44 } 45 45 ··· 67 67 68 68 static int at91sam9x5_clk_smd_set_parent(struct clk_hw *hw, u8 index) 69 69 { 70 - u32 tmp; 71 70 struct at91sam9x5_clk_smd *smd = to_at91sam9x5_clk_smd(hw); 72 - struct at91_pmc *pmc = smd->pmc; 73 71 74 72 if (index > 1) 75 73 return -EINVAL; 76 - tmp = pmc_read(pmc, AT91_PMC_SMD) & ~AT91_PMC_SMDS; 77 - if (index) 78 - tmp |= AT91_PMC_SMDS; 79 - pmc_write(pmc, AT91_PMC_SMD, tmp); 74 + 75 + regmap_update_bits(smd->regmap, AT91_PMC_SMD, AT91_PMC_SMDS, 76 + index ? AT91_PMC_SMDS : 0); 77 + 80 78 return 0; 81 79 } 82 80 83 81 static u8 at91sam9x5_clk_smd_get_parent(struct clk_hw *hw) 84 82 { 85 83 struct at91sam9x5_clk_smd *smd = to_at91sam9x5_clk_smd(hw); 86 - struct at91_pmc *pmc = smd->pmc; 84 + unsigned int smdr; 87 85 88 - return pmc_read(pmc, AT91_PMC_SMD) & AT91_PMC_SMDS; 86 + regmap_read(smd->regmap, AT91_PMC_SMD, &smdr); 87 + 88 + return smdr & AT91_PMC_SMDS; 89 89 } 90 90 91 91 static int at91sam9x5_clk_smd_set_rate(struct clk_hw *hw, unsigned long rate, 92 92 unsigned long parent_rate) 93 93 { 94 - u32 tmp; 95 94 struct at91sam9x5_clk_smd *smd = to_at91sam9x5_clk_smd(hw); 96 - struct at91_pmc *pmc = smd->pmc; 97 95 unsigned long div = parent_rate / rate; 98 96 99 97 if (parent_rate % rate || div < 1 || div > (SMD_MAX_DIV + 1)) 100 98 return -EINVAL; 101 - tmp = pmc_read(pmc, AT91_PMC_SMD) & ~AT91_PMC_SMD_DIV; 102 - tmp |= (div - 1) << SMD_DIV_SHIFT; 103 - pmc_write(pmc, AT91_PMC_SMD, tmp); 99 + 100 + regmap_update_bits(smd->regmap, AT91_PMC_SMD, AT91_PMC_SMD_DIV, 101 + (div - 1) << SMD_DIV_SHIFT); 104 102 105 103 return 0; 106 104 } ··· 112 114 }; 113 115 114 116 static struct clk * __init 115 - at91sam9x5_clk_register_smd(struct at91_pmc *pmc, const char *name, 117 + at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name, 116 118 const char **parent_names, u8 num_parents) 117 119 { 118 120 struct at91sam9x5_clk_smd *smd; ··· 130 132 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; 131 133 132 134 smd->hw.init = &init; 133 - smd->pmc = pmc; 135 + smd->regmap = regmap; 134 136 135 137 clk = clk_register(NULL, &smd->hw); 136 138 if (IS_ERR(clk)) ··· 139 141 return clk; 140 142 } 141 143 142 - void __init of_at91sam9x5_clk_smd_setup(struct device_node *np, 143 - struct at91_pmc *pmc) 144 + static void __init of_at91sam9x5_clk_smd_setup(struct device_node *np) 144 145 { 145 146 struct clk *clk; 146 147 int num_parents; 147 148 const char *parent_names[SMD_SOURCE_MAX]; 148 149 const char *name = np->name; 150 + struct regmap *regmap; 149 151 150 152 num_parents = of_clk_get_parent_count(np); 151 153 if (num_parents <= 0 || num_parents > SMD_SOURCE_MAX) ··· 155 157 156 158 of_property_read_string(np, "clock-output-names", &name); 157 159 158 - clk = at91sam9x5_clk_register_smd(pmc, name, parent_names, 160 + regmap = syscon_node_to_regmap(of_get_parent(np)); 161 + if (IS_ERR(regmap)) 162 + return; 163 + 164 + clk = at91sam9x5_clk_register_smd(regmap, name, parent_names, 159 165 num_parents); 160 166 if (IS_ERR(clk)) 161 167 return; 162 168 163 169 of_clk_add_provider(np, of_clk_src_simple_get, clk); 164 170 } 171 + CLK_OF_DECLARE(at91sam9x5_clk_smd, "atmel,at91sam9x5-clk-smd", 172 + of_at91sam9x5_clk_smd_setup);
+33 -63
drivers/clk/at91/clk-system.c
··· 12 12 #include <linux/clkdev.h> 13 13 #include <linux/clk/at91_pmc.h> 14 14 #include <linux/of.h> 15 - #include <linux/of_address.h> 16 - #include <linux/io.h> 17 - #include <linux/irq.h> 18 - #include <linux/of_irq.h> 19 - #include <linux/interrupt.h> 20 - #include <linux/wait.h> 21 - #include <linux/sched.h> 15 + #include <linux/mfd/syscon.h> 16 + #include <linux/regmap.h> 22 17 23 18 #include "pmc.h" 24 19 ··· 24 29 #define to_clk_system(hw) container_of(hw, struct clk_system, hw) 25 30 struct clk_system { 26 31 struct clk_hw hw; 27 - struct at91_pmc *pmc; 28 - unsigned int irq; 29 - wait_queue_head_t wait; 32 + struct regmap *regmap; 30 33 u8 id; 31 34 }; 32 35 ··· 32 39 { 33 40 return (id >= 8) && (id <= 15); 34 41 } 35 - static irqreturn_t clk_system_irq_handler(int irq, void *dev_id) 42 + 43 + static inline bool clk_system_ready(struct regmap *regmap, int id) 36 44 { 37 - struct clk_system *sys = (struct clk_system *)dev_id; 45 + unsigned int status; 38 46 39 - wake_up(&sys->wait); 40 - disable_irq_nosync(sys->irq); 47 + regmap_read(regmap, AT91_PMC_SR, &status); 41 48 42 - return IRQ_HANDLED; 49 + return status & (1 << id) ? 1 : 0; 43 50 } 44 51 45 52 static int clk_system_prepare(struct clk_hw *hw) 46 53 { 47 54 struct clk_system *sys = to_clk_system(hw); 48 - struct at91_pmc *pmc = sys->pmc; 49 - u32 mask = 1 << sys->id; 50 55 51 - pmc_write(pmc, AT91_PMC_SCER, mask); 56 + regmap_write(sys->regmap, AT91_PMC_SCER, 1 << sys->id); 52 57 53 58 if (!is_pck(sys->id)) 54 59 return 0; 55 60 56 - while (!(pmc_read(pmc, AT91_PMC_SR) & mask)) { 57 - if (sys->irq) { 58 - enable_irq(sys->irq); 59 - wait_event(sys->wait, 60 - pmc_read(pmc, AT91_PMC_SR) & mask); 61 - } else 62 - cpu_relax(); 63 - } 61 + while (!clk_system_ready(sys->regmap, sys->id)) 62 + cpu_relax(); 63 + 64 64 return 0; 65 65 } 66 66 67 67 static void clk_system_unprepare(struct clk_hw *hw) 68 68 { 69 69 struct clk_system *sys = to_clk_system(hw); 70 - struct at91_pmc *pmc = sys->pmc; 71 70 72 - pmc_write(pmc, AT91_PMC_SCDR, 1 << sys->id); 71 + regmap_write(sys->regmap, AT91_PMC_SCDR, 1 << sys->id); 73 72 } 74 73 75 74 static int clk_system_is_prepared(struct clk_hw *hw) 76 75 { 77 76 struct clk_system *sys = to_clk_system(hw); 78 - struct at91_pmc *pmc = sys->pmc; 77 + unsigned int status; 79 78 80 - if (!(pmc_read(pmc, AT91_PMC_SCSR) & (1 << sys->id))) 79 + regmap_read(sys->regmap, AT91_PMC_SCSR, &status); 80 + 81 + if (!(status & (1 << sys->id))) 81 82 return 0; 82 83 83 84 if (!is_pck(sys->id)) 84 85 return 1; 85 86 86 - return !!(pmc_read(pmc, AT91_PMC_SR) & (1 << sys->id)); 87 + regmap_read(sys->regmap, AT91_PMC_SR, &status); 88 + 89 + return status & (1 << sys->id) ? 1 : 0; 87 90 } 88 91 89 92 static const struct clk_ops system_ops = { ··· 89 100 }; 90 101 91 102 static struct clk * __init 92 - at91_clk_register_system(struct at91_pmc *pmc, const char *name, 93 - const char *parent_name, u8 id, int irq) 103 + at91_clk_register_system(struct regmap *regmap, const char *name, 104 + const char *parent_name, u8 id) 94 105 { 95 106 struct clk_system *sys; 96 107 struct clk *clk = NULL; 97 108 struct clk_init_data init; 98 - int ret; 99 109 100 110 if (!parent_name || id > SYSTEM_MAX_ID) 101 111 return ERR_PTR(-EINVAL); ··· 111 123 112 124 sys->id = id; 113 125 sys->hw.init = &init; 114 - sys->pmc = pmc; 115 - sys->irq = irq; 116 - if (irq) { 117 - init_waitqueue_head(&sys->wait); 118 - irq_set_status_flags(sys->irq, IRQ_NOAUTOEN); 119 - ret = request_irq(sys->irq, clk_system_irq_handler, 120 - IRQF_TRIGGER_HIGH, name, sys); 121 - if (ret) { 122 - kfree(sys); 123 - return ERR_PTR(ret); 124 - } 125 - } 126 + sys->regmap = regmap; 126 127 127 128 clk = clk_register(NULL, &sys->hw); 128 - if (IS_ERR(clk)) { 129 - if (irq) 130 - free_irq(sys->irq, sys); 129 + if (IS_ERR(clk)) 131 130 kfree(sys); 132 - } 133 131 134 132 return clk; 135 133 } 136 134 137 - static void __init 138 - of_at91_clk_sys_setup(struct device_node *np, struct at91_pmc *pmc) 135 + static void __init of_at91rm9200_clk_sys_setup(struct device_node *np) 139 136 { 140 137 int num; 141 - int irq = 0; 142 138 u32 id; 143 139 struct clk *clk; 144 140 const char *name; 145 141 struct device_node *sysclknp; 146 142 const char *parent_name; 143 + struct regmap *regmap; 147 144 148 145 num = of_get_child_count(np); 149 146 if (num > (SYSTEM_MAX_ID + 1)) 147 + return; 148 + 149 + regmap = syscon_node_to_regmap(of_get_parent(np)); 150 + if (IS_ERR(regmap)) 150 151 return; 151 152 152 153 for_each_child_of_node(np, sysclknp) { ··· 145 168 if (of_property_read_string(np, "clock-output-names", &name)) 146 169 name = sysclknp->name; 147 170 148 - if (is_pck(id)) 149 - irq = irq_of_parse_and_map(sysclknp, 0); 150 - 151 171 parent_name = of_clk_get_parent_name(sysclknp, 0); 152 172 153 - clk = at91_clk_register_system(pmc, name, parent_name, id, irq); 173 + clk = at91_clk_register_system(regmap, name, parent_name, id); 154 174 if (IS_ERR(clk)) 155 175 continue; 156 176 157 177 of_clk_add_provider(sysclknp, of_clk_src_simple_get, clk); 158 178 } 159 179 } 160 - 161 - void __init of_at91rm9200_clk_sys_setup(struct device_node *np, 162 - struct at91_pmc *pmc) 163 - { 164 - of_at91_clk_sys_setup(np, pmc); 165 - } 180 + CLK_OF_DECLARE(at91rm9200_clk_sys, "atmel,at91rm9200-clk-system", 181 + of_at91rm9200_clk_sys_setup);
+68 -55
drivers/clk/at91/clk-usb.c
··· 12 12 #include <linux/clkdev.h> 13 13 #include <linux/clk/at91_pmc.h> 14 14 #include <linux/of.h> 15 - #include <linux/of_address.h> 16 - #include <linux/io.h> 15 + #include <linux/mfd/syscon.h> 16 + #include <linux/regmap.h> 17 17 18 18 #include "pmc.h" 19 19 ··· 27 27 28 28 struct at91sam9x5_clk_usb { 29 29 struct clk_hw hw; 30 - struct at91_pmc *pmc; 30 + struct regmap *regmap; 31 31 }; 32 32 33 33 #define to_at91sam9x5_clk_usb(hw) \ ··· 35 35 36 36 struct at91rm9200_clk_usb { 37 37 struct clk_hw hw; 38 - struct at91_pmc *pmc; 38 + struct regmap *regmap; 39 39 u32 divisors[4]; 40 40 }; 41 41 ··· 45 45 static unsigned long at91sam9x5_clk_usb_recalc_rate(struct clk_hw *hw, 46 46 unsigned long parent_rate) 47 47 { 48 - u32 tmp; 49 - u8 usbdiv; 50 48 struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw); 51 - struct at91_pmc *pmc = usb->pmc; 49 + unsigned int usbr; 50 + u8 usbdiv; 52 51 53 - tmp = pmc_read(pmc, AT91_PMC_USB); 54 - usbdiv = (tmp & AT91_PMC_OHCIUSBDIV) >> SAM9X5_USB_DIV_SHIFT; 52 + regmap_read(usb->regmap, AT91_PMC_USB, &usbr); 53 + usbdiv = (usbr & AT91_PMC_OHCIUSBDIV) >> SAM9X5_USB_DIV_SHIFT; 55 54 56 55 return DIV_ROUND_CLOSEST(parent_rate, (usbdiv + 1)); 57 56 } ··· 108 109 109 110 static int at91sam9x5_clk_usb_set_parent(struct clk_hw *hw, u8 index) 110 111 { 111 - u32 tmp; 112 112 struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw); 113 - struct at91_pmc *pmc = usb->pmc; 114 113 115 114 if (index > 1) 116 115 return -EINVAL; 117 - tmp = pmc_read(pmc, AT91_PMC_USB) & ~AT91_PMC_USBS; 118 - if (index) 119 - tmp |= AT91_PMC_USBS; 120 - pmc_write(pmc, AT91_PMC_USB, tmp); 116 + 117 + regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_USBS, 118 + index ? AT91_PMC_USBS : 0); 119 + 121 120 return 0; 122 121 } 123 122 124 123 static u8 at91sam9x5_clk_usb_get_parent(struct clk_hw *hw) 125 124 { 126 125 struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw); 127 - struct at91_pmc *pmc = usb->pmc; 126 + unsigned int usbr; 128 127 129 - return pmc_read(pmc, AT91_PMC_USB) & AT91_PMC_USBS; 128 + regmap_read(usb->regmap, AT91_PMC_USB, &usbr); 129 + 130 + return usbr & AT91_PMC_USBS; 130 131 } 131 132 132 133 static int at91sam9x5_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate, 133 134 unsigned long parent_rate) 134 135 { 135 - u32 tmp; 136 136 struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw); 137 - struct at91_pmc *pmc = usb->pmc; 138 137 unsigned long div; 139 138 140 139 if (!rate) ··· 142 145 if (div > SAM9X5_USB_MAX_DIV + 1 || !div) 143 146 return -EINVAL; 144 147 145 - tmp = pmc_read(pmc, AT91_PMC_USB) & ~AT91_PMC_OHCIUSBDIV; 146 - tmp |= (div - 1) << SAM9X5_USB_DIV_SHIFT; 147 - pmc_write(pmc, AT91_PMC_USB, tmp); 148 + regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_OHCIUSBDIV, 149 + (div - 1) << SAM9X5_USB_DIV_SHIFT); 148 150 149 151 return 0; 150 152 } ··· 159 163 static int at91sam9n12_clk_usb_enable(struct clk_hw *hw) 160 164 { 161 165 struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw); 162 - struct at91_pmc *pmc = usb->pmc; 163 166 164 - pmc_write(pmc, AT91_PMC_USB, 165 - pmc_read(pmc, AT91_PMC_USB) | AT91_PMC_USBS); 167 + regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_USBS, 168 + AT91_PMC_USBS); 169 + 166 170 return 0; 167 171 } 168 172 169 173 static void at91sam9n12_clk_usb_disable(struct clk_hw *hw) 170 174 { 171 175 struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw); 172 - struct at91_pmc *pmc = usb->pmc; 173 176 174 - pmc_write(pmc, AT91_PMC_USB, 175 - pmc_read(pmc, AT91_PMC_USB) & ~AT91_PMC_USBS); 177 + regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_USBS, 0); 176 178 } 177 179 178 180 static int at91sam9n12_clk_usb_is_enabled(struct clk_hw *hw) 179 181 { 180 182 struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw); 181 - struct at91_pmc *pmc = usb->pmc; 183 + unsigned int usbr; 182 184 183 - return !!(pmc_read(pmc, AT91_PMC_USB) & AT91_PMC_USBS); 185 + regmap_read(usb->regmap, AT91_PMC_USB, &usbr); 186 + 187 + return usbr & AT91_PMC_USBS; 184 188 } 185 189 186 190 static const struct clk_ops at91sam9n12_usb_ops = { ··· 193 197 }; 194 198 195 199 static struct clk * __init 196 - at91sam9x5_clk_register_usb(struct at91_pmc *pmc, const char *name, 200 + at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name, 197 201 const char **parent_names, u8 num_parents) 198 202 { 199 203 struct at91sam9x5_clk_usb *usb; ··· 212 216 CLK_SET_RATE_PARENT; 213 217 214 218 usb->hw.init = &init; 215 - usb->pmc = pmc; 219 + usb->regmap = regmap; 216 220 217 221 clk = clk_register(NULL, &usb->hw); 218 222 if (IS_ERR(clk)) ··· 222 226 } 223 227 224 228 static struct clk * __init 225 - at91sam9n12_clk_register_usb(struct at91_pmc *pmc, const char *name, 229 + at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name, 226 230 const char *parent_name) 227 231 { 228 232 struct at91sam9x5_clk_usb *usb; ··· 240 244 init.flags = CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT; 241 245 242 246 usb->hw.init = &init; 243 - usb->pmc = pmc; 247 + usb->regmap = regmap; 244 248 245 249 clk = clk_register(NULL, &usb->hw); 246 250 if (IS_ERR(clk)) ··· 253 257 unsigned long parent_rate) 254 258 { 255 259 struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw); 256 - struct at91_pmc *pmc = usb->pmc; 257 - u32 tmp; 260 + unsigned int pllbr; 258 261 u8 usbdiv; 259 262 260 - tmp = pmc_read(pmc, AT91_CKGR_PLLBR); 261 - usbdiv = (tmp & AT91_PMC_USBDIV) >> RM9200_USB_DIV_SHIFT; 263 + regmap_read(usb->regmap, AT91_CKGR_PLLBR, &pllbr); 264 + 265 + usbdiv = (pllbr & AT91_PMC_USBDIV) >> RM9200_USB_DIV_SHIFT; 262 266 if (usb->divisors[usbdiv]) 263 267 return parent_rate / usb->divisors[usbdiv]; 264 268 ··· 306 310 static int at91rm9200_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate, 307 311 unsigned long parent_rate) 308 312 { 309 - u32 tmp; 310 313 int i; 311 314 struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw); 312 - struct at91_pmc *pmc = usb->pmc; 313 315 unsigned long div; 314 316 315 317 if (!rate) ··· 317 323 318 324 for (i = 0; i < RM9200_USB_DIV_TAB_SIZE; i++) { 319 325 if (usb->divisors[i] == div) { 320 - tmp = pmc_read(pmc, AT91_CKGR_PLLBR) & 321 - ~AT91_PMC_USBDIV; 322 - tmp |= i << RM9200_USB_DIV_SHIFT; 323 - pmc_write(pmc, AT91_CKGR_PLLBR, tmp); 326 + regmap_update_bits(usb->regmap, AT91_CKGR_PLLBR, 327 + AT91_PMC_USBDIV, 328 + i << RM9200_USB_DIV_SHIFT); 329 + 324 330 return 0; 325 331 } 326 332 } ··· 335 341 }; 336 342 337 343 static struct clk * __init 338 - at91rm9200_clk_register_usb(struct at91_pmc *pmc, const char *name, 344 + at91rm9200_clk_register_usb(struct regmap *regmap, const char *name, 339 345 const char *parent_name, const u32 *divisors) 340 346 { 341 347 struct at91rm9200_clk_usb *usb; ··· 353 359 init.flags = CLK_SET_RATE_PARENT; 354 360 355 361 usb->hw.init = &init; 356 - usb->pmc = pmc; 362 + usb->regmap = regmap; 357 363 memcpy(usb->divisors, divisors, sizeof(usb->divisors)); 358 364 359 365 clk = clk_register(NULL, &usb->hw); ··· 363 369 return clk; 364 370 } 365 371 366 - void __init of_at91sam9x5_clk_usb_setup(struct device_node *np, 367 - struct at91_pmc *pmc) 372 + static void __init of_at91sam9x5_clk_usb_setup(struct device_node *np) 368 373 { 369 374 struct clk *clk; 370 375 int num_parents; 371 376 const char *parent_names[USB_SOURCE_MAX]; 372 377 const char *name = np->name; 378 + struct regmap *regmap; 373 379 374 380 num_parents = of_clk_get_parent_count(np); 375 381 if (num_parents <= 0 || num_parents > USB_SOURCE_MAX) ··· 379 385 380 386 of_property_read_string(np, "clock-output-names", &name); 381 387 382 - clk = at91sam9x5_clk_register_usb(pmc, name, parent_names, num_parents); 388 + regmap = syscon_node_to_regmap(of_get_parent(np)); 389 + if (IS_ERR(regmap)) 390 + return; 391 + 392 + clk = at91sam9x5_clk_register_usb(regmap, name, parent_names, 393 + num_parents); 383 394 if (IS_ERR(clk)) 384 395 return; 385 396 386 397 of_clk_add_provider(np, of_clk_src_simple_get, clk); 387 398 } 399 + CLK_OF_DECLARE(at91sam9x5_clk_usb, "atmel,at91sam9x5-clk-usb", 400 + of_at91sam9x5_clk_usb_setup); 388 401 389 - void __init of_at91sam9n12_clk_usb_setup(struct device_node *np, 390 - struct at91_pmc *pmc) 402 + static void __init of_at91sam9n12_clk_usb_setup(struct device_node *np) 391 403 { 392 404 struct clk *clk; 393 405 const char *parent_name; 394 406 const char *name = np->name; 407 + struct regmap *regmap; 395 408 396 409 parent_name = of_clk_get_parent_name(np, 0); 397 410 if (!parent_name) ··· 406 405 407 406 of_property_read_string(np, "clock-output-names", &name); 408 407 409 - clk = at91sam9n12_clk_register_usb(pmc, name, parent_name); 408 + regmap = syscon_node_to_regmap(of_get_parent(np)); 409 + if (IS_ERR(regmap)) 410 + return; 411 + 412 + clk = at91sam9n12_clk_register_usb(regmap, name, parent_name); 410 413 if (IS_ERR(clk)) 411 414 return; 412 415 413 416 of_clk_add_provider(np, of_clk_src_simple_get, clk); 414 417 } 418 + CLK_OF_DECLARE(at91sam9n12_clk_usb, "atmel,at91sam9n12-clk-usb", 419 + of_at91sam9n12_clk_usb_setup); 415 420 416 - void __init of_at91rm9200_clk_usb_setup(struct device_node *np, 417 - struct at91_pmc *pmc) 421 + static void __init of_at91rm9200_clk_usb_setup(struct device_node *np) 418 422 { 419 423 struct clk *clk; 420 424 const char *parent_name; 421 425 const char *name = np->name; 422 426 u32 divisors[4] = {0, 0, 0, 0}; 427 + struct regmap *regmap; 423 428 424 429 parent_name = of_clk_get_parent_name(np, 0); 425 430 if (!parent_name) ··· 437 430 438 431 of_property_read_string(np, "clock-output-names", &name); 439 432 440 - clk = at91rm9200_clk_register_usb(pmc, name, parent_name, divisors); 433 + regmap = syscon_node_to_regmap(of_get_parent(np)); 434 + if (IS_ERR(regmap)) 435 + return; 436 + 437 + clk = at91rm9200_clk_register_usb(regmap, name, parent_name, divisors); 441 438 if (IS_ERR(clk)) 442 439 return; 443 440 444 441 of_clk_add_provider(np, of_clk_src_simple_get, clk); 445 442 } 443 + CLK_OF_DECLARE(at91rm9200_clk_usb, "atmel,at91rm9200-clk-usb", 444 + of_at91rm9200_clk_usb_setup);
+24 -56
drivers/clk/at91/clk-utmi.c
··· 11 11 #include <linux/clk-provider.h> 12 12 #include <linux/clkdev.h> 13 13 #include <linux/clk/at91_pmc.h> 14 - #include <linux/interrupt.h> 15 - #include <linux/irq.h> 16 14 #include <linux/of.h> 17 - #include <linux/of_address.h> 18 - #include <linux/of_irq.h> 19 - #include <linux/io.h> 20 - #include <linux/sched.h> 21 - #include <linux/wait.h> 15 + #include <linux/mfd/syscon.h> 16 + #include <linux/regmap.h> 22 17 23 18 #include "pmc.h" 24 19 ··· 21 26 22 27 struct clk_utmi { 23 28 struct clk_hw hw; 24 - struct at91_pmc *pmc; 25 - unsigned int irq; 26 - wait_queue_head_t wait; 29 + struct regmap *regmap; 27 30 }; 28 31 29 32 #define to_clk_utmi(hw) container_of(hw, struct clk_utmi, hw) 30 33 31 - static irqreturn_t clk_utmi_irq_handler(int irq, void *dev_id) 34 + static inline bool clk_utmi_ready(struct regmap *regmap) 32 35 { 33 - struct clk_utmi *utmi = (struct clk_utmi *)dev_id; 36 + unsigned int status; 34 37 35 - wake_up(&utmi->wait); 36 - disable_irq_nosync(utmi->irq); 38 + regmap_read(regmap, AT91_PMC_SR, &status); 37 39 38 - return IRQ_HANDLED; 40 + return status & AT91_PMC_LOCKU; 39 41 } 40 42 41 43 static int clk_utmi_prepare(struct clk_hw *hw) 42 44 { 43 45 struct clk_utmi *utmi = to_clk_utmi(hw); 44 - struct at91_pmc *pmc = utmi->pmc; 45 - u32 tmp = pmc_read(pmc, AT91_CKGR_UCKR) | AT91_PMC_UPLLEN | 46 - AT91_PMC_UPLLCOUNT | AT91_PMC_BIASEN; 46 + unsigned int uckr = AT91_PMC_UPLLEN | AT91_PMC_UPLLCOUNT | 47 + AT91_PMC_BIASEN; 47 48 48 - pmc_write(pmc, AT91_CKGR_UCKR, tmp); 49 + regmap_update_bits(utmi->regmap, AT91_CKGR_UCKR, uckr, uckr); 49 50 50 - while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_LOCKU)) { 51 - enable_irq(utmi->irq); 52 - wait_event(utmi->wait, 53 - pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_LOCKU); 54 - } 51 + while (!clk_utmi_ready(utmi->regmap)) 52 + cpu_relax(); 55 53 56 54 return 0; 57 55 } ··· 52 64 static int clk_utmi_is_prepared(struct clk_hw *hw) 53 65 { 54 66 struct clk_utmi *utmi = to_clk_utmi(hw); 55 - struct at91_pmc *pmc = utmi->pmc; 56 67 57 - return !!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_LOCKU); 68 + return clk_utmi_ready(utmi->regmap); 58 69 } 59 70 60 71 static void clk_utmi_unprepare(struct clk_hw *hw) 61 72 { 62 73 struct clk_utmi *utmi = to_clk_utmi(hw); 63 - struct at91_pmc *pmc = utmi->pmc; 64 - u32 tmp = pmc_read(pmc, AT91_CKGR_UCKR) & ~AT91_PMC_UPLLEN; 65 74 66 - pmc_write(pmc, AT91_CKGR_UCKR, tmp); 75 + regmap_update_bits(utmi->regmap, AT91_CKGR_UCKR, AT91_PMC_UPLLEN, 0); 67 76 } 68 77 69 78 static unsigned long clk_utmi_recalc_rate(struct clk_hw *hw, ··· 78 93 }; 79 94 80 95 static struct clk * __init 81 - at91_clk_register_utmi(struct at91_pmc *pmc, unsigned int irq, 96 + at91_clk_register_utmi(struct regmap *regmap, 82 97 const char *name, const char *parent_name) 83 98 { 84 - int ret; 85 99 struct clk_utmi *utmi; 86 100 struct clk *clk = NULL; 87 101 struct clk_init_data init; ··· 96 112 init.flags = CLK_SET_RATE_GATE; 97 113 98 114 utmi->hw.init = &init; 99 - utmi->pmc = pmc; 100 - utmi->irq = irq; 101 - init_waitqueue_head(&utmi->wait); 102 - irq_set_status_flags(utmi->irq, IRQ_NOAUTOEN); 103 - ret = request_irq(utmi->irq, clk_utmi_irq_handler, 104 - IRQF_TRIGGER_HIGH, "clk-utmi", utmi); 105 - if (ret) { 106 - kfree(utmi); 107 - return ERR_PTR(ret); 108 - } 115 + utmi->regmap = regmap; 109 116 110 117 clk = clk_register(NULL, &utmi->hw); 111 - if (IS_ERR(clk)) { 112 - free_irq(utmi->irq, utmi); 118 + if (IS_ERR(clk)) 113 119 kfree(utmi); 114 - } 115 120 116 121 return clk; 117 122 } 118 123 119 - static void __init 120 - of_at91_clk_utmi_setup(struct device_node *np, struct at91_pmc *pmc) 124 + static void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np) 121 125 { 122 - unsigned int irq; 123 126 struct clk *clk; 124 127 const char *parent_name; 125 128 const char *name = np->name; 129 + struct regmap *regmap; 126 130 127 131 parent_name = of_clk_get_parent_name(np, 0); 128 132 129 133 of_property_read_string(np, "clock-output-names", &name); 130 134 131 - irq = irq_of_parse_and_map(np, 0); 132 - if (!irq) 135 + regmap = syscon_node_to_regmap(of_get_parent(np)); 136 + if (IS_ERR(regmap)) 133 137 return; 134 138 135 - clk = at91_clk_register_utmi(pmc, irq, name, parent_name); 139 + clk = at91_clk_register_utmi(regmap, name, parent_name); 136 140 if (IS_ERR(clk)) 137 141 return; 138 142 139 143 of_clk_add_provider(np, of_clk_src_simple_get, clk); 140 144 return; 141 145 } 142 - 143 - void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np, 144 - struct at91_pmc *pmc) 145 - { 146 - of_at91_clk_utmi_setup(np, pmc); 147 - } 146 + CLK_OF_DECLARE(at91sam9x5_clk_utmi, "atmel,at91sam9x5-clk-utmi", 147 + of_at91sam9x5_clk_utmi_setup);
+2 -424
drivers/clk/at91/pmc.c
··· 12 12 #include <linux/clkdev.h> 13 13 #include <linux/clk/at91_pmc.h> 14 14 #include <linux/of.h> 15 - #include <linux/of_address.h> 16 - #include <linux/io.h> 17 - #include <linux/interrupt.h> 18 - #include <linux/irq.h> 19 - #include <linux/irqchip/chained_irq.h> 20 - #include <linux/irqdomain.h> 21 - #include <linux/of_irq.h> 15 + #include <linux/mfd/syscon.h> 16 + #include <linux/regmap.h> 22 17 23 18 #include <asm/proc-fns.h> 24 19 25 20 #include "pmc.h" 26 - 27 - void __iomem *at91_pmc_base; 28 - EXPORT_SYMBOL_GPL(at91_pmc_base); 29 - 30 - void at91rm9200_idle(void) 31 - { 32 - /* 33 - * Disable the processor clock. The processor will be automatically 34 - * re-enabled by an interrupt or by a reset. 35 - */ 36 - at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK); 37 - } 38 - 39 - void at91sam9_idle(void) 40 - { 41 - at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK); 42 - cpu_do_idle(); 43 - } 44 21 45 22 int of_at91_get_clk_range(struct device_node *np, const char *propname, 46 23 struct clk_range *range) ··· 41 64 return 0; 42 65 } 43 66 EXPORT_SYMBOL_GPL(of_at91_get_clk_range); 44 - 45 - static void pmc_irq_mask(struct irq_data *d) 46 - { 47 - struct at91_pmc *pmc = irq_data_get_irq_chip_data(d); 48 - 49 - pmc_write(pmc, AT91_PMC_IDR, 1 << d->hwirq); 50 - } 51 - 52 - static void pmc_irq_unmask(struct irq_data *d) 53 - { 54 - struct at91_pmc *pmc = irq_data_get_irq_chip_data(d); 55 - 56 - pmc_write(pmc, AT91_PMC_IER, 1 << d->hwirq); 57 - } 58 - 59 - static int pmc_irq_set_type(struct irq_data *d, unsigned type) 60 - { 61 - if (type != IRQ_TYPE_LEVEL_HIGH) { 62 - pr_warn("PMC: type not supported (support only IRQ_TYPE_LEVEL_HIGH type)\n"); 63 - return -EINVAL; 64 - } 65 - 66 - return 0; 67 - } 68 - 69 - static void pmc_irq_suspend(struct irq_data *d) 70 - { 71 - struct at91_pmc *pmc = irq_data_get_irq_chip_data(d); 72 - 73 - pmc->imr = pmc_read(pmc, AT91_PMC_IMR); 74 - pmc_write(pmc, AT91_PMC_IDR, pmc->imr); 75 - } 76 - 77 - static void pmc_irq_resume(struct irq_data *d) 78 - { 79 - struct at91_pmc *pmc = irq_data_get_irq_chip_data(d); 80 - 81 - pmc_write(pmc, AT91_PMC_IER, pmc->imr); 82 - } 83 - 84 - static struct irq_chip pmc_irq = { 85 - .name = "PMC", 86 - .irq_disable = pmc_irq_mask, 87 - .irq_mask = pmc_irq_mask, 88 - .irq_unmask = pmc_irq_unmask, 89 - .irq_set_type = pmc_irq_set_type, 90 - .irq_suspend = pmc_irq_suspend, 91 - .irq_resume = pmc_irq_resume, 92 - }; 93 - 94 - static struct lock_class_key pmc_lock_class; 95 - 96 - static int pmc_irq_map(struct irq_domain *h, unsigned int virq, 97 - irq_hw_number_t hw) 98 - { 99 - struct at91_pmc *pmc = h->host_data; 100 - 101 - irq_set_lockdep_class(virq, &pmc_lock_class); 102 - 103 - irq_set_chip_and_handler(virq, &pmc_irq, 104 - handle_level_irq); 105 - irq_set_chip_data(virq, pmc); 106 - 107 - return 0; 108 - } 109 - 110 - static int pmc_irq_domain_xlate(struct irq_domain *d, 111 - struct device_node *ctrlr, 112 - const u32 *intspec, unsigned int intsize, 113 - irq_hw_number_t *out_hwirq, 114 - unsigned int *out_type) 115 - { 116 - struct at91_pmc *pmc = d->host_data; 117 - const struct at91_pmc_caps *caps = pmc->caps; 118 - 119 - if (WARN_ON(intsize < 1)) 120 - return -EINVAL; 121 - 122 - *out_hwirq = intspec[0]; 123 - 124 - if (!(caps->available_irqs & (1 << *out_hwirq))) 125 - return -EINVAL; 126 - 127 - *out_type = IRQ_TYPE_LEVEL_HIGH; 128 - 129 - return 0; 130 - } 131 - 132 - static const struct irq_domain_ops pmc_irq_ops = { 133 - .map = pmc_irq_map, 134 - .xlate = pmc_irq_domain_xlate, 135 - }; 136 - 137 - static irqreturn_t pmc_irq_handler(int irq, void *data) 138 - { 139 - struct at91_pmc *pmc = (struct at91_pmc *)data; 140 - unsigned long sr; 141 - int n; 142 - 143 - sr = pmc_read(pmc, AT91_PMC_SR) & pmc_read(pmc, AT91_PMC_IMR); 144 - if (!sr) 145 - return IRQ_NONE; 146 - 147 - for_each_set_bit(n, &sr, BITS_PER_LONG) 148 - generic_handle_irq(irq_find_mapping(pmc->irqdomain, n)); 149 - 150 - return IRQ_HANDLED; 151 - } 152 - 153 - static const struct at91_pmc_caps at91rm9200_caps = { 154 - .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_LOCKB | 155 - AT91_PMC_MCKRDY | AT91_PMC_PCK0RDY | 156 - AT91_PMC_PCK1RDY | AT91_PMC_PCK2RDY | 157 - AT91_PMC_PCK3RDY, 158 - }; 159 - 160 - static const struct at91_pmc_caps at91sam9260_caps = { 161 - .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_LOCKB | 162 - AT91_PMC_MCKRDY | AT91_PMC_PCK0RDY | 163 - AT91_PMC_PCK1RDY, 164 - }; 165 - 166 - static const struct at91_pmc_caps at91sam9g45_caps = { 167 - .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_MCKRDY | 168 - AT91_PMC_LOCKU | AT91_PMC_PCK0RDY | 169 - AT91_PMC_PCK1RDY, 170 - }; 171 - 172 - static const struct at91_pmc_caps at91sam9n12_caps = { 173 - .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_LOCKB | 174 - AT91_PMC_MCKRDY | AT91_PMC_PCK0RDY | 175 - AT91_PMC_PCK1RDY | AT91_PMC_MOSCSELS | 176 - AT91_PMC_MOSCRCS | AT91_PMC_CFDEV, 177 - }; 178 - 179 - static const struct at91_pmc_caps at91sam9x5_caps = { 180 - .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_MCKRDY | 181 - AT91_PMC_LOCKU | AT91_PMC_PCK0RDY | 182 - AT91_PMC_PCK1RDY | AT91_PMC_MOSCSELS | 183 - AT91_PMC_MOSCRCS | AT91_PMC_CFDEV, 184 - }; 185 - 186 - static const struct at91_pmc_caps sama5d2_caps = { 187 - .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_MCKRDY | 188 - AT91_PMC_LOCKU | AT91_PMC_PCK0RDY | 189 - AT91_PMC_PCK1RDY | AT91_PMC_PCK2RDY | 190 - AT91_PMC_MOSCSELS | AT91_PMC_MOSCRCS | 191 - AT91_PMC_CFDEV | AT91_PMC_GCKRDY, 192 - }; 193 - 194 - static const struct at91_pmc_caps sama5d3_caps = { 195 - .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_MCKRDY | 196 - AT91_PMC_LOCKU | AT91_PMC_PCK0RDY | 197 - AT91_PMC_PCK1RDY | AT91_PMC_PCK2RDY | 198 - AT91_PMC_MOSCSELS | AT91_PMC_MOSCRCS | 199 - AT91_PMC_CFDEV, 200 - }; 201 - 202 - static struct at91_pmc *__init at91_pmc_init(struct device_node *np, 203 - void __iomem *regbase, int virq, 204 - const struct at91_pmc_caps *caps) 205 - { 206 - struct at91_pmc *pmc; 207 - 208 - if (!regbase || !virq || !caps) 209 - return NULL; 210 - 211 - at91_pmc_base = regbase; 212 - 213 - pmc = kzalloc(sizeof(*pmc), GFP_KERNEL); 214 - if (!pmc) 215 - return NULL; 216 - 217 - spin_lock_init(&pmc->lock); 218 - pmc->regbase = regbase; 219 - pmc->virq = virq; 220 - pmc->caps = caps; 221 - 222 - pmc->irqdomain = irq_domain_add_linear(np, 32, &pmc_irq_ops, pmc); 223 - 224 - if (!pmc->irqdomain) 225 - goto out_free_pmc; 226 - 227 - pmc_write(pmc, AT91_PMC_IDR, 0xffffffff); 228 - if (request_irq(pmc->virq, pmc_irq_handler, 229 - IRQF_SHARED | IRQF_COND_SUSPEND, "pmc", pmc)) 230 - goto out_remove_irqdomain; 231 - 232 - return pmc; 233 - 234 - out_remove_irqdomain: 235 - irq_domain_remove(pmc->irqdomain); 236 - out_free_pmc: 237 - kfree(pmc); 238 - 239 - return NULL; 240 - } 241 - 242 - static const struct of_device_id pmc_clk_ids[] __initconst = { 243 - /* Slow oscillator */ 244 - { 245 - .compatible = "atmel,at91sam9260-clk-slow", 246 - .data = of_at91sam9260_clk_slow_setup, 247 - }, 248 - /* Main clock */ 249 - { 250 - .compatible = "atmel,at91rm9200-clk-main-osc", 251 - .data = of_at91rm9200_clk_main_osc_setup, 252 - }, 253 - { 254 - .compatible = "atmel,at91sam9x5-clk-main-rc-osc", 255 - .data = of_at91sam9x5_clk_main_rc_osc_setup, 256 - }, 257 - { 258 - .compatible = "atmel,at91rm9200-clk-main", 259 - .data = of_at91rm9200_clk_main_setup, 260 - }, 261 - { 262 - .compatible = "atmel,at91sam9x5-clk-main", 263 - .data = of_at91sam9x5_clk_main_setup, 264 - }, 265 - /* PLL clocks */ 266 - { 267 - .compatible = "atmel,at91rm9200-clk-pll", 268 - .data = of_at91rm9200_clk_pll_setup, 269 - }, 270 - { 271 - .compatible = "atmel,at91sam9g45-clk-pll", 272 - .data = of_at91sam9g45_clk_pll_setup, 273 - }, 274 - { 275 - .compatible = "atmel,at91sam9g20-clk-pllb", 276 - .data = of_at91sam9g20_clk_pllb_setup, 277 - }, 278 - { 279 - .compatible = "atmel,sama5d3-clk-pll", 280 - .data = of_sama5d3_clk_pll_setup, 281 - }, 282 - { 283 - .compatible = "atmel,at91sam9x5-clk-plldiv", 284 - .data = of_at91sam9x5_clk_plldiv_setup, 285 - }, 286 - /* Master clock */ 287 - { 288 - .compatible = "atmel,at91rm9200-clk-master", 289 - .data = of_at91rm9200_clk_master_setup, 290 - }, 291 - { 292 - .compatible = "atmel,at91sam9x5-clk-master", 293 - .data = of_at91sam9x5_clk_master_setup, 294 - }, 295 - /* System clocks */ 296 - { 297 - .compatible = "atmel,at91rm9200-clk-system", 298 - .data = of_at91rm9200_clk_sys_setup, 299 - }, 300 - /* Peripheral clocks */ 301 - { 302 - .compatible = "atmel,at91rm9200-clk-peripheral", 303 - .data = of_at91rm9200_clk_periph_setup, 304 - }, 305 - { 306 - .compatible = "atmel,at91sam9x5-clk-peripheral", 307 - .data = of_at91sam9x5_clk_periph_setup, 308 - }, 309 - /* Programmable clocks */ 310 - { 311 - .compatible = "atmel,at91rm9200-clk-programmable", 312 - .data = of_at91rm9200_clk_prog_setup, 313 - }, 314 - { 315 - .compatible = "atmel,at91sam9g45-clk-programmable", 316 - .data = of_at91sam9g45_clk_prog_setup, 317 - }, 318 - { 319 - .compatible = "atmel,at91sam9x5-clk-programmable", 320 - .data = of_at91sam9x5_clk_prog_setup, 321 - }, 322 - /* UTMI clock */ 323 - #if defined(CONFIG_HAVE_AT91_UTMI) 324 - { 325 - .compatible = "atmel,at91sam9x5-clk-utmi", 326 - .data = of_at91sam9x5_clk_utmi_setup, 327 - }, 328 - #endif 329 - /* USB clock */ 330 - #if defined(CONFIG_HAVE_AT91_USB_CLK) 331 - { 332 - .compatible = "atmel,at91rm9200-clk-usb", 333 - .data = of_at91rm9200_clk_usb_setup, 334 - }, 335 - { 336 - .compatible = "atmel,at91sam9x5-clk-usb", 337 - .data = of_at91sam9x5_clk_usb_setup, 338 - }, 339 - { 340 - .compatible = "atmel,at91sam9n12-clk-usb", 341 - .data = of_at91sam9n12_clk_usb_setup, 342 - }, 343 - #endif 344 - /* SMD clock */ 345 - #if defined(CONFIG_HAVE_AT91_SMD) 346 - { 347 - .compatible = "atmel,at91sam9x5-clk-smd", 348 - .data = of_at91sam9x5_clk_smd_setup, 349 - }, 350 - #endif 351 - #if defined(CONFIG_HAVE_AT91_H32MX) 352 - { 353 - .compatible = "atmel,sama5d4-clk-h32mx", 354 - .data = of_sama5d4_clk_h32mx_setup, 355 - }, 356 - #endif 357 - #if defined(CONFIG_HAVE_AT91_GENERATED_CLK) 358 - { 359 - .compatible = "atmel,sama5d2-clk-generated", 360 - .data = of_sama5d2_clk_generated_setup, 361 - }, 362 - #endif 363 - { /*sentinel*/ } 364 - }; 365 - 366 - static void __init of_at91_pmc_setup(struct device_node *np, 367 - const struct at91_pmc_caps *caps) 368 - { 369 - struct at91_pmc *pmc; 370 - struct device_node *childnp; 371 - void (*clk_setup)(struct device_node *, struct at91_pmc *); 372 - const struct of_device_id *clk_id; 373 - void __iomem *regbase = of_iomap(np, 0); 374 - int virq; 375 - 376 - if (!regbase) 377 - return; 378 - 379 - virq = irq_of_parse_and_map(np, 0); 380 - if (!virq) 381 - return; 382 - 383 - pmc = at91_pmc_init(np, regbase, virq, caps); 384 - if (!pmc) 385 - return; 386 - for_each_child_of_node(np, childnp) { 387 - clk_id = of_match_node(pmc_clk_ids, childnp); 388 - if (!clk_id) 389 - continue; 390 - clk_setup = clk_id->data; 391 - clk_setup(childnp, pmc); 392 - } 393 - } 394 - 395 - static void __init of_at91rm9200_pmc_setup(struct device_node *np) 396 - { 397 - of_at91_pmc_setup(np, &at91rm9200_caps); 398 - } 399 - CLK_OF_DECLARE(at91rm9200_clk_pmc, "atmel,at91rm9200-pmc", 400 - of_at91rm9200_pmc_setup); 401 - 402 - static void __init of_at91sam9260_pmc_setup(struct device_node *np) 403 - { 404 - of_at91_pmc_setup(np, &at91sam9260_caps); 405 - } 406 - CLK_OF_DECLARE(at91sam9260_clk_pmc, "atmel,at91sam9260-pmc", 407 - of_at91sam9260_pmc_setup); 408 - 409 - static void __init of_at91sam9g45_pmc_setup(struct device_node *np) 410 - { 411 - of_at91_pmc_setup(np, &at91sam9g45_caps); 412 - } 413 - CLK_OF_DECLARE(at91sam9g45_clk_pmc, "atmel,at91sam9g45-pmc", 414 - of_at91sam9g45_pmc_setup); 415 - 416 - static void __init of_at91sam9n12_pmc_setup(struct device_node *np) 417 - { 418 - of_at91_pmc_setup(np, &at91sam9n12_caps); 419 - } 420 - CLK_OF_DECLARE(at91sam9n12_clk_pmc, "atmel,at91sam9n12-pmc", 421 - of_at91sam9n12_pmc_setup); 422 - 423 - static void __init of_at91sam9x5_pmc_setup(struct device_node *np) 424 - { 425 - of_at91_pmc_setup(np, &at91sam9x5_caps); 426 - } 427 - CLK_OF_DECLARE(at91sam9x5_clk_pmc, "atmel,at91sam9x5-pmc", 428 - of_at91sam9x5_pmc_setup); 429 - 430 - static void __init of_sama5d2_pmc_setup(struct device_node *np) 431 - { 432 - of_at91_pmc_setup(np, &sama5d2_caps); 433 - } 434 - CLK_OF_DECLARE(sama5d2_clk_pmc, "atmel,sama5d2-pmc", 435 - of_sama5d2_pmc_setup); 436 - 437 - static void __init of_sama5d3_pmc_setup(struct device_node *np) 438 - { 439 - of_at91_pmc_setup(np, &sama5d3_caps); 440 - } 441 - CLK_OF_DECLARE(sama5d3_clk_pmc, "atmel,sama5d3-pmc", 442 - of_sama5d3_pmc_setup);
+3 -95
drivers/clk/at91/pmc.h
··· 14 14 15 15 #include <linux/io.h> 16 16 #include <linux/irqdomain.h> 17 + #include <linux/regmap.h> 17 18 #include <linux/spinlock.h> 19 + 20 + extern spinlock_t pmc_pcr_lock; 18 21 19 22 struct clk_range { 20 23 unsigned long min; ··· 26 23 27 24 #define CLK_RANGE(MIN, MAX) {.min = MIN, .max = MAX,} 28 25 29 - struct at91_pmc_caps { 30 - u32 available_irqs; 31 - }; 32 - 33 - struct at91_pmc { 34 - void __iomem *regbase; 35 - int virq; 36 - spinlock_t lock; 37 - const struct at91_pmc_caps *caps; 38 - struct irq_domain *irqdomain; 39 - u32 imr; 40 - }; 41 - 42 - static inline void pmc_lock(struct at91_pmc *pmc) 43 - { 44 - spin_lock(&pmc->lock); 45 - } 46 - 47 - static inline void pmc_unlock(struct at91_pmc *pmc) 48 - { 49 - spin_unlock(&pmc->lock); 50 - } 51 - 52 - static inline u32 pmc_read(struct at91_pmc *pmc, int offset) 53 - { 54 - return readl(pmc->regbase + offset); 55 - } 56 - 57 - static inline void pmc_write(struct at91_pmc *pmc, int offset, u32 value) 58 - { 59 - writel(value, pmc->regbase + offset); 60 - } 61 - 62 26 int of_at91_get_clk_range(struct device_node *np, const char *propname, 63 27 struct clk_range *range); 64 - 65 - void of_at91sam9260_clk_slow_setup(struct device_node *np, 66 - struct at91_pmc *pmc); 67 - 68 - void of_at91rm9200_clk_main_osc_setup(struct device_node *np, 69 - struct at91_pmc *pmc); 70 - void of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np, 71 - struct at91_pmc *pmc); 72 - void of_at91rm9200_clk_main_setup(struct device_node *np, 73 - struct at91_pmc *pmc); 74 - void of_at91sam9x5_clk_main_setup(struct device_node *np, 75 - struct at91_pmc *pmc); 76 - 77 - void of_at91rm9200_clk_pll_setup(struct device_node *np, 78 - struct at91_pmc *pmc); 79 - void of_at91sam9g45_clk_pll_setup(struct device_node *np, 80 - struct at91_pmc *pmc); 81 - void of_at91sam9g20_clk_pllb_setup(struct device_node *np, 82 - struct at91_pmc *pmc); 83 - void of_sama5d3_clk_pll_setup(struct device_node *np, 84 - struct at91_pmc *pmc); 85 - void of_at91sam9x5_clk_plldiv_setup(struct device_node *np, 86 - struct at91_pmc *pmc); 87 - 88 - void of_at91rm9200_clk_master_setup(struct device_node *np, 89 - struct at91_pmc *pmc); 90 - void of_at91sam9x5_clk_master_setup(struct device_node *np, 91 - struct at91_pmc *pmc); 92 - 93 - void of_at91rm9200_clk_sys_setup(struct device_node *np, 94 - struct at91_pmc *pmc); 95 - 96 - void of_at91rm9200_clk_periph_setup(struct device_node *np, 97 - struct at91_pmc *pmc); 98 - void of_at91sam9x5_clk_periph_setup(struct device_node *np, 99 - struct at91_pmc *pmc); 100 - 101 - void of_at91rm9200_clk_prog_setup(struct device_node *np, 102 - struct at91_pmc *pmc); 103 - void of_at91sam9g45_clk_prog_setup(struct device_node *np, 104 - struct at91_pmc *pmc); 105 - void of_at91sam9x5_clk_prog_setup(struct device_node *np, 106 - struct at91_pmc *pmc); 107 - 108 - void of_at91sam9x5_clk_utmi_setup(struct device_node *np, 109 - struct at91_pmc *pmc); 110 - 111 - void of_at91rm9200_clk_usb_setup(struct device_node *np, 112 - struct at91_pmc *pmc); 113 - void of_at91sam9x5_clk_usb_setup(struct device_node *np, 114 - struct at91_pmc *pmc); 115 - void of_at91sam9n12_clk_usb_setup(struct device_node *np, 116 - struct at91_pmc *pmc); 117 - 118 - void of_at91sam9x5_clk_smd_setup(struct device_node *np, 119 - struct at91_pmc *pmc); 120 - 121 - void of_sama5d4_clk_h32mx_setup(struct device_node *np, 122 - struct at91_pmc *pmc); 123 - 124 - void of_sama5d2_clk_generated_setup(struct device_node *np, 125 - struct at91_pmc *pmc); 126 28 127 29 #endif /* __PMC_H_ */
+10 -10
drivers/usb/gadget/udc/atmel_usba_udc.c
··· 17 17 #include <linux/device.h> 18 18 #include <linux/dma-mapping.h> 19 19 #include <linux/list.h> 20 + #include <linux/mfd/syscon.h> 20 21 #include <linux/platform_device.h> 22 + #include <linux/regmap.h> 21 23 #include <linux/usb/ch9.h> 22 24 #include <linux/usb/gadget.h> 23 25 #include <linux/usb/atmel_usba_udc.h> ··· 1890 1888 #ifdef CONFIG_OF 1891 1889 static void at91sam9rl_toggle_bias(struct usba_udc *udc, int is_on) 1892 1890 { 1893 - unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR); 1894 - 1895 - if (is_on) 1896 - at91_pmc_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN); 1897 - else 1898 - at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN)); 1891 + regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN, 1892 + is_on ? AT91_PMC_BIASEN : 0); 1899 1893 } 1900 1894 1901 1895 static void at91sam9g45_pulse_bias(struct usba_udc *udc) 1902 1896 { 1903 - unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR); 1904 - 1905 - at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN)); 1906 - at91_pmc_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN); 1897 + regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN, 0); 1898 + regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN, 1899 + AT91_PMC_BIASEN); 1907 1900 } 1908 1901 1909 1902 static const struct usba_udc_errata at91sam9rl_errata = { ··· 1935 1938 return ERR_PTR(-EINVAL); 1936 1939 1937 1940 udc->errata = match->data; 1941 + udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9g45-pmc"); 1942 + if (udc->errata && IS_ERR(udc->pmc)) 1943 + return ERR_CAST(udc->pmc); 1938 1944 1939 1945 udc->num_ep = 0; 1940 1946
+2
drivers/usb/gadget/udc/atmel_usba_udc.h
··· 354 354 struct dentry *debugfs_root; 355 355 struct dentry *debugfs_regs; 356 356 #endif 357 + 358 + struct regmap *pmc; 357 359 }; 358 360 359 361 static inline struct usba_ep *to_usba_ep(struct usb_ep *ep)
-12
include/linux/clk/at91_pmc.h
··· 16 16 #ifndef AT91_PMC_H 17 17 #define AT91_PMC_H 18 18 19 - #ifndef __ASSEMBLY__ 20 - extern void __iomem *at91_pmc_base; 21 - 22 - #define at91_pmc_read(field) \ 23 - readl_relaxed(at91_pmc_base + field) 24 - 25 - #define at91_pmc_write(field, value) \ 26 - writel_relaxed(value, at91_pmc_base + field) 27 - #else 28 - .extern at91_pmc_base 29 - #endif 30 - 31 19 #define AT91_PMC_SCER 0x00 /* System Clock Enable Register */ 32 20 #define AT91_PMC_SCDR 0x04 /* System Clock Disable Register */ 33 21