i2c-s3c2410: Fixup style problems from checkpatch.pl

Fixup the 36 warnings and errors generated from running
checkpatch.pl on the driver. The warnings are too numerous
to be listed here.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>

Ben Dooks 3d0911bf 1bda7128

+44 -44
+44 -44
drivers/i2c/busses/i2c-s3c2410.c
··· 109 109 * the default if there is none 110 110 */ 111 111 112 - static inline struct s3c2410_platform_i2c *s3c24xx_i2c_get_platformdata(struct device *dev) 112 + static inline struct s3c2410_platform_i2c * 113 + s3c24xx_i2c_get_platformdata(struct device *dev) 113 114 { 114 115 if (dev->platform_data != NULL) 115 116 return (struct s3c2410_platform_i2c *)dev->platform_data; ··· 130 129 131 130 i2c->msg_ptr = 0; 132 131 i2c->msg = NULL; 133 - i2c->msg_idx ++; 132 + i2c->msg_idx++; 134 133 i2c->msg_num = 0; 135 134 if (ret) 136 135 i2c->msg_idx = ret; ··· 141 140 static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c) 142 141 { 143 142 unsigned long tmp; 144 - 143 + 145 144 tmp = readl(i2c->regs + S3C2410_IICCON); 146 145 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON); 147 - 148 146 } 149 147 150 148 static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c) 151 149 { 152 150 unsigned long tmp; 153 - 151 + 154 152 tmp = readl(i2c->regs + S3C2410_IICCON); 155 153 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON); 156 - 157 154 } 158 155 159 156 /* irq enable/disable functions */ ··· 159 160 static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c) 160 161 { 161 162 unsigned long tmp; 162 - 163 + 163 164 tmp = readl(i2c->regs + S3C2410_IICCON); 164 165 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON); 165 166 } ··· 167 168 static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c) 168 169 { 169 170 unsigned long tmp; 170 - 171 + 171 172 tmp = readl(i2c->regs + S3C2410_IICCON); 172 173 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON); 173 174 } ··· 175 176 176 177 /* s3c24xx_i2c_message_start 177 178 * 178 - * put the start of a message onto the bus 179 + * put the start of a message onto the bus 179 180 */ 180 181 181 - static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c, 182 + static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c, 182 183 struct i2c_msg *msg) 183 184 { 184 185 unsigned int addr = (msg->addr & 0x7f) << 1; ··· 197 198 if (msg->flags & I2C_M_REV_DIR_ADDR) 198 199 addr ^= 1; 199 200 200 - // todo - check for wether ack wanted or not 201 + /* todo - check for wether ack wanted or not */ 201 202 s3c24xx_i2c_enable_ack(i2c); 202 203 203 204 iiccon = readl(i2c->regs + S3C2410_IICCON); 204 205 writel(stat, i2c->regs + S3C2410_IICSTAT); 205 - 206 + 206 207 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr); 207 208 writeb(addr, i2c->regs + S3C2410_IICDS); 208 - 209 + 209 210 /* delay here to ensure the data byte has gotten onto the bus 210 211 * before the transaction is started */ 211 212 ··· 213 214 214 215 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon); 215 216 writel(iiccon, i2c->regs + S3C2410_IICCON); 216 - 217 - stat |= S3C2410_IICSTAT_START; 217 + 218 + stat |= S3C2410_IICSTAT_START; 218 219 writel(stat, i2c->regs + S3C2410_IICSTAT); 219 220 } 220 221 ··· 225 226 dev_dbg(i2c->dev, "STOP\n"); 226 227 227 228 /* stop the transfer */ 228 - iicstat &= ~ S3C2410_IICSTAT_START; 229 + iicstat &= ~S3C2410_IICSTAT_START; 229 230 writel(iicstat, i2c->regs + S3C2410_IICSTAT); 230 - 231 + 231 232 i2c->state = STATE_STOP; 232 - 233 + 233 234 s3c24xx_i2c_master_complete(i2c, ret); 234 235 s3c24xx_i2c_disable_irq(i2c); 235 236 } ··· 239 240 240 241 /* is_lastmsg() 241 242 * 242 - * returns TRUE if the current message is the last in the set 243 + * returns TRUE if the current message is the last in the set 243 244 */ 244 245 245 246 static inline int is_lastmsg(struct s3c24xx_i2c *i2c) ··· 287 288 288 289 case STATE_STOP: 289 290 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__); 290 - s3c24xx_i2c_disable_irq(i2c); 291 + s3c24xx_i2c_disable_irq(i2c); 291 292 goto out_ack; 292 293 293 294 case STATE_START: 294 295 /* last thing we did was send a start condition on the 295 296 * bus, or started a new i2c message 296 297 */ 297 - 298 + 298 299 if (iicstat & S3C2410_IICSTAT_LASTBIT && 299 300 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) { 300 301 /* ack was not received... */ ··· 320 321 if (i2c->state == STATE_READ) 321 322 goto prepare_read; 322 323 323 - /* fall through to the write state, as we will need to 324 + /* fall through to the write state, as we will need to 324 325 * send a byte as well */ 325 326 326 327 case STATE_WRITE: ··· 337 338 } 338 339 } 339 340 340 - retry_write: 341 + retry_write: 341 342 342 343 if (!is_msgend(i2c)) { 343 344 byte = i2c->msg->buf[i2c->msg_ptr++]; ··· 357 358 dev_dbg(i2c->dev, "WRITE: Next Message\n"); 358 359 359 360 i2c->msg_ptr = 0; 360 - i2c->msg_idx ++; 361 + i2c->msg_idx++; 361 362 i2c->msg++; 362 - 363 + 363 364 /* check to see if we need to do another message */ 364 365 if (i2c->msg->flags & I2C_M_NOSTART) { 365 366 ··· 373 374 374 375 goto retry_write; 375 376 } else { 376 - 377 377 /* send the new start */ 378 378 s3c24xx_i2c_message_start(i2c, i2c->msg); 379 379 i2c->state = STATE_START; ··· 386 388 break; 387 389 388 390 case STATE_READ: 389 - /* we have a byte of data in the data register, do 391 + /* we have a byte of data in the data register, do 390 392 * something with it, and then work out wether we are 391 393 * going to do any more read/write 392 394 */ ··· 394 396 byte = readb(i2c->regs + S3C2410_IICDS); 395 397 i2c->msg->buf[i2c->msg_ptr++] = byte; 396 398 397 - prepare_read: 399 + prepare_read: 398 400 if (is_msglast(i2c)) { 399 401 /* last byte of buffer */ 400 402 401 403 if (is_lastmsg(i2c)) 402 404 s3c24xx_i2c_disable_ack(i2c); 403 - 405 + 404 406 } else if (is_msgend(i2c)) { 405 407 /* ok, we've read the entire buffer, see if there 406 408 * is anything else we need to do */ ··· 426 428 /* acknowlegde the IRQ and get back on with the work */ 427 429 428 430 out_ack: 429 - tmp = readl(i2c->regs + S3C2410_IICCON); 431 + tmp = readl(i2c->regs + S3C2410_IICCON); 430 432 tmp &= ~S3C2410_IICCON_IRQPEND; 431 433 writel(tmp, i2c->regs + S3C2410_IICCON); 432 434 out: ··· 447 449 status = readl(i2c->regs + S3C2410_IICSTAT); 448 450 449 451 if (status & S3C2410_IICSTAT_ARBITR) { 450 - // deal with arbitration loss 452 + /* deal with arbitration loss */ 451 453 dev_err(i2c->dev, "deal with arbitration loss\n"); 452 454 } 453 455 454 456 if (i2c->state == STATE_IDLE) { 455 457 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n"); 456 458 457 - tmp = readl(i2c->regs + S3C2410_IICCON); 459 + tmp = readl(i2c->regs + S3C2410_IICCON); 458 460 tmp &= ~S3C2410_IICCON_IRQPEND; 459 461 writel(tmp, i2c->regs + S3C2410_IICCON); 460 462 goto out; 461 463 } 462 - 464 + 463 465 /* pretty much this leaves us with the fact that we've 464 466 * transmitted or received whatever byte we last sent */ 465 467 ··· 482 484 483 485 while (timeout-- > 0) { 484 486 iicstat = readl(i2c->regs + S3C2410_IICSTAT); 485 - 487 + 486 488 if (!(iicstat & S3C2410_IICSTAT_BUSBUSY)) 487 489 return 0; 488 490 ··· 500 502 * this starts an i2c transfer 501 503 */ 502 504 503 - static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, struct i2c_msg *msgs, int num) 505 + static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, 506 + struct i2c_msg *msgs, int num) 504 507 { 505 508 unsigned long timeout; 506 509 int ret; ··· 527 528 s3c24xx_i2c_enable_irq(i2c); 528 529 s3c24xx_i2c_message_start(i2c, msgs); 529 530 spin_unlock_irq(&i2c->lock); 530 - 531 + 531 532 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5); 532 533 533 534 ret = i2c->msg_idx; 534 535 535 - /* having these next two as dev_err() makes life very 536 + /* having these next two as dev_err() makes life very 536 537 * noisy when doing an i2cdetect */ 537 538 538 539 if (timeout == 0) ··· 641 642 { 642 643 int diff = freq - wanted; 643 644 644 - return (diff >= -2 && diff <= 2); 645 + return diff >= -2 && diff <= 2; 645 646 } 646 647 647 648 /* s3c24xx_i2c_clockrate ··· 664 665 665 666 pdata = s3c24xx_i2c_get_platformdata(i2c->adap.dev.parent); 666 667 clkin /= 1000; /* clkin now in KHz */ 667 - 668 + 668 669 dev_dbg(i2c->dev, "pdata %p, freq %lu %lu..%lu\n", 669 670 pdata, pdata->bus_freq, pdata->min_freq, pdata->max_freq); 670 671 ··· 772 773 773 774 /* s3c24xx_i2c_init 774 775 * 775 - * initialise the controller, set the IO lines and frequency 776 + * initialise the controller, set the IO lines and frequency 776 777 */ 777 778 778 779 static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c) ··· 791 792 s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_IICSCL); 792 793 793 794 /* write slave address */ 794 - 795 + 795 796 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD); 796 797 797 798 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr); ··· 876 877 goto err_ioarea; 877 878 } 878 879 879 - dev_dbg(&pdev->dev, "registers %p (%p, %p)\n", i2c->regs, i2c->ioarea, res); 880 + dev_dbg(&pdev->dev, "registers %p (%p, %p)\n", 881 + i2c->regs, i2c->ioarea, res); 880 882 881 883 /* setup info block for the i2c core */ 882 884 ··· 891 891 goto err_iomap; 892 892 893 893 /* find the IRQ for this unit (note, this relies on the init call to 894 - * ensure no current IRQs pending 894 + * ensure no current IRQs pending 895 895 */ 896 896 897 897 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); ··· 910 910 } 911 911 912 912 i2c->irq = res; 913 - 913 + 914 914 dev_dbg(&pdev->dev, "irq resource %p (%lu)\n", res, 915 915 (unsigned long)res->start); 916 916