···109 * the default if there is none110*/111112-static inline struct s3c2410_platform_i2c *s3c24xx_i2c_get_platformdata(struct device *dev)0113{114 if (dev->platform_data != NULL)115 return (struct s3c2410_platform_i2c *)dev->platform_data;···130131 i2c->msg_ptr = 0;132 i2c->msg = NULL;133- i2c->msg_idx ++;134 i2c->msg_num = 0;135 if (ret)136 i2c->msg_idx = ret;···141static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c)142{143 unsigned long tmp;144-145 tmp = readl(i2c->regs + S3C2410_IICCON);146 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);147-148}149150static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c)151{152 unsigned long tmp;153-154 tmp = readl(i2c->regs + S3C2410_IICCON);155 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);156-157}158159/* irq enable/disable functions */···159static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c)160{161 unsigned long tmp;162-163 tmp = readl(i2c->regs + S3C2410_IICCON);164 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);165}···167static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c)168{169 unsigned long tmp;170-171 tmp = readl(i2c->regs + S3C2410_IICCON);172 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);173}···175176/* s3c24xx_i2c_message_start177 *178- * put the start of a message onto the bus 179*/180181-static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c, 182 struct i2c_msg *msg)183{184 unsigned int addr = (msg->addr & 0x7f) << 1;···197 if (msg->flags & I2C_M_REV_DIR_ADDR)198 addr ^= 1;199200- // todo - check for wether ack wanted or not201 s3c24xx_i2c_enable_ack(i2c);202203 iiccon = readl(i2c->regs + S3C2410_IICCON);204 writel(stat, i2c->regs + S3C2410_IICSTAT);205-206 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr);207 writeb(addr, i2c->regs + S3C2410_IICDS);208-209 /* delay here to ensure the data byte has gotten onto the bus210 * before the transaction is started */211···213214 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon);215 writel(iiccon, i2c->regs + S3C2410_IICCON);216-217- stat |= S3C2410_IICSTAT_START;218 writel(stat, i2c->regs + S3C2410_IICSTAT);219}220···225 dev_dbg(i2c->dev, "STOP\n");226227 /* stop the transfer */228- iicstat &= ~ S3C2410_IICSTAT_START;229 writel(iicstat, i2c->regs + S3C2410_IICSTAT);230-231 i2c->state = STATE_STOP;232-233 s3c24xx_i2c_master_complete(i2c, ret);234 s3c24xx_i2c_disable_irq(i2c);235}···239240/* is_lastmsg()241 *242- * returns TRUE if the current message is the last in the set 243*/244245static inline int is_lastmsg(struct s3c24xx_i2c *i2c)···287288 case STATE_STOP:289 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);290- s3c24xx_i2c_disable_irq(i2c); 291 goto out_ack;292293 case STATE_START:294 /* last thing we did was send a start condition on the295 * bus, or started a new i2c message296 */297-298 if (iicstat & S3C2410_IICSTAT_LASTBIT &&299 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {300 /* ack was not received... */···320 if (i2c->state == STATE_READ)321 goto prepare_read;322323- /* fall through to the write state, as we will need to 324 * send a byte as well */325326 case STATE_WRITE:···337 }338 }339340- retry_write:341342 if (!is_msgend(i2c)) {343 byte = i2c->msg->buf[i2c->msg_ptr++];···357 dev_dbg(i2c->dev, "WRITE: Next Message\n");358359 i2c->msg_ptr = 0;360- i2c->msg_idx ++;361 i2c->msg++;362-363 /* check to see if we need to do another message */364 if (i2c->msg->flags & I2C_M_NOSTART) {365···373374 goto retry_write;375 } else {376-377 /* send the new start */378 s3c24xx_i2c_message_start(i2c, i2c->msg);379 i2c->state = STATE_START;···386 break;387388 case STATE_READ:389- /* we have a byte of data in the data register, do 390 * something with it, and then work out wether we are391 * going to do any more read/write392 */···394 byte = readb(i2c->regs + S3C2410_IICDS);395 i2c->msg->buf[i2c->msg_ptr++] = byte;396397- prepare_read:398 if (is_msglast(i2c)) {399 /* last byte of buffer */400401 if (is_lastmsg(i2c))402 s3c24xx_i2c_disable_ack(i2c);403-404 } else if (is_msgend(i2c)) {405 /* ok, we've read the entire buffer, see if there406 * is anything else we need to do */···426 /* acknowlegde the IRQ and get back on with the work */427428 out_ack:429- tmp = readl(i2c->regs + S3C2410_IICCON); 430 tmp &= ~S3C2410_IICCON_IRQPEND;431 writel(tmp, i2c->regs + S3C2410_IICCON);432 out:···447 status = readl(i2c->regs + S3C2410_IICSTAT);448449 if (status & S3C2410_IICSTAT_ARBITR) {450- // deal with arbitration loss451 dev_err(i2c->dev, "deal with arbitration loss\n");452 }453454 if (i2c->state == STATE_IDLE) {455 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");456457- tmp = readl(i2c->regs + S3C2410_IICCON); 458 tmp &= ~S3C2410_IICCON_IRQPEND;459 writel(tmp, i2c->regs + S3C2410_IICCON);460 goto out;461 }462-463 /* pretty much this leaves us with the fact that we've464 * transmitted or received whatever byte we last sent */465···482483 while (timeout-- > 0) {484 iicstat = readl(i2c->regs + S3C2410_IICSTAT);485-486 if (!(iicstat & S3C2410_IICSTAT_BUSBUSY))487 return 0;488···500 * this starts an i2c transfer501*/502503-static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, struct i2c_msg *msgs, int num)0504{505 unsigned long timeout;506 int ret;···527 s3c24xx_i2c_enable_irq(i2c);528 s3c24xx_i2c_message_start(i2c, msgs);529 spin_unlock_irq(&i2c->lock);530-531 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);532533 ret = i2c->msg_idx;534535- /* having these next two as dev_err() makes life very 536 * noisy when doing an i2cdetect */537538 if (timeout == 0)···641{642 int diff = freq - wanted;643644- return (diff >= -2 && diff <= 2);645}646647/* s3c24xx_i2c_clockrate···664665 pdata = s3c24xx_i2c_get_platformdata(i2c->adap.dev.parent);666 clkin /= 1000; /* clkin now in KHz */667-668 dev_dbg(i2c->dev, "pdata %p, freq %lu %lu..%lu\n",669 pdata, pdata->bus_freq, pdata->min_freq, pdata->max_freq);670···772773/* s3c24xx_i2c_init774 *775- * initialise the controller, set the IO lines and frequency 776*/777778static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)···791 s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_IICSCL);792793 /* write slave address */794-795 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD);796797 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);···876 goto err_ioarea;877 }878879- dev_dbg(&pdev->dev, "registers %p (%p, %p)\n", i2c->regs, i2c->ioarea, res);0880881 /* setup info block for the i2c core */882···891 goto err_iomap;892893 /* find the IRQ for this unit (note, this relies on the init call to894- * ensure no current IRQs pending 895 */896897 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);···910 }911912 i2c->irq = res;913-914 dev_dbg(&pdev->dev, "irq resource %p (%lu)\n", res,915 (unsigned long)res->start);916
···109 * the default if there is none110*/111112+static inline struct s3c2410_platform_i2c *113+s3c24xx_i2c_get_platformdata(struct device *dev)114{115 if (dev->platform_data != NULL)116 return (struct s3c2410_platform_i2c *)dev->platform_data;···129130 i2c->msg_ptr = 0;131 i2c->msg = NULL;132+ i2c->msg_idx++;133 i2c->msg_num = 0;134 if (ret)135 i2c->msg_idx = ret;···140static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c)141{142 unsigned long tmp;143+144 tmp = readl(i2c->regs + S3C2410_IICCON);145 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);0146}147148static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c)149{150 unsigned long tmp;151+152 tmp = readl(i2c->regs + S3C2410_IICCON);153 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);0154}155156/* irq enable/disable functions */···160static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c)161{162 unsigned long tmp;163+164 tmp = readl(i2c->regs + S3C2410_IICCON);165 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);166}···168static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c)169{170 unsigned long tmp;171+172 tmp = readl(i2c->regs + S3C2410_IICCON);173 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);174}···176177/* s3c24xx_i2c_message_start178 *179+ * put the start of a message onto the bus180*/181182+static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c,183 struct i2c_msg *msg)184{185 unsigned int addr = (msg->addr & 0x7f) << 1;···198 if (msg->flags & I2C_M_REV_DIR_ADDR)199 addr ^= 1;200201+ /* todo - check for wether ack wanted or not */202 s3c24xx_i2c_enable_ack(i2c);203204 iiccon = readl(i2c->regs + S3C2410_IICCON);205 writel(stat, i2c->regs + S3C2410_IICSTAT);206+207 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr);208 writeb(addr, i2c->regs + S3C2410_IICDS);209+210 /* delay here to ensure the data byte has gotten onto the bus211 * before the transaction is started */212···214215 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon);216 writel(iiccon, i2c->regs + S3C2410_IICCON);217+218+ stat |= S3C2410_IICSTAT_START;219 writel(stat, i2c->regs + S3C2410_IICSTAT);220}221···226 dev_dbg(i2c->dev, "STOP\n");227228 /* stop the transfer */229+ iicstat &= ~S3C2410_IICSTAT_START;230 writel(iicstat, i2c->regs + S3C2410_IICSTAT);231+232 i2c->state = STATE_STOP;233+234 s3c24xx_i2c_master_complete(i2c, ret);235 s3c24xx_i2c_disable_irq(i2c);236}···240241/* is_lastmsg()242 *243+ * returns TRUE if the current message is the last in the set244*/245246static inline int is_lastmsg(struct s3c24xx_i2c *i2c)···288289 case STATE_STOP:290 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);291+ s3c24xx_i2c_disable_irq(i2c);292 goto out_ack;293294 case STATE_START:295 /* last thing we did was send a start condition on the296 * bus, or started a new i2c message297 */298+299 if (iicstat & S3C2410_IICSTAT_LASTBIT &&300 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {301 /* ack was not received... */···321 if (i2c->state == STATE_READ)322 goto prepare_read;323324+ /* fall through to the write state, as we will need to325 * send a byte as well */326327 case STATE_WRITE:···338 }339 }340341+ retry_write:342343 if (!is_msgend(i2c)) {344 byte = i2c->msg->buf[i2c->msg_ptr++];···358 dev_dbg(i2c->dev, "WRITE: Next Message\n");359360 i2c->msg_ptr = 0;361+ i2c->msg_idx++;362 i2c->msg++;363+364 /* check to see if we need to do another message */365 if (i2c->msg->flags & I2C_M_NOSTART) {366···374375 goto retry_write;376 } else {0377 /* send the new start */378 s3c24xx_i2c_message_start(i2c, i2c->msg);379 i2c->state = STATE_START;···388 break;389390 case STATE_READ:391+ /* we have a byte of data in the data register, do392 * something with it, and then work out wether we are393 * going to do any more read/write394 */···396 byte = readb(i2c->regs + S3C2410_IICDS);397 i2c->msg->buf[i2c->msg_ptr++] = byte;398399+ prepare_read:400 if (is_msglast(i2c)) {401 /* last byte of buffer */402403 if (is_lastmsg(i2c))404 s3c24xx_i2c_disable_ack(i2c);405+406 } else if (is_msgend(i2c)) {407 /* ok, we've read the entire buffer, see if there408 * is anything else we need to do */···428 /* acknowlegde the IRQ and get back on with the work */429430 out_ack:431+ tmp = readl(i2c->regs + S3C2410_IICCON);432 tmp &= ~S3C2410_IICCON_IRQPEND;433 writel(tmp, i2c->regs + S3C2410_IICCON);434 out:···449 status = readl(i2c->regs + S3C2410_IICSTAT);450451 if (status & S3C2410_IICSTAT_ARBITR) {452+ /* deal with arbitration loss */453 dev_err(i2c->dev, "deal with arbitration loss\n");454 }455456 if (i2c->state == STATE_IDLE) {457 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");458459+ tmp = readl(i2c->regs + S3C2410_IICCON);460 tmp &= ~S3C2410_IICCON_IRQPEND;461 writel(tmp, i2c->regs + S3C2410_IICCON);462 goto out;463 }464+465 /* pretty much this leaves us with the fact that we've466 * transmitted or received whatever byte we last sent */467···484485 while (timeout-- > 0) {486 iicstat = readl(i2c->regs + S3C2410_IICSTAT);487+488 if (!(iicstat & S3C2410_IICSTAT_BUSBUSY))489 return 0;490···502 * this starts an i2c transfer503*/504505+static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c,506+ struct i2c_msg *msgs, int num)507{508 unsigned long timeout;509 int ret;···528 s3c24xx_i2c_enable_irq(i2c);529 s3c24xx_i2c_message_start(i2c, msgs);530 spin_unlock_irq(&i2c->lock);531+532 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);533534 ret = i2c->msg_idx;535536+ /* having these next two as dev_err() makes life very537 * noisy when doing an i2cdetect */538539 if (timeout == 0)···642{643 int diff = freq - wanted;644645+ return diff >= -2 && diff <= 2;646}647648/* s3c24xx_i2c_clockrate···665666 pdata = s3c24xx_i2c_get_platformdata(i2c->adap.dev.parent);667 clkin /= 1000; /* clkin now in KHz */668+669 dev_dbg(i2c->dev, "pdata %p, freq %lu %lu..%lu\n",670 pdata, pdata->bus_freq, pdata->min_freq, pdata->max_freq);671···773774/* s3c24xx_i2c_init775 *776+ * initialise the controller, set the IO lines and frequency777*/778779static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)···792 s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_IICSCL);793794 /* write slave address */795+796 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD);797798 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);···877 goto err_ioarea;878 }879880+ dev_dbg(&pdev->dev, "registers %p (%p, %p)\n",881+ i2c->regs, i2c->ioarea, res);882883 /* setup info block for the i2c core */884···891 goto err_iomap;892893 /* find the IRQ for this unit (note, this relies on the init call to894+ * ensure no current IRQs pending895 */896897 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);···910 }911912 i2c->irq = res;913+914 dev_dbg(&pdev->dev, "irq resource %p (%lu)\n", res,915 (unsigned long)res->start);916