Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clk: renesas: rcar-gen3: Correct parent clock of SYS-DMAC

The clock sources of the AXI BUS clock (266.66 MHz) used for SYS-DMAC
DMA transfers are:

Channel R-Car H3 R-Car M3-W R-Car M3-N
-------------------------------------------------
SYS-DMAC0 S0D3 S0D3 S0D3
SYS-DMAC1 S3D1 S3D1 S3D1
SYS-DMAC2 S3D1 S3D1 S3D1

As a result, change the parent clocks of the SYS-DMAC{1,2} module clocks
on R-Car H3, R-Car M3-W, and R-Car M3-N to S3D1.

NOTE: This information will be reflected in a future revision of the
R-Car Gen3 Hardware Manual.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Update RZ/G2M]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

authored by

Takeshi Kihara and committed by
Geert Uytterhoeven
3c772f71 c2182095

+8 -8
+2 -2
drivers/clk/renesas/r8a774a1-cpg-mssr.c
··· 123 123 DEF_MOD("msiof2", 209, R8A774A1_CLK_MSO), 124 124 DEF_MOD("msiof1", 210, R8A774A1_CLK_MSO), 125 125 DEF_MOD("msiof0", 211, R8A774A1_CLK_MSO), 126 - DEF_MOD("sys-dmac2", 217, R8A774A1_CLK_S0D3), 127 - DEF_MOD("sys-dmac1", 218, R8A774A1_CLK_S0D3), 126 + DEF_MOD("sys-dmac2", 217, R8A774A1_CLK_S3D1), 127 + DEF_MOD("sys-dmac1", 218, R8A774A1_CLK_S3D1), 128 128 DEF_MOD("sys-dmac0", 219, R8A774A1_CLK_S0D3), 129 129 DEF_MOD("cmt3", 300, R8A774A1_CLK_R), 130 130 DEF_MOD("cmt2", 301, R8A774A1_CLK_R),
+2 -2
drivers/clk/renesas/r8a7795-cpg-mssr.c
··· 130 130 DEF_MOD("msiof2", 209, R8A7795_CLK_MSO), 131 131 DEF_MOD("msiof1", 210, R8A7795_CLK_MSO), 132 132 DEF_MOD("msiof0", 211, R8A7795_CLK_MSO), 133 - DEF_MOD("sys-dmac2", 217, R8A7795_CLK_S0D3), 134 - DEF_MOD("sys-dmac1", 218, R8A7795_CLK_S0D3), 133 + DEF_MOD("sys-dmac2", 217, R8A7795_CLK_S3D1), 134 + DEF_MOD("sys-dmac1", 218, R8A7795_CLK_S3D1), 135 135 DEF_MOD("sys-dmac0", 219, R8A7795_CLK_S0D3), 136 136 DEF_MOD("sceg-pub", 229, R8A7795_CLK_CR), 137 137 DEF_MOD("cmt3", 300, R8A7795_CLK_R),
+2 -2
drivers/clk/renesas/r8a7796-cpg-mssr.c
··· 127 127 DEF_MOD("msiof2", 209, R8A7796_CLK_MSO), 128 128 DEF_MOD("msiof1", 210, R8A7796_CLK_MSO), 129 129 DEF_MOD("msiof0", 211, R8A7796_CLK_MSO), 130 - DEF_MOD("sys-dmac2", 217, R8A7796_CLK_S0D3), 131 - DEF_MOD("sys-dmac1", 218, R8A7796_CLK_S0D3), 130 + DEF_MOD("sys-dmac2", 217, R8A7796_CLK_S3D1), 131 + DEF_MOD("sys-dmac1", 218, R8A7796_CLK_S3D1), 132 132 DEF_MOD("sys-dmac0", 219, R8A7796_CLK_S0D3), 133 133 DEF_MOD("cmt3", 300, R8A7796_CLK_R), 134 134 DEF_MOD("cmt2", 301, R8A7796_CLK_R),
+2 -2
drivers/clk/renesas/r8a77965-cpg-mssr.c
··· 123 123 DEF_MOD("msiof2", 209, R8A77965_CLK_MSO), 124 124 DEF_MOD("msiof1", 210, R8A77965_CLK_MSO), 125 125 DEF_MOD("msiof0", 211, R8A77965_CLK_MSO), 126 - DEF_MOD("sys-dmac2", 217, R8A77965_CLK_S0D3), 127 - DEF_MOD("sys-dmac1", 218, R8A77965_CLK_S0D3), 126 + DEF_MOD("sys-dmac2", 217, R8A77965_CLK_S3D1), 127 + DEF_MOD("sys-dmac1", 218, R8A77965_CLK_S3D1), 128 128 DEF_MOD("sys-dmac0", 219, R8A77965_CLK_S0D3), 129 129 130 130 DEF_MOD("cmt3", 300, R8A77965_CLK_R),