clk: renesas: rcar-gen3: Correct parent clock of HS-USB

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

According to the R-Car Gen3 Hardware Manual Rev. 1.00, and the RZ/G2
Hardware Manual Rev. 0.61, the parent clock of the HS-USB module
clocks on R-Car Gen3 and RZ/G2 SoCs is S3D2.

Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
[takeshi: Update R-Car H3, M3-N, and E3]
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Update RZ/G2M and RZ/G2E]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

authored by

Kazuya Mizuguchi and committed by

Geert Uytterhoeven 7 years ago c2182095 8d36fdcc

+7 -7

6 changed files

expand all

drivers

clk

renesas

r8a774a1-cpg-mssr.c

r8a774c0-cpg-mssr.c

r8a7795-cpg-mssr.c

r8a7796-cpg-mssr.c

r8a77965-cpg-mssr.c

r8a77990-cpg-mssr.c

+1 -1

drivers/clk/renesas/r8a774a1-cpg-mssr.c

··· 167 167 DEF_MOD("vspi0", 631, R8A774A1_CLK_S0D1), 168 168 DEF_MOD("ehci1", 702, R8A774A1_CLK_S3D2), 169 169 DEF_MOD("ehci0", 703, R8A774A1_CLK_S3D2), 170 - DEF_MOD("hsusb", 704, R8A774A1_CLK_S3D4), 170 + DEF_MOD("hsusb", 704, R8A774A1_CLK_S3D2), 171 171 DEF_MOD("csi20", 714, R8A774A1_CLK_CSI0), 172 172 DEF_MOD("csi40", 716, R8A774A1_CLK_CSI0), 173 173 DEF_MOD("du2", 722, R8A774A1_CLK_S2D1),

+1 -1

drivers/clk/renesas/r8a774c0-cpg-mssr.c

··· 179 179 DEF_MOD("vspi0", 631, R8A774C0_CLK_S0D1), 180 180 181 181 DEF_MOD("ehci0", 703, R8A774C0_CLK_S3D2), 182 - DEF_MOD("hsusb", 704, R8A774C0_CLK_S3D4), 182 + DEF_MOD("hsusb", 704, R8A774C0_CLK_S3D2), 183 183 DEF_MOD("csi40", 716, R8A774C0_CLK_CSI0), 184 184 DEF_MOD("du1", 723, R8A774C0_CLK_S1D1), 185 185 DEF_MOD("du0", 724, R8A774C0_CLK_S1D1),

+2 -2

drivers/clk/renesas/r8a7795-cpg-mssr.c

··· 199 199 DEF_MOD("ehci2", 701, R8A7795_CLK_S3D2), 200 200 DEF_MOD("ehci1", 702, R8A7795_CLK_S3D2), 201 201 DEF_MOD("ehci0", 703, R8A7795_CLK_S3D2), 202 - DEF_MOD("hsusb", 704, R8A7795_CLK_S3D4), 203 - DEF_MOD("hsusb3", 705, R8A7795_CLK_S3D4), 202 + DEF_MOD("hsusb", 704, R8A7795_CLK_S3D2), 203 + DEF_MOD("hsusb3", 705, R8A7795_CLK_S3D2), 204 204 DEF_MOD("csi21", 713, R8A7795_CLK_CSI0), /* ES1.x */ 205 205 DEF_MOD("csi20", 714, R8A7795_CLK_CSI0), 206 206 DEF_MOD("csi41", 715, R8A7795_CLK_CSI0),

+1 -1

drivers/clk/renesas/r8a7796-cpg-mssr.c

··· 179 179 DEF_MOD("vspi0", 631, R8A7796_CLK_S0D1), 180 180 DEF_MOD("ehci1", 702, R8A7796_CLK_S3D2), 181 181 DEF_MOD("ehci0", 703, R8A7796_CLK_S3D2), 182 - DEF_MOD("hsusb", 704, R8A7796_CLK_S3D4), 182 + DEF_MOD("hsusb", 704, R8A7796_CLK_S3D2), 183 183 DEF_MOD("csi20", 714, R8A7796_CLK_CSI0), 184 184 DEF_MOD("csi40", 716, R8A7796_CLK_CSI0), 185 185 DEF_MOD("du2", 722, R8A7796_CLK_S2D1),

+1 -1

drivers/clk/renesas/r8a77965-cpg-mssr.c

··· 177 177 178 178 DEF_MOD("ehci1", 702, R8A77965_CLK_S3D2), 179 179 DEF_MOD("ehci0", 703, R8A77965_CLK_S3D2), 180 - DEF_MOD("hsusb", 704, R8A77965_CLK_S3D4), 180 + DEF_MOD("hsusb", 704, R8A77965_CLK_S3D2), 181 181 DEF_MOD("csi20", 714, R8A77965_CLK_CSI0), 182 182 DEF_MOD("csi40", 716, R8A77965_CLK_CSI0), 183 183 DEF_MOD("du3", 721, R8A77965_CLK_S2D1),

+1 -1

drivers/clk/renesas/r8a77990-cpg-mssr.c

··· 182 182 DEF_MOD("vspi0", 631, R8A77990_CLK_S0D1), 183 183 184 184 DEF_MOD("ehci0", 703, R8A77990_CLK_S3D2), 185 - DEF_MOD("hsusb", 704, R8A77990_CLK_S3D4), 185 + DEF_MOD("hsusb", 704, R8A77990_CLK_S3D2), 186 186 DEF_MOD("csi40", 716, R8A77990_CLK_CSI0), 187 187 DEF_MOD("du1", 723, R8A77990_CLK_S1D1), 188 188 DEF_MOD("du0", 724, R8A77990_CLK_S1D1),