tjh.dev / kernel
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drm/radeon/kms: leave certain CP int bits enabled

These bits are used for internal communication and should
be left enabled. This may fix s/r issues on some systems.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

authored by Alex Deucher and committed by Dave Airlie 3555e53b c919b371

+2 -2
unified split
+1 -1
drivers/gpu/drm/radeon/evergreen.c
··· 1521 1521 { 1522 1522 u32 tmp; 1523 1523 1524 - WREG32(CP_INT_CNTL, 0); 1524 + WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); 1525 1525 WREG32(GRBM_INT_CNTL, 0); 1526 1526 WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); 1527 1527 WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
+1 -1
drivers/gpu/drm/radeon/r600.c
··· 2912 2912 { 2913 2913 u32 tmp; 2914 2914 2915 - WREG32(CP_INT_CNTL, 0); 2915 + WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); 2916 2916 WREG32(GRBM_INT_CNTL, 0); 2917 2917 WREG32(DxMODE_INT_MASK, 0); 2918 2918 if (ASIC_IS_DCE3(rdev)) {