tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
firmware: imx: scu-pd: decouple the SS information from domain names
As resource power domain service is provided by SCU firmware, no
SS information required. So we can remove the SS indicator from
the domain names, then the domains defined can be better shared
among different SCU based platforms.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Kevin Hilman <khilman@kernel.org>
Cc: linux-pm@vger.kernel.org
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
authored by
Aisheng Dong
and committed by
Shawn Guo
32654dad
ad8cc071
+46
-42
+46
-42
drivers/firmware/imx/scu-pd.c
+46
-42
drivers/firmware/imx/scu-pd.c
···
87
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88
88
static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = {
89
89
/* LSIO SS */
90
-
{ "lsio-pwm", IMX_SC_R_PWM_0, 8, true, 0 },
91
-
{ "lsio-gpio", IMX_SC_R_GPIO_0, 8, true, 0 },
92
-
{ "lsio-gpt", IMX_SC_R_GPT_0, 5, true, 0 },
93
-
{ "lsio-kpp", IMX_SC_R_KPP, 1, false, 0 },
94
-
{ "lsio-fspi", IMX_SC_R_FSPI_0, 2, true, 0 },
95
-
{ "lsio-mu", IMX_SC_R_MU_0A, 14, true, 0 },
90
+
{ "pwm", IMX_SC_R_PWM_0, 8, true, 0 },
91
+
{ "gpio", IMX_SC_R_GPIO_0, 8, true, 0 },
92
+
{ "gpt", IMX_SC_R_GPT_0, 5, true, 0 },
93
+
{ "kpp", IMX_SC_R_KPP, 1, false, 0 },
94
+
{ "fspi", IMX_SC_R_FSPI_0, 2, true, 0 },
95
+
{ "mu", IMX_SC_R_MU_0A, 14, true, 0 },
96
96
97
97
/* CONN SS */
98
-
{ "con-usb", IMX_SC_R_USB_0, 2, true, 0 },
99
-
{ "con-usb0phy", IMX_SC_R_USB_0_PHY, 1, false, 0 },
100
-
{ "con-usb2", IMX_SC_R_USB_2, 1, false, 0 },
101
-
{ "con-usb2phy", IMX_SC_R_USB_2_PHY, 1, false, 0 },
102
-
{ "con-sdhc", IMX_SC_R_SDHC_0, 3, true, 0 },
103
-
{ "con-enet", IMX_SC_R_ENET_0, 2, true, 0 },
104
-
{ "con-nand", IMX_SC_R_NAND, 1, false, 0 },
105
-
{ "con-mlb", IMX_SC_R_MLB_0, 1, true, 0 },
98
+
{ "usb", IMX_SC_R_USB_0, 2, true, 0 },
99
+
{ "usb0phy", IMX_SC_R_USB_0_PHY, 1, false, 0 },
100
+
{ "usb2", IMX_SC_R_USB_2, 1, false, 0 },
101
+
{ "usb2phy", IMX_SC_R_USB_2_PHY, 1, false, 0 },
102
+
{ "sdhc", IMX_SC_R_SDHC_0, 3, true, 0 },
103
+
{ "enet", IMX_SC_R_ENET_0, 2, true, 0 },
104
+
{ "nand", IMX_SC_R_NAND, 1, false, 0 },
105
+
{ "mlb", IMX_SC_R_MLB_0, 1, true, 0 },
106
106
107
-
/* Audio DMA SS */
108
-
{ "adma-audio-pll0", IMX_SC_R_AUDIO_PLL_0, 1, false, 0 },
109
-
{ "adma-audio-pll1", IMX_SC_R_AUDIO_PLL_1, 1, false, 0 },
110
-
{ "adma-audio-clk-0", IMX_SC_R_AUDIO_CLK_0, 1, false, 0 },
111
-
{ "adma-dma0-ch", IMX_SC_R_DMA_0_CH0, 16, true, 0 },
112
-
{ "adma-dma1-ch", IMX_SC_R_DMA_1_CH0, 16, true, 0 },
113
-
{ "adma-dma2-ch", IMX_SC_R_DMA_2_CH0, 5, true, 0 },
114
-
{ "adma-asrc0", IMX_SC_R_ASRC_0, 1, false, 0 },
115
-
{ "adma-asrc1", IMX_SC_R_ASRC_1, 1, false, 0 },
116
-
{ "adma-esai0", IMX_SC_R_ESAI_0, 1, false, 0 },
117
-
{ "adma-spdif0", IMX_SC_R_SPDIF_0, 1, false, 0 },
118
-
{ "adma-sai", IMX_SC_R_SAI_0, 3, true, 0 },
119
-
{ "adma-amix", IMX_SC_R_AMIX, 1, false, 0 },
120
-
{ "adma-mqs0", IMX_SC_R_MQS_0, 1, false, 0 },
121
-
{ "adma-dsp", IMX_SC_R_DSP, 1, false, 0 },
122
-
{ "adma-dsp-ram", IMX_SC_R_DSP_RAM, 1, false, 0 },
123
-
{ "adma-can", IMX_SC_R_CAN_0, 3, true, 0 },
124
-
{ "adma-ftm", IMX_SC_R_FTM_0, 2, true, 0 },
125
-
{ "adma-lpi2c", IMX_SC_R_I2C_0, 4, true, 0 },
126
-
{ "adma-adc", IMX_SC_R_ADC_0, 1, true, 0 },
127
-
{ "adma-lcd", IMX_SC_R_LCD_0, 1, true, 0 },
128
-
{ "adma-lcd0-pwm", IMX_SC_R_LCD_0_PWM_0, 1, true, 0 },
129
-
{ "adma-lpuart", IMX_SC_R_UART_0, 4, true, 0 },
130
-
{ "adma-lpspi", IMX_SC_R_SPI_0, 4, true, 0 },
107
+
/* AUDIO SS */
108
+
{ "audio-pll0", IMX_SC_R_AUDIO_PLL_0, 1, false, 0 },
109
+
{ "audio-pll1", IMX_SC_R_AUDIO_PLL_1, 1, false, 0 },
110
+
{ "audio-clk-0", IMX_SC_R_AUDIO_CLK_0, 1, false, 0 },
111
+
{ "dma0-ch", IMX_SC_R_DMA_0_CH0, 16, true, 0 },
112
+
{ "dma1-ch", IMX_SC_R_DMA_1_CH0, 16, true, 0 },
113
+
{ "dma2-ch", IMX_SC_R_DMA_2_CH0, 5, true, 0 },
114
+
{ "asrc0", IMX_SC_R_ASRC_0, 1, false, 0 },
115
+
{ "asrc1", IMX_SC_R_ASRC_1, 1, false, 0 },
116
+
{ "esai0", IMX_SC_R_ESAI_0, 1, false, 0 },
117
+
{ "spdif0", IMX_SC_R_SPDIF_0, 1, false, 0 },
118
+
{ "sai", IMX_SC_R_SAI_0, 3, true, 0 },
119
+
{ "amix", IMX_SC_R_AMIX, 1, false, 0 },
120
+
{ "mqs0", IMX_SC_R_MQS_0, 1, false, 0 },
121
+
{ "dsp", IMX_SC_R_DSP, 1, false, 0 },
122
+
{ "dsp-ram", IMX_SC_R_DSP_RAM, 1, false, 0 },
131
123
132
-
/* VPU SS */
124
+
/* DMA SS */
125
+
{ "can", IMX_SC_R_CAN_0, 3, true, 0 },
126
+
{ "ftm", IMX_SC_R_FTM_0, 2, true, 0 },
127
+
{ "lpi2c", IMX_SC_R_I2C_0, 4, true, 0 },
128
+
{ "adc", IMX_SC_R_ADC_0, 1, true, 0 },
129
+
{ "lcd", IMX_SC_R_LCD_0, 1, true, 0 },
130
+
{ "lcd0-pwm", IMX_SC_R_LCD_0_PWM_0, 1, true, 0 },
131
+
{ "lpuart", IMX_SC_R_UART_0, 4, true, 0 },
132
+
{ "lpspi", IMX_SC_R_SPI_0, 4, true, 0 },
133
+
134
+
/* VPU SS */
133
135
{ "vpu", IMX_SC_R_VPU, 1, false, 0 },
134
136
{ "vpu-pid", IMX_SC_R_VPU_PID0, 8, true, 0 },
135
137
{ "vpu-dec0", IMX_SC_R_VPU_DEC_0, 1, false, 0 },
···
141
139
{ "gpu0-pid", IMX_SC_R_GPU_0_PID0, 4, true, 0 },
142
140
143
141
/* HSIO SS */
144
-
{ "hsio-pcie-b", IMX_SC_R_PCIE_B, 1, false, 0 },
145
-
{ "hsio-serdes-1", IMX_SC_R_SERDES_1, 1, false, 0 },
142
+
{ "pcie-b", IMX_SC_R_PCIE_B, 1, false, 0 },
143
+
{ "serdes-1", IMX_SC_R_SERDES_1, 1, false, 0 },
146
144
{ "hsio-gpio", IMX_SC_R_HSIO_GPIO, 1, false, 0 },
147
145
148
-
/* MIPI/LVDS SS */
146
+
/* MIPI SS */
149
147
{ "mipi0", IMX_SC_R_MIPI_0, 1, false, 0 },
150
148
{ "mipi0-pwm0", IMX_SC_R_MIPI_0_PWM_0, 1, false, 0 },
151
149
{ "mipi0-i2c", IMX_SC_R_MIPI_0_I2C_0, 2, true, 0 },
150
+
151
+
/* LVDS SS */
152
152
{ "lvds0", IMX_SC_R_LVDS_0, 1, false, 0 },
153
153
154
154
/* DC SS */