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drm/i915/vdsc: Introduce 3rd VDSC engine VDSC2

Introduce the register bits to enable the 3rd DSC engine VDSC2.
Add support to read/write these bits.

v2: Only introduce bits that are used and update the subject and commit
message. (Suraj)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241030041036.1238006-5-ankit.k.nautiyal@intel.com

Ankit Nautiyal 3013e2e4 d457918c

+11 -1
+9 -1
drivers/gpu/drm/i915/display/intel_vdsc.c
··· 775 775 dss_ctl2_val |= VDSC1_ENABLE; 776 776 dss_ctl1_val |= JOINER_ENABLE; 777 777 } 778 + 779 + if (vdsc_instances_per_pipe > 2) { 780 + dss_ctl2_val |= VDSC2_ENABLE; 781 + dss_ctl2_val |= SMALL_JOINER_CONFIG_3_ENGINES; 782 + } 783 + 778 784 if (crtc_state->joiner_pipes) { 779 785 if (intel_crtc_ultrajoiner_enable_needed(crtc_state)) 780 786 dss_ctl1_val |= ULTRA_JOINER_ENABLE; ··· 982 976 if (!crtc_state->dsc.compression_enable) 983 977 goto out; 984 978 985 - if (dss_ctl1 & JOINER_ENABLE && dss_ctl2 & VDSC1_ENABLE) 979 + if (dss_ctl1 & JOINER_ENABLE && dss_ctl2 & (VDSC2_ENABLE | SMALL_JOINER_CONFIG_3_ENGINES)) 980 + crtc_state->dsc.num_streams = 3; 981 + else if (dss_ctl1 & JOINER_ENABLE && dss_ctl2 & VDSC1_ENABLE) 986 982 crtc_state->dsc.num_streams = 2; 987 983 else 988 984 crtc_state->dsc.num_streams = 1;
+2
drivers/gpu/drm/i915/display/intel_vdsc_regs.h
··· 22 22 23 23 #define DSS_CTL2 _MMIO(0x67404) 24 24 #define VDSC0_ENABLE REG_BIT(31) 25 + #define VDSC2_ENABLE REG_BIT(30) 26 + #define SMALL_JOINER_CONFIG_3_ENGINES REG_BIT(23) 25 27 #define VDSC1_ENABLE REG_BIT(15) 26 28 #define RIGHT_DL_BUF_TARGET_DEPTH_MASK (0xfff << 0) 27 29 #define RIGHT_DL_BUF_TARGET_DEPTH(pixels) ((pixels) << 0)