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kernel os linux

phy: qcom-qmp-combo: simplify clock handling

For the existing PHYs for new binding we are going to drop ref_clk_src
clock and always use ref clock. Rather than introducing additional code
to handle legacy vs current bindings (and clock names), use
devm_clk_bulk_get_optional() when new bindings are used and
devm_clk_bulk_get_all() when legacy bindings are in place.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230711120916.4165894-3-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Dmitry Baryshkov and committed by
Vinod Koul
28e265bf 57a79ce9

+23 -44
+23 -44
drivers/phy/qualcomm/phy-qcom-qmp-combo.c
··· 1358 1358 int (*calibrate_dp_phy)(struct qmp_combo *qmp); 1359 1359 void (*dp_aux_init)(struct qmp_combo *qmp); 1360 1360 1361 - /* clock ids to be requested */ 1362 - const char * const *clk_list; 1363 - int num_clks; 1364 1361 /* resets to be requested */ 1365 1362 const char * const *reset_list; 1366 1363 int num_resets; ··· 1399 1402 1400 1403 struct clk *pipe_clk; 1401 1404 struct clk_bulk_data *clks; 1405 + int num_clks; 1402 1406 struct reset_control_bulk_data *resets; 1403 1407 struct regulator_bulk_data *vregs; 1404 1408 ··· 1460 1462 } 1461 1463 1462 1464 /* list of clocks required by phy */ 1463 - static const char * const qmp_v3_phy_clk_l[] = { 1465 + static const char * const qmp_combo_phy_clk_l[] = { 1464 1466 "aux", "cfg_ahb", "ref", "com_aux", 1465 - }; 1466 - 1467 - static const char * const qmp_v4_phy_clk_l[] = { 1468 - "aux", "ref", "com_aux", 1469 - }; 1470 - 1471 - /* the primary usb3 phy on sm8250 doesn't have a ref clock */ 1472 - static const char * const qmp_v4_sm8250_usbphy_clk_l[] = { 1473 - "aux", "ref_clk_src", "com_aux" 1474 1467 }; 1475 1468 1476 1469 /* list of resets */ ··· 1537 1548 .configure_dp_phy = qmp_v3_configure_dp_phy, 1538 1549 .calibrate_dp_phy = qmp_v3_calibrate_dp_phy, 1539 1550 1540 - .clk_list = qmp_v3_phy_clk_l, 1541 - .num_clks = ARRAY_SIZE(qmp_v3_phy_clk_l), 1542 1551 .reset_list = sc7180_usb3phy_reset_l, 1543 1552 .num_resets = ARRAY_SIZE(sc7180_usb3phy_reset_l), 1544 1553 .vreg_list = qmp_phy_vreg_l, ··· 1580 1593 .configure_dp_phy = qmp_v3_configure_dp_phy, 1581 1594 .calibrate_dp_phy = qmp_v3_calibrate_dp_phy, 1582 1595 1583 - .clk_list = qmp_v3_phy_clk_l, 1584 - .num_clks = ARRAY_SIZE(qmp_v3_phy_clk_l), 1585 1596 .reset_list = msm8996_usb3phy_reset_l, 1586 1597 .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), 1587 1598 .vreg_list = qmp_phy_vreg_l, ··· 1625 1640 .configure_dp_phy = qmp_v4_configure_dp_phy, 1626 1641 .calibrate_dp_phy = qmp_v4_calibrate_dp_phy, 1627 1642 1628 - .clk_list = qmp_v4_phy_clk_l, 1629 - .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l), 1630 1643 .reset_list = msm8996_usb3phy_reset_l, 1631 1644 .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), 1632 1645 .vreg_list = qmp_phy_vreg_l, ··· 1671 1688 .configure_dp_phy = qmp_v4_configure_dp_phy, 1672 1689 .calibrate_dp_phy = qmp_v4_calibrate_dp_phy, 1673 1690 1674 - .clk_list = qmp_v4_phy_clk_l, 1675 - .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l), 1676 1691 .reset_list = msm8996_usb3phy_reset_l, 1677 1692 .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), 1678 1693 .vreg_list = qmp_phy_vreg_l, ··· 1714 1733 .configure_dp_phy = qmp_v3_configure_dp_phy, 1715 1734 .calibrate_dp_phy = qmp_v3_calibrate_dp_phy, 1716 1735 1717 - .clk_list = qmp_v4_phy_clk_l, 1718 - .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l), 1719 1736 .reset_list = msm8996_usb3phy_reset_l, 1720 1737 .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), 1721 1738 .vreg_list = qmp_phy_vreg_l, ··· 1757 1778 .configure_dp_phy = qmp_v4_configure_dp_phy, 1758 1779 .calibrate_dp_phy = qmp_v4_calibrate_dp_phy, 1759 1780 1760 - .clk_list = qmp_v4_sm8250_usbphy_clk_l, 1761 - .num_clks = ARRAY_SIZE(qmp_v4_sm8250_usbphy_clk_l), 1762 1781 .reset_list = msm8996_usb3phy_reset_l, 1763 1782 .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), 1764 1783 .vreg_list = qmp_phy_vreg_l, ··· 1805 1828 .configure_dp_phy = qmp_v4_configure_dp_phy, 1806 1829 .calibrate_dp_phy = qmp_v4_calibrate_dp_phy, 1807 1830 1808 - .clk_list = qmp_v4_phy_clk_l, 1809 - .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l), 1810 1831 .reset_list = msm8996_usb3phy_reset_l, 1811 1832 .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), 1812 1833 .vreg_list = qmp_phy_vreg_l, ··· 1853 1878 .calibrate_dp_phy = qmp_v4_calibrate_dp_phy, 1854 1879 1855 1880 .regs = qmp_v6_usb3phy_regs_layout, 1856 - .clk_list = qmp_v4_phy_clk_l, 1857 - .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l), 1858 1881 .reset_list = msm8996_usb3phy_reset_l, 1859 1882 .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), 1860 1883 .vreg_list = qmp_phy_vreg_l, ··· 2405 2432 goto err_disable_regulators; 2406 2433 } 2407 2434 2408 - ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks); 2435 + ret = clk_bulk_prepare_enable(qmp->num_clks, qmp->clks); 2409 2436 if (ret) 2410 2437 goto err_assert_reset; 2411 2438 ··· 2455 2482 2456 2483 reset_control_bulk_assert(cfg->num_resets, qmp->resets); 2457 2484 2458 - clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks); 2485 + clk_bulk_disable_unprepare(qmp->num_clks, qmp->clks); 2459 2486 2460 2487 regulator_bulk_disable(cfg->num_vregs, qmp->vregs); 2461 2488 ··· 2734 2761 static int __maybe_unused qmp_combo_runtime_suspend(struct device *dev) 2735 2762 { 2736 2763 struct qmp_combo *qmp = dev_get_drvdata(dev); 2737 - const struct qmp_phy_cfg *cfg = qmp->cfg; 2738 2764 2739 2765 dev_vdbg(dev, "Suspending QMP phy, mode:%d\n", qmp->mode); 2740 2766 ··· 2745 2773 qmp_combo_enable_autonomous_mode(qmp); 2746 2774 2747 2775 clk_disable_unprepare(qmp->pipe_clk); 2748 - clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks); 2776 + clk_bulk_disable_unprepare(qmp->num_clks, qmp->clks); 2749 2777 2750 2778 return 0; 2751 2779 } ··· 2753 2781 static int __maybe_unused qmp_combo_runtime_resume(struct device *dev) 2754 2782 { 2755 2783 struct qmp_combo *qmp = dev_get_drvdata(dev); 2756 - const struct qmp_phy_cfg *cfg = qmp->cfg; 2757 2784 int ret = 0; 2758 2785 2759 2786 dev_vdbg(dev, "Resuming QMP phy, mode:%d\n", qmp->mode); ··· 2762 2791 return 0; 2763 2792 } 2764 2793 2765 - ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks); 2794 + ret = clk_bulk_prepare_enable(qmp->num_clks, qmp->clks); 2766 2795 if (ret) 2767 2796 return ret; 2768 2797 2769 2798 ret = clk_prepare_enable(qmp->pipe_clk); 2770 2799 if (ret) { 2771 2800 dev_err(dev, "pipe_clk enable failed, err=%d\n", ret); 2772 - clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks); 2801 + clk_bulk_disable_unprepare(qmp->num_clks, qmp->clks); 2773 2802 return ret; 2774 2803 } 2775 2804 ··· 2840 2869 2841 2870 static int qmp_combo_clk_init(struct qmp_combo *qmp) 2842 2871 { 2843 - const struct qmp_phy_cfg *cfg = qmp->cfg; 2844 2872 struct device *dev = qmp->dev; 2845 - int num = cfg->num_clks; 2873 + int num = ARRAY_SIZE(qmp_combo_phy_clk_l); 2846 2874 int i; 2847 2875 2848 2876 qmp->clks = devm_kcalloc(dev, num, sizeof(*qmp->clks), GFP_KERNEL); ··· 2849 2879 return -ENOMEM; 2850 2880 2851 2881 for (i = 0; i < num; i++) 2852 - qmp->clks[i].id = cfg->clk_list[i]; 2882 + qmp->clks[i].id = qmp_combo_phy_clk_l[i]; 2853 2883 2854 - return devm_clk_bulk_get(dev, num, qmp->clks); 2884 + qmp->num_clks = num; 2885 + 2886 + return devm_clk_bulk_get_optional(dev, num, qmp->clks); 2855 2887 } 2856 2888 2857 2889 static void phy_clk_release_provider(void *res) ··· 3058 3086 ret = devm_clk_hw_register(qmp->dev, &qmp->dp_pixel_hw); 3059 3087 if (ret) 3060 3088 return ret; 3089 + 3090 + ret = devm_clk_bulk_get_all(qmp->dev, &qmp->clks); 3091 + if (ret < 0) 3092 + return ret; 3093 + 3094 + qmp->num_clks = ret; 3061 3095 3062 3096 return 0; 3063 3097 } ··· 3334 3356 const struct qmp_combo_offsets *offs = cfg->offsets; 3335 3357 struct device *dev = qmp->dev; 3336 3358 void __iomem *base; 3359 + int ret; 3337 3360 3338 3361 if (!offs) 3339 3362 return -EINVAL; ··· 3363 3384 qmp->dp_tx2 = base + offs->txb; 3364 3385 } 3365 3386 qmp->dp_dp_phy = base + offs->dp_dp_phy; 3387 + 3388 + ret = qmp_combo_clk_init(qmp); 3389 + if (ret) 3390 + return ret; 3366 3391 3367 3392 qmp->pipe_clk = devm_clk_get(dev, "usb3_pipe"); 3368 3393 if (IS_ERR(qmp->pipe_clk)) { ··· 3415 3432 return -EINVAL; 3416 3433 3417 3434 mutex_init(&qmp->phy_mutex); 3418 - 3419 - ret = qmp_combo_clk_init(qmp); 3420 - if (ret) 3421 - return ret; 3422 3435 3423 3436 ret = qmp_combo_reset_init(qmp); 3424 3437 if (ret)