Merge tag 'staging-5.12-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull staging and IIO driver fixes from Greg KH:
"Some small staging and IIO driver fixes:

- MAINTAINERS changes for the move of the staging mailing list

- comedi driver fixes to get request_irq() to work correctly

- counter driver fixes for reported issues with iio devices

- tiny iio driver fixes for reported issues.

All of these have been in linux-next with no reported problems"

* tag 'staging-5.12-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging:
staging: vt665x: fix alignment constraints
staging: comedi: cb_pcidas64: fix request_irq() warn
staging: comedi: cb_pcidas: fix request_irq() warn
MAINTAINERS: move the staging subsystem to lists.linux.dev
MAINTAINERS: move some real subsystems off of the staging mailing list
iio: gyro: mpu3050: Fix error handling in mpu3050_trigger_handler
iio: hid-sensor-temperature: Fix issues of timestamp channel
iio: hid-sensor-humidity: Fix alignment issue of timestamp channel
counter: stm32-timer-cnt: fix ceiling miss-alignment with reload register
counter: stm32-timer-cnt: fix ceiling write max value
counter: stm32-timer-cnt: Report count function when SLAVE_MODE_DISABLED
iio: adc: ab8500-gpadc: Fix off by 10 to 3
iio:adc:stm32-adc: Add HAS_IOMEM dependency
iio: adis16400: Fix an error code in adis16400_initial_setup()
iio: adc: adi-axi-adc: add proper Kconfig dependencies
iio: adc: ad7949: fix wrong ADC result due to incorrect bit mask
iio: hid-sensor-prox: Fix scale not correct issue
iio:adc:qcom-spmi-vadc: add default scale to LR_MUX2_BAT_ID channel

+3 -4
MAINTAINERS
··· 1181 1181 M: Christian Brauner <christian@brauner.io> 1182 1182 M: Hridya Valsaraju <hridya@google.com> 1183 1183 M: Suren Baghdasaryan <surenb@google.com> 1184 - L: devel@driverdev.osuosl.org 1184 + L: linux-kernel@vger.kernel.org 1185 1185 S: Supported 1186 1186 T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git 1187 1187 F: drivers/android/ ··· 8116 8116 8117 8117 HISILICON STAGING DRIVERS FOR HIKEY 960/970 8118 8118 M: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> 8119 - L: devel@driverdev.osuosl.org 8120 8119 S: Maintained 8121 8120 F: drivers/staging/hikey9xx/ 8122 8121 ··· 17039 17040 17040 17041 STAGING SUBSYSTEM 17041 17042 M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 17042 - L: devel@driverdev.osuosl.org 17043 + L: linux-staging@lists.linux.dev 17043 17044 S: Supported 17044 17045 T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git 17045 17046 F: drivers/staging/ ··· 19134 19135 M: Martyn Welch <martyn@welchs.me.uk> 19135 19136 M: Manohar Vanga <manohar.vanga@gmail.com> 19136 19137 M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 19137 - L: devel@driverdev.osuosl.org 19138 + L: linux-kernel@vger.kernel.org 19138 19139 S: Maintained 19139 19140 T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git 19140 19141 F: Documentation/driver-api/vme.rst
+33 -22
drivers/counter/stm32-timer-cnt.c
··· 31 31 struct counter_device counter; 32 32 struct regmap *regmap; 33 33 struct clk *clk; 34 - u32 ceiling; 34 + u32 max_arr; 35 35 bool enabled; 36 36 struct stm32_timer_regs bak; 37 37 }; ··· 44 44 * @STM32_COUNT_ENCODER_MODE_3: counts on both TI1FP1 and TI2FP2 edges 45 45 */ 46 46 enum stm32_count_function { 47 - STM32_COUNT_SLAVE_MODE_DISABLED = -1, 47 + STM32_COUNT_SLAVE_MODE_DISABLED, 48 48 STM32_COUNT_ENCODER_MODE_1, 49 49 STM32_COUNT_ENCODER_MODE_2, 50 50 STM32_COUNT_ENCODER_MODE_3, 51 51 }; 52 52 53 53 static enum counter_count_function stm32_count_functions[] = { 54 + [STM32_COUNT_SLAVE_MODE_DISABLED] = COUNTER_COUNT_FUNCTION_INCREASE, 54 55 [STM32_COUNT_ENCODER_MODE_1] = COUNTER_COUNT_FUNCTION_QUADRATURE_X2_A, 55 56 [STM32_COUNT_ENCODER_MODE_2] = COUNTER_COUNT_FUNCTION_QUADRATURE_X2_B, 56 57 [STM32_COUNT_ENCODER_MODE_3] = COUNTER_COUNT_FUNCTION_QUADRATURE_X4, ··· 74 73 const unsigned long val) 75 74 { 76 75 struct stm32_timer_cnt *const priv = counter->priv; 76 + u32 ceiling; 77 77 78 - if (val > priv->ceiling) 78 + regmap_read(priv->regmap, TIM_ARR, &ceiling); 79 + if (val > ceiling) 79 80 return -EINVAL; 80 81 81 82 return regmap_write(priv->regmap, TIM_CNT, val); ··· 93 90 regmap_read(priv->regmap, TIM_SMCR, &smcr); 94 91 95 92 switch (smcr & TIM_SMCR_SMS) { 93 + case 0: 94 + *function = STM32_COUNT_SLAVE_MODE_DISABLED; 95 + return 0; 96 96 case 1: 97 97 *function = STM32_COUNT_ENCODER_MODE_1; 98 98 return 0; ··· 105 99 case 3: 106 100 *function = STM32_COUNT_ENCODER_MODE_3; 107 101 return 0; 102 + default: 103 + return -EINVAL; 108 104 } 109 - 110 - return -EINVAL; 111 105 } 112 106 113 107 static int stm32_count_function_set(struct counter_device *counter, ··· 118 112 u32 cr1, sms; 119 113 120 114 switch (function) { 115 + case STM32_COUNT_SLAVE_MODE_DISABLED: 116 + sms = 0; 117 + break; 121 118 case STM32_COUNT_ENCODER_MODE_1: 122 119 sms = 1; 123 120 break; ··· 131 122 sms = 3; 132 123 break; 133 124 default: 134 - sms = 0; 135 - break; 125 + return -EINVAL; 136 126 } 137 127 138 128 /* Store enable status */ 139 129 regmap_read(priv->regmap, TIM_CR1, &cr1); 140 130 141 131 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0); 142 - 143 - /* TIMx_ARR register shouldn't be buffered (ARPE=0) */ 144 - regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0); 145 - regmap_write(priv->regmap, TIM_ARR, priv->ceiling); 146 132 147 133 regmap_update_bits(priv->regmap, TIM_SMCR, TIM_SMCR_SMS, sms); 148 134 ··· 189 185 if (ret) 190 186 return ret; 191 187 188 + if (ceiling > priv->max_arr) 189 + return -ERANGE; 190 + 192 191 /* TIMx_ARR register shouldn't be buffered (ARPE=0) */ 193 192 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0); 194 193 regmap_write(priv->regmap, TIM_ARR, ceiling); 195 194 196 - priv->ceiling = ceiling; 197 195 return len; 198 196 } 199 197 ··· 280 274 size_t function; 281 275 int err; 282 276 283 - /* Default action mode (e.g. STM32_COUNT_SLAVE_MODE_DISABLED) */ 284 - *action = STM32_SYNAPSE_ACTION_NONE; 285 - 286 277 err = stm32_count_function_get(counter, count, &function); 287 278 if (err) 288 - return 0; 279 + return err; 289 280 290 281 switch (function) { 282 + case STM32_COUNT_SLAVE_MODE_DISABLED: 283 + /* counts on internal clock when CEN=1 */ 284 + *action = STM32_SYNAPSE_ACTION_NONE; 285 + return 0; 291 286 case STM32_COUNT_ENCODER_MODE_1: 292 287 /* counts up/down on TI1FP1 edge depending on TI2FP2 level */ 293 288 if (synapse->signal->id == count->synapses[0].signal->id) 294 289 *action = STM32_SYNAPSE_ACTION_BOTH_EDGES; 295 - break; 290 + else 291 + *action = STM32_SYNAPSE_ACTION_NONE; 292 + return 0; 296 293 case STM32_COUNT_ENCODER_MODE_2: 297 294 /* counts up/down on TI2FP2 edge depending on TI1FP1 level */ 298 295 if (synapse->signal->id == count->synapses[1].signal->id) 299 296 *action = STM32_SYNAPSE_ACTION_BOTH_EDGES; 300 - break; 297 + else 298 + *action = STM32_SYNAPSE_ACTION_NONE; 299 + return 0; 301 300 case STM32_COUNT_ENCODER_MODE_3: 302 301 /* counts up/down on both TI1FP1 and TI2FP2 edges */ 303 302 *action = STM32_SYNAPSE_ACTION_BOTH_EDGES; 304 - break; 303 + return 0; 304 + default: 305 + return -EINVAL; 305 306 } 306 - 307 - return 0; 308 307 } 309 308 310 309 static const struct counter_ops stm32_timer_cnt_ops = { ··· 370 359 371 360 priv->regmap = ddata->regmap; 372 361 priv->clk = ddata->clk; 373 - priv->ceiling = ddata->max_arr; 362 + priv->max_arr = ddata->max_arr; 374 363 375 364 priv->counter.name = dev_name(dev); 376 365 priv->counter.parent = dev;
+3
drivers/iio/adc/Kconfig
··· 266 266 select IIO_BUFFER 267 267 select IIO_BUFFER_HW_CONSUMER 268 268 select IIO_BUFFER_DMAENGINE 269 + depends on HAS_IOMEM 270 + depends on OF 269 271 help 270 272 Say yes here to build support for Analog Devices Generic 271 273 AXI ADC IP core. The IP core is used for interfacing with ··· 925 923 depends on ARCH_STM32 || COMPILE_TEST 926 924 depends on OF 927 925 depends on REGULATOR 926 + depends on HAS_IOMEM 928 927 select IIO_BUFFER 929 928 select MFD_STM32_TIMERS 930 929 select IIO_STM32_TIMER_TRIGGER
+1 -1
drivers/iio/adc/ab8500-gpadc.c
··· 918 918 return processed; 919 919 920 920 /* Return millivolt or milliamps or millicentigrades */ 921 - *val = processed * 1000; 921 + *val = processed; 922 922 return IIO_VAL_INT; 923 923 } 924 924
+1 -1
drivers/iio/adc/ad7949.c
··· 91 91 int ret; 92 92 int i; 93 93 int bits_per_word = ad7949_adc->resolution; 94 - int mask = GENMASK(ad7949_adc->resolution, 0); 94 + int mask = GENMASK(ad7949_adc->resolution - 1, 0); 95 95 struct spi_message msg; 96 96 struct spi_transfer tx[] = { 97 97 {
+1 -1
drivers/iio/adc/qcom-spmi-vadc.c
··· 597 597 VADC_CHAN_NO_SCALE(P_MUX16_1_3, 1) 598 598 599 599 VADC_CHAN_NO_SCALE(LR_MUX1_BAT_THERM, 0) 600 - VADC_CHAN_NO_SCALE(LR_MUX2_BAT_ID, 0) 600 + VADC_CHAN_VOLT(LR_MUX2_BAT_ID, 0, SCALE_DEFAULT) 601 601 VADC_CHAN_NO_SCALE(LR_MUX3_XO_THERM, 0) 602 602 VADC_CHAN_NO_SCALE(LR_MUX4_AMUX_THM1, 0) 603 603 VADC_CHAN_NO_SCALE(LR_MUX5_AMUX_THM2, 0)
+2
drivers/iio/gyro/mpu3050-core.c
··· 551 551 MPU3050_FIFO_R, 552 552 &fifo_values[offset], 553 553 toread); 554 + if (ret) 555 + goto out_trigger_unlock; 554 556 555 557 dev_dbg(mpu3050->dev, 556 558 "%04x %04x %04x %04x %04x\n",
+7 -5
drivers/iio/humidity/hid-sensor-humidity.c
··· 15 15 struct hid_humidity_state { 16 16 struct hid_sensor_common common_attributes; 17 17 struct hid_sensor_hub_attribute_info humidity_attr; 18 - s32 humidity_data; 18 + struct { 19 + s32 humidity_data; 20 + u64 timestamp __aligned(8); 21 + } scan; 19 22 int scale_pre_decml; 20 23 int scale_post_decml; 21 24 int scale_precision; ··· 128 125 struct hid_humidity_state *humid_st = iio_priv(indio_dev); 129 126 130 127 if (atomic_read(&humid_st->common_attributes.data_ready)) 131 - iio_push_to_buffers_with_timestamp(indio_dev, 132 - &humid_st->humidity_data, 133 - iio_get_time_ns(indio_dev)); 128 + iio_push_to_buffers_with_timestamp(indio_dev, &humid_st->scan, 129 + iio_get_time_ns(indio_dev)); 134 130 135 131 return 0; 136 132 } ··· 144 142 145 143 switch (usage_id) { 146 144 case HID_USAGE_SENSOR_ATMOSPHERIC_HUMIDITY: 147 - humid_st->humidity_data = *(s32 *)raw_data; 145 + humid_st->scan.humidity_data = *(s32 *)raw_data; 148 146 149 147 return 0; 150 148 default:
+1 -2
drivers/iio/imu/adis16400.c
··· 462 462 if (ret) 463 463 goto err_ret; 464 464 465 - ret = sscanf(indio_dev->name, "adis%u\n", &device_id); 466 - if (ret != 1) { 465 + if (sscanf(indio_dev->name, "adis%u\n", &device_id) != 1) { 467 466 ret = -EINVAL; 468 467 goto err_ret; 469 468 }
+11 -2
drivers/iio/light/hid-sensor-prox.c
··· 23 23 struct hid_sensor_common common_attributes; 24 24 struct hid_sensor_hub_attribute_info prox_attr; 25 25 u32 human_presence; 26 + int scale_pre_decml; 27 + int scale_post_decml; 28 + int scale_precision; 26 29 }; 27 30 28 31 /* Channel definitions */ ··· 96 93 ret_type = IIO_VAL_INT; 97 94 break; 98 95 case IIO_CHAN_INFO_SCALE: 99 - *val = prox_state->prox_attr.units; 100 - ret_type = IIO_VAL_INT; 96 + *val = prox_state->scale_pre_decml; 97 + *val2 = prox_state->scale_post_decml; 98 + ret_type = prox_state->scale_precision; 101 99 break; 102 100 case IIO_CHAN_INFO_OFFSET: 103 101 *val = hid_sensor_convert_exponent( ··· 237 233 HID_USAGE_SENSOR_DATA_MOD_CHANGE_SENSITIVITY_ABS | 238 234 HID_USAGE_SENSOR_HUMAN_PRESENCE, 239 235 &st->common_attributes.sensitivity); 236 + 237 + st->scale_precision = hid_sensor_format_scale( 238 + hsdev->usage, 239 + &st->prox_attr, 240 + &st->scale_pre_decml, &st->scale_post_decml); 240 241 241 242 return ret; 242 243 }
+8 -6
drivers/iio/temperature/hid-sensor-temperature.c
··· 15 15 struct temperature_state { 16 16 struct hid_sensor_common common_attributes; 17 17 struct hid_sensor_hub_attribute_info temperature_attr; 18 - s32 temperature_data; 18 + struct { 19 + s32 temperature_data; 20 + u64 timestamp __aligned(8); 21 + } scan; 19 22 int scale_pre_decml; 20 23 int scale_post_decml; 21 24 int scale_precision; ··· 35 32 BIT(IIO_CHAN_INFO_SAMP_FREQ) | 36 33 BIT(IIO_CHAN_INFO_HYSTERESIS), 37 34 }, 38 - IIO_CHAN_SOFT_TIMESTAMP(3), 35 + IIO_CHAN_SOFT_TIMESTAMP(1), 39 36 }; 40 37 41 38 /* Adjust channel real bits based on report descriptor */ ··· 126 123 struct temperature_state *temp_st = iio_priv(indio_dev); 127 124 128 125 if (atomic_read(&temp_st->common_attributes.data_ready)) 129 - iio_push_to_buffers_with_timestamp(indio_dev, 130 - &temp_st->temperature_data, 131 - iio_get_time_ns(indio_dev)); 126 + iio_push_to_buffers_with_timestamp(indio_dev, &temp_st->scan, 127 + iio_get_time_ns(indio_dev)); 132 128 133 129 return 0; 134 130 } ··· 142 140 143 141 switch (usage_id) { 144 142 case HID_USAGE_SENSOR_DATA_ENVIRONMENTAL_TEMPERATURE: 145 - temp_st->temperature_data = *(s32 *)raw_data; 143 + temp_st->scan.temperature_data = *(s32 *)raw_data; 146 144 return 0; 147 145 default: 148 146 return -EINVAL;
+1 -1
drivers/staging/comedi/drivers/cb_pcidas.c
··· 1281 1281 devpriv->amcc + AMCC_OP_REG_INTCSR); 1282 1282 1283 1283 ret = request_irq(pcidev->irq, cb_pcidas_interrupt, IRQF_SHARED, 1284 - dev->board_name, dev); 1284 + "cb_pcidas", dev); 1285 1285 if (ret) { 1286 1286 dev_dbg(dev->class_dev, "unable to allocate irq %d\n", 1287 1287 pcidev->irq);
+1 -1
drivers/staging/comedi/drivers/cb_pcidas64.c
··· 4035 4035 init_stc_registers(dev); 4036 4036 4037 4037 retval = request_irq(pcidev->irq, handle_interrupt, IRQF_SHARED, 4038 - dev->board_name, dev); 4038 + "cb_pcidas64", dev); 4039 4039 if (retval) { 4040 4040 dev_dbg(dev->class_dev, "unable to allocate irq %u\n", 4041 4041 pcidev->irq);
+2 -2
drivers/staging/vt6655/rxtx.h
··· 150 150 u16 reserved; 151 151 struct ieee80211_cts data; 152 152 u16 reserved2; 153 - } __packed; 153 + } __packed __aligned(2); 154 154 155 155 struct vnt_cts_fb { 156 156 struct vnt_phy_field b; ··· 160 160 __le16 cts_duration_ba_f1; 161 161 struct ieee80211_cts data; 162 162 u16 reserved2; 163 - } __packed; 163 + } __packed __aligned(2); 164 164 165 165 struct vnt_tx_fifo_head { 166 166 u8 tx_key[WLAN_KEY_LEN_CCMP];