[POWERPC] Add PMC type to cputable · tjh.dev/kernel@1bd2e5a

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

[POWERPC] Add PMC type to cputable

Add cputable entries for which type of PMC implementation the processor
has.

I've only filled in the current 64-bit processors, the unfilled default
value will have same behaviour as before so it can be done over time
as needed.

Also tidy up the dummy_perf implementation a bit, aggregating it into
one function with ifdefs instead of several.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>

authored by

Olof Johansson and committed by

Paul Mackerras 19 years ago 1bd2e5ae c69b767a

+35 -28

3 changed files

expand all

arch

powerpc

kernel

cputable.c

pmc.c

include

asm-powerpc

cputable.h

+17

arch/powerpc/kernel/cputable.c

··· 86 86 .icache_bsize = 128, 87 87 .dcache_bsize = 128, 88 88 .num_pmcs = 8, 89 + .pmc_type = PPC_PMC_IBM, 89 90 .oprofile_cpu_type = "ppc64/power3", 90 91 .oprofile_type = PPC_OPROFILE_RS64, 91 92 .platform = "power3", ··· 100 99 .icache_bsize = 128, 101 100 .dcache_bsize = 128, 102 101 .num_pmcs = 8, 102 + .pmc_type = PPC_PMC_IBM, 103 103 .oprofile_cpu_type = "ppc64/power3", 104 104 .oprofile_type = PPC_OPROFILE_RS64, 105 105 .platform = "power3", ··· 114 112 .icache_bsize = 128, 115 113 .dcache_bsize = 128, 116 114 .num_pmcs = 8, 115 + .pmc_type = PPC_PMC_IBM, 117 116 .oprofile_cpu_type = "ppc64/rs64", 118 117 .oprofile_type = PPC_OPROFILE_RS64, 119 118 .platform = "rs64", ··· 128 125 .icache_bsize = 128, 129 126 .dcache_bsize = 128, 130 127 .num_pmcs = 8, 128 + .pmc_type = PPC_PMC_IBM, 131 129 .oprofile_cpu_type = "ppc64/rs64", 132 130 .oprofile_type = PPC_OPROFILE_RS64, 133 131 .platform = "rs64", ··· 142 138 .icache_bsize = 128, 143 139 .dcache_bsize = 128, 144 140 .num_pmcs = 8, 141 + .pmc_type = PPC_PMC_IBM, 145 142 .oprofile_cpu_type = "ppc64/rs64", 146 143 .oprofile_type = PPC_OPROFILE_RS64, 147 144 .platform = "rs64", ··· 156 151 .icache_bsize = 128, 157 152 .dcache_bsize = 128, 158 153 .num_pmcs = 8, 154 + .pmc_type = PPC_PMC_IBM, 159 155 .oprofile_cpu_type = "ppc64/rs64", 160 156 .oprofile_type = PPC_OPROFILE_RS64, 161 157 .platform = "rs64", ··· 170 164 .icache_bsize = 128, 171 165 .dcache_bsize = 128, 172 166 .num_pmcs = 8, 167 + .pmc_type = PPC_PMC_IBM, 173 168 .oprofile_cpu_type = "ppc64/power4", 174 169 .oprofile_type = PPC_OPROFILE_POWER4, 175 170 .platform = "power4", ··· 184 177 .icache_bsize = 128, 185 178 .dcache_bsize = 128, 186 179 .num_pmcs = 8, 180 + .pmc_type = PPC_PMC_IBM, 187 181 .oprofile_cpu_type = "ppc64/power4", 188 182 .oprofile_type = PPC_OPROFILE_POWER4, 189 183 .platform = "power4", ··· 199 191 .icache_bsize = 128, 200 192 .dcache_bsize = 128, 201 193 .num_pmcs = 8, 194 + .pmc_type = PPC_PMC_IBM, 202 195 .cpu_setup = __setup_cpu_ppc970, 203 196 .cpu_restore = __restore_cpu_ppc970, 204 197 .oprofile_cpu_type = "ppc64/970", ··· 216 207 .icache_bsize = 128, 217 208 .dcache_bsize = 128, 218 209 .num_pmcs = 8, 210 + .pmc_type = PPC_PMC_IBM, 219 211 .cpu_setup = __setup_cpu_ppc970, 220 212 .cpu_restore = __restore_cpu_ppc970, 221 213 .oprofile_cpu_type = "ppc64/970", ··· 249 239 .icache_bsize = 128, 250 240 .dcache_bsize = 128, 251 241 .num_pmcs = 8, 242 + .pmc_type = PPC_PMC_IBM, 252 243 .cpu_setup = __setup_cpu_ppc970, 253 244 .oprofile_cpu_type = "ppc64/970", 254 245 .oprofile_type = PPC_OPROFILE_POWER4, ··· 264 253 .icache_bsize = 128, 265 254 .dcache_bsize = 128, 266 255 .num_pmcs = 6, 256 + .pmc_type = PPC_PMC_IBM, 267 257 .oprofile_cpu_type = "ppc64/power5", 268 258 .oprofile_type = PPC_OPROFILE_POWER4, 269 259 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) ··· 283 271 .icache_bsize = 128, 284 272 .dcache_bsize = 128, 285 273 .num_pmcs = 6, 274 + .pmc_type = PPC_PMC_IBM, 286 275 .oprofile_cpu_type = "ppc64/power5+", 287 276 .oprofile_type = PPC_OPROFILE_POWER4, 288 277 .oprofile_mmcra_sihv = MMCRA_SIHV, ··· 334 321 .icache_bsize = 128, 335 322 .dcache_bsize = 128, 336 323 .num_pmcs = 6, 324 + .pmc_type = PPC_PMC_IBM, 337 325 .oprofile_cpu_type = "ppc64/power6", 338 326 .oprofile_type = PPC_OPROFILE_POWER4, 339 327 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, ··· 354 340 .icache_bsize = 128, 355 341 .dcache_bsize = 128, 356 342 .num_pmcs = 4, 343 + .pmc_type = PPC_PMC_IBM, 357 344 .oprofile_cpu_type = "ppc64/cell-be", 358 345 .oprofile_type = PPC_OPROFILE_CELL, 359 346 .platform = "ppc-cell-be", ··· 368 353 .icache_bsize = 64, 369 354 .dcache_bsize = 64, 370 355 .num_pmcs = 6, 356 + .pmc_type = PPC_PMC_PA6T, 371 357 .platform = "pa6t", 372 358 }, 373 359 { /* default match */ ··· 380 364 .icache_bsize = 128, 381 365 .dcache_bsize = 128, 382 366 .num_pmcs = 6, 367 + .pmc_type = PPC_PMC_IBM, 383 368 .platform = "power4", 384 369 } 385 370 #endif /* CONFIG_PPC64 */

+11 -28

arch/powerpc/kernel/pmc.c

··· 19 19 #include <asm/processor.h> 20 20 #include <asm/pmc.h> 21 21 22 + #ifndef MMCR0_PMA0 23 + #define MMCR0_PMA0 0 24 + #endif 25 + 26 + static void dummy_perf(struct pt_regs *regs) 27 + { 22 28 #if defined(CONFIG_FSL_BOOKE) && !defined(CONFIG_E200) 23 - static void dummy_perf(struct pt_regs *regs) 24 - { 25 - unsigned int pmgc0 = mfpmr(PMRN_PMGC0); 26 - 27 - pmgc0 &= ~PMGC0_PMIE; 28 - mtpmr(PMRN_PMGC0, pmgc0); 29 - } 29 + mtpmr(PMRN_PMGC0, mfpmr(PMRN_PMGC0) & ~PMGC0_PMIE); 30 30 #elif defined(CONFIG_PPC64) || defined(CONFIG_6xx) 31 - 32 - #ifndef MMCR0_PMAO 33 - #define MMCR0_PMAO 0 34 - #endif 35 - 36 - /* Ensure exceptions are disabled */ 37 - static void dummy_perf(struct pt_regs *regs) 38 - { 39 - unsigned int mmcr0 = mfspr(SPRN_MMCR0); 40 - 41 - mmcr0 &= ~(MMCR0_PMXE|MMCR0_PMAO); 42 - mtspr(SPRN_MMCR0, mmcr0); 43 - } 31 + mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~(MMCR0_PMXE|MMCR0_PMA0)); 44 32 #else 45 - /* Ensure exceptions are disabled */ 46 - static void dummy_perf(struct pt_regs *regs) 47 - { 48 - unsigned int mmcr0 = mfspr(SPRN_MMCR0); 49 - 50 - mmcr0 &= ~(MMCR0_PMXE); 51 - mtspr(SPRN_MMCR0, mmcr0); 52 - } 33 + mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_PMXE); 53 34 #endif 35 + } 36 + 54 37 55 38 static DEFINE_SPINLOCK(pmc_owner_lock); 56 39 static void *pmc_owner_caller; /* mostly for debugging */

include/asm-powerpc/cputable.h

··· 50 50 PPC_OPROFILE_CELL = 5, 51 51 }; 52 52 53 + enum powerpc_pmc_type { 54 + PPC_PMC_DEFAULT = 0, 55 + PPC_PMC_IBM = 1, 56 + PPC_PMC_PA6T = 2, 57 + }; 58 + 53 59 struct cpu_spec { 54 60 /* CPU is matched via (PVR & pvr_mask) == pvr_value */ 55 61 unsigned int pvr_mask; ··· 71 65 72 66 /* number of performance monitor counters */ 73 67 unsigned int num_pmcs; 68 + enum powerpc_pmc_type pmc_type; 74 69 75 70 /* this is called to initialize various CPU bits like L1 cache, 76 71 * BHT, SPD, etc... from head.S before branching to identify_machine