Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

[POWERPC] Oprofile cleanup

Clean up the ctr_read/write a bit. It's currently defined in the
include but only used in one C file each. The only exception is the
classic version, so keep that in the include and define in the C file
as appropriate.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>

authored by

Olof Johansson and committed by
Paul Mackerras
c69b767a 4942bd80

+98 -102
+5 -5
arch/powerpc/oprofile/op_model_7450.c
··· 137 137 138 138 for (i = 0; i < NUM_CTRS; ++i) { 139 139 if (ctr[i].enabled) 140 - ctr_write(i, reset_value[i]); 140 + classic_ctr_write(i, reset_value[i]); 141 141 else 142 - ctr_write(i, 0); 142 + classic_ctr_write(i, 0); 143 143 } 144 144 145 145 /* Clear the freeze bit, and enable the interrupt. ··· 179 179 is_kernel = is_kernel_addr(pc); 180 180 181 181 for (i = 0; i < NUM_CTRS; ++i) { 182 - val = ctr_read(i); 182 + val = classic_ctr_read(i); 183 183 if (val < 0) { 184 184 if (oprofile_running && ctr[i].enabled) { 185 185 oprofile_add_ext_sample(pc, regs, i, is_kernel); 186 - ctr_write(i, reset_value[i]); 186 + classic_ctr_write(i, reset_value[i]); 187 187 } else { 188 - ctr_write(i, 0); 188 + classic_ctr_write(i, 0); 189 189 } 190 190 } 191 191 }
+81
arch/powerpc/oprofile/op_model_fsl_booke.c
··· 32 32 static int num_counters; 33 33 static int oprofile_running; 34 34 35 + static inline u32 get_pmlca(int ctr) 36 + { 37 + u32 pmlca; 38 + 39 + switch (ctr) { 40 + case 0: 41 + pmlca = mfpmr(PMRN_PMLCA0); 42 + break; 43 + case 1: 44 + pmlca = mfpmr(PMRN_PMLCA1); 45 + break; 46 + case 2: 47 + pmlca = mfpmr(PMRN_PMLCA2); 48 + break; 49 + case 3: 50 + pmlca = mfpmr(PMRN_PMLCA3); 51 + break; 52 + default: 53 + panic("Bad ctr number\n"); 54 + } 55 + 56 + return pmlca; 57 + } 58 + 59 + static inline void set_pmlca(int ctr, u32 pmlca) 60 + { 61 + switch (ctr) { 62 + case 0: 63 + mtpmr(PMRN_PMLCA0, pmlca); 64 + break; 65 + case 1: 66 + mtpmr(PMRN_PMLCA1, pmlca); 67 + break; 68 + case 2: 69 + mtpmr(PMRN_PMLCA2, pmlca); 70 + break; 71 + case 3: 72 + mtpmr(PMRN_PMLCA3, pmlca); 73 + break; 74 + default: 75 + panic("Bad ctr number\n"); 76 + } 77 + } 78 + 79 + static inline unsigned int ctr_read(unsigned int i) 80 + { 81 + switch(i) { 82 + case 0: 83 + return mfpmr(PMRN_PMC0); 84 + case 1: 85 + return mfpmr(PMRN_PMC1); 86 + case 2: 87 + return mfpmr(PMRN_PMC2); 88 + case 3: 89 + return mfpmr(PMRN_PMC3); 90 + default: 91 + return 0; 92 + } 93 + } 94 + 95 + static inline void ctr_write(unsigned int i, unsigned int val) 96 + { 97 + switch(i) { 98 + case 0: 99 + mtpmr(PMRN_PMC0, val); 100 + break; 101 + case 1: 102 + mtpmr(PMRN_PMC1, val); 103 + break; 104 + case 2: 105 + mtpmr(PMRN_PMC2, val); 106 + break; 107 + case 3: 108 + mtpmr(PMRN_PMC3, val); 109 + break; 110 + default: 111 + break; 112 + } 113 + } 114 + 115 + 35 116 static void init_pmc_stop(int ctr) 36 117 { 37 118 u32 pmlca = (PMLCA_FC | PMLCA_FCS | PMLCA_FCU |
+5 -5
arch/powerpc/oprofile/op_model_power4.c
··· 121 121 122 122 for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) { 123 123 if (ctr[i].enabled) { 124 - ctr_write(i, reset_value[i]); 124 + classic_ctr_write(i, reset_value[i]); 125 125 } else { 126 - ctr_write(i, 0); 126 + classic_ctr_write(i, 0); 127 127 } 128 128 } 129 129 ··· 254 254 mtmsrd(mfmsr() | MSR_PMM); 255 255 256 256 for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) { 257 - val = ctr_read(i); 257 + val = classic_ctr_read(i); 258 258 if (val < 0) { 259 259 if (oprofile_running && ctr[i].enabled) { 260 260 oprofile_add_ext_sample(pc, regs, i, is_kernel); 261 - ctr_write(i, reset_value[i]); 261 + classic_ctr_write(i, reset_value[i]); 262 262 } else { 263 - ctr_write(i, 0); 263 + classic_ctr_write(i, 0); 264 264 } 265 265 } 266 266 }
+5 -5
arch/powerpc/oprofile/op_model_rs64.c
··· 137 137 138 138 for (i = 0; i < num_counters; ++i) { 139 139 if (ctr[i].enabled) { 140 - ctr_write(i, reset_value[i]); 140 + classic_ctr_write(i, reset_value[i]); 141 141 ctrl_write(i, ctr[i].event); 142 142 } else { 143 - ctr_write(i, 0); 143 + classic_ctr_write(i, 0); 144 144 } 145 145 } 146 146 ··· 186 186 mtmsrd(mfmsr() | MSR_PMM); 187 187 188 188 for (i = 0; i < num_counters; ++i) { 189 - val = ctr_read(i); 189 + val = classic_ctr_read(i); 190 190 if (val < 0) { 191 191 if (ctr[i].enabled) { 192 192 oprofile_add_ext_sample(pc, regs, i, is_kernel); 193 - ctr_write(i, reset_value[i]); 193 + classic_ctr_write(i, reset_value[i]); 194 194 } else { 195 - ctr_write(i, 0); 195 + classic_ctr_write(i, 0); 196 196 } 197 197 } 198 198 }
+2 -87
include/asm-powerpc/oprofile_impl.h
··· 58 58 extern struct op_powerpc_model op_model_7450; 59 59 extern struct op_powerpc_model op_model_cell; 60 60 61 - #ifndef CONFIG_FSL_BOOKE 62 - 63 61 /* All the classic PPC parts use these */ 64 - static inline unsigned int ctr_read(unsigned int i) 62 + static inline unsigned int classic_ctr_read(unsigned int i) 65 63 { 66 64 switch(i) { 67 65 case 0: ··· 87 89 } 88 90 } 89 91 90 - static inline void ctr_write(unsigned int i, unsigned int val) 92 + static inline void classic_ctr_write(unsigned int i, unsigned int val) 91 93 { 92 94 switch(i) { 93 95 case 0: ··· 122 124 break; 123 125 } 124 126 } 125 - #else /* CONFIG_FSL_BOOKE */ 126 - static inline u32 get_pmlca(int ctr) 127 - { 128 - u32 pmlca; 129 - 130 - switch (ctr) { 131 - case 0: 132 - pmlca = mfpmr(PMRN_PMLCA0); 133 - break; 134 - case 1: 135 - pmlca = mfpmr(PMRN_PMLCA1); 136 - break; 137 - case 2: 138 - pmlca = mfpmr(PMRN_PMLCA2); 139 - break; 140 - case 3: 141 - pmlca = mfpmr(PMRN_PMLCA3); 142 - break; 143 - default: 144 - panic("Bad ctr number\n"); 145 - } 146 - 147 - return pmlca; 148 - } 149 - 150 - static inline void set_pmlca(int ctr, u32 pmlca) 151 - { 152 - switch (ctr) { 153 - case 0: 154 - mtpmr(PMRN_PMLCA0, pmlca); 155 - break; 156 - case 1: 157 - mtpmr(PMRN_PMLCA1, pmlca); 158 - break; 159 - case 2: 160 - mtpmr(PMRN_PMLCA2, pmlca); 161 - break; 162 - case 3: 163 - mtpmr(PMRN_PMLCA3, pmlca); 164 - break; 165 - default: 166 - panic("Bad ctr number\n"); 167 - } 168 - } 169 - 170 - static inline unsigned int ctr_read(unsigned int i) 171 - { 172 - switch(i) { 173 - case 0: 174 - return mfpmr(PMRN_PMC0); 175 - case 1: 176 - return mfpmr(PMRN_PMC1); 177 - case 2: 178 - return mfpmr(PMRN_PMC2); 179 - case 3: 180 - return mfpmr(PMRN_PMC3); 181 - default: 182 - return 0; 183 - } 184 - } 185 - 186 - static inline void ctr_write(unsigned int i, unsigned int val) 187 - { 188 - switch(i) { 189 - case 0: 190 - mtpmr(PMRN_PMC0, val); 191 - break; 192 - case 1: 193 - mtpmr(PMRN_PMC1, val); 194 - break; 195 - case 2: 196 - mtpmr(PMRN_PMC2, val); 197 - break; 198 - case 3: 199 - mtpmr(PMRN_PMC3, val); 200 - break; 201 - default: 202 - break; 203 - } 204 - } 205 - 206 - 207 - #endif /* CONFIG_FSL_BOOKE */ 208 127 209 128 210 129 extern void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth);