···106#define CS4270_MUTE_DAC_A 0x01107#define CS4270_MUTE_DAC_B 0x02108000000000000000109static const char *supply_names[] = {110 "va", "vd", "vlc"111};···192193/* The number of MCLK/LRCK ratios supported by the CS4270 */194#define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)00000000000000195196/**197 * cs4270_set_dai_sysclk - determine the CS4270 samples rates.···289 }290291 return ret;292-}293-294-/**295- * cs4270_fill_cache - pre-fill the CS4270 register cache.296- * @codec: the codec for this CS4270297- *298- * This function fills in the CS4270 register cache by reading the register299- * values from the hardware.300- *301- * This CS4270 registers are cached to avoid excessive I2C I/O operations.302- * After the initial read to pre-fill the cache, the CS4270 never updates303- * the register values, so we won't have a cache coherency problem.304- *305- * We use the auto-increment feature of the CS4270 to read all registers in306- * one shot.307- */308-static int cs4270_fill_cache(struct snd_soc_codec *codec)309-{310- u8 *cache = codec->reg_cache;311- struct i2c_client *i2c_client = codec->control_data;312- s32 length;313-314- length = i2c_smbus_read_i2c_block_data(i2c_client,315- CS4270_FIRSTREG | CS4270_I2C_INCR, CS4270_NUMREGS, cache);316-317- if (length != CS4270_NUMREGS) {318- dev_err(codec->dev, "i2c read failure, addr=0x%x\n",319- i2c_client->addr);320- return -EIO;321- }322-323- return 0;324-}325-326-/**327- * cs4270_read_reg_cache - read from the CS4270 register cache.328- * @codec: the codec for this CS4270329- * @reg: the register to read330- *331- * This function returns the value for a given register. It reads only from332- * the register cache, not the hardware itself.333- *334- * This CS4270 registers are cached to avoid excessive I2C I/O operations.335- * After the initial read to pre-fill the cache, the CS4270 never updates336- * the register values, so we won't have a cache coherency problem.337- */338-static unsigned int cs4270_read_reg_cache(struct snd_soc_codec *codec,339- unsigned int reg)340-{341- u8 *cache = codec->reg_cache;342-343- if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))344- return -EIO;345-346- return cache[reg - CS4270_FIRSTREG];347-}348-349-/**350- * cs4270_i2c_write - write to a CS4270 register via the I2C bus.351- * @codec: the codec for this CS4270352- * @reg: the register to write353- * @value: the value to write to the register354- *355- * This function writes the given value to the given CS4270 register, and356- * also updates the register cache.357- *358- * Note that we don't use the hw_write function pointer of snd_soc_codec.359- * That's because it's too clunky: the hw_write_t prototype does not match360- * i2c_smbus_write_byte_data(), and it's just another layer of overhead.361- */362-static int cs4270_i2c_write(struct snd_soc_codec *codec, unsigned int reg,363- unsigned int value)364-{365- u8 *cache = codec->reg_cache;366-367- if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))368- return -EIO;369-370- /* Only perform an I2C operation if the new value is different */371- if (cache[reg - CS4270_FIRSTREG] != value) {372- struct i2c_client *client = codec->control_data;373- if (i2c_smbus_write_byte_data(client, reg, value)) {374- dev_err(codec->dev, "i2c write failed\n");375- return -EIO;376- }377-378- /* We've written to the hardware, so update the cache */379- cache[reg - CS4270_FIRSTREG] = value;380- }381-382- return 0;383}384385/**···488static int cs4270_probe(struct snd_soc_codec *codec)489{490 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);491- int i, ret, reg;492493 codec->control_data = cs4270->control_data;494495- /* The I2C interface is set up, so pre-fill our register cache */496-497- ret = cs4270_fill_cache(codec);0498 if (ret < 0) {499- dev_err(codec->dev, "failed to fill register cache\n");500 return ret;501 }502···506 * this feature disabled by default. An application (e.g. alsactl) can507 * re-enabled it by using the controls.508 */509-510- reg = cs4270_read_reg_cache(codec, CS4270_MUTE);511- reg &= ~CS4270_MUTE_AUTO;512- ret = cs4270_i2c_write(codec, CS4270_MUTE, reg);513 if (ret < 0) {514 dev_err(codec->dev, "i2c write failed\n");515 return ret;···517 * playback has started. An application (e.g. alsactl) can518 * re-enabled it by using the controls.519 */520-521- reg = cs4270_read_reg_cache(codec, CS4270_TRANS);522- reg &= ~(CS4270_TRANS_SOFT | CS4270_TRANS_ZERO);523- ret = cs4270_i2c_write(codec, CS4270_TRANS, reg);524 if (ret < 0) {525 dev_err(codec->dev, "i2c write failed\n");526 return ret;···641 * Assign this variable to the codec_dev field of the machine driver's642 * snd_soc_device structure.643 */644-static struct snd_soc_codec_driver soc_codec_device_cs4270 = {645- .probe = cs4270_probe,646- .remove = cs4270_remove,647- .suspend = cs4270_soc_suspend,648- .resume = cs4270_soc_resume,649- .read = cs4270_read_reg_cache,650- .write = cs4270_i2c_write,651- .reg_cache_size = CS4270_NUMREGS,652- .reg_word_size = sizeof(u8),0653};654655/**
···106#define CS4270_MUTE_DAC_A 0x01107#define CS4270_MUTE_DAC_B 0x02108109+/* Power-on default values for the registers110+ *111+ * This array contains the power-on default values of the registers, with the112+ * exception of the "CHIPID" register (01h). The lower four bits of that113+ * register contain the hardware revision, so it is treated as volatile.114+ *115+ * Also note that on the CS4270, the first readable register is 1, but ASoC116+ * assumes the first register is 0. Therfore, the array must have an entry for117+ * register 0, but we use cs4270_reg_is_readable() to tell ASoC that it can't118+ * be read.119+ */120+static const u8 cs4270_default_reg_cache[CS4270_LASTREG + 1] = {121+ 0x00, 0x00, 0x00, 0x30, 0x00, 0x60, 0x20, 0x00, 0x00122+};123+124static const char *supply_names[] = {125 "va", "vd", "vlc"126};···177178/* The number of MCLK/LRCK ratios supported by the CS4270 */179#define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)180+181+static int cs4270_reg_is_readable(unsigned int reg)182+{183+ return (reg >= CS4270_FIRSTREG) && (reg <= CS4270_LASTREG);184+}185+186+static int cs4270_reg_is_volatile(unsigned int reg)187+{188+ /* Unreadable registers are considered volatile */189+ if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))190+ return 1;191+192+ return reg == CS4270_CHIPID;193+}194195/**196 * cs4270_set_dai_sysclk - determine the CS4270 samples rates.···260 }261262 return ret;0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000263}264265/**···550static int cs4270_probe(struct snd_soc_codec *codec)551{552 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);553+ int i, ret;554555 codec->control_data = cs4270->control_data;556557+ /* Tell ASoC what kind of I/O to use to read the registers. ASoC will558+ * then do the I2C transactions itself.559+ */560+ ret = snd_soc_codec_set_cache_io(codec, 8, 8, cs4270->control_type);561 if (ret < 0) {562+ dev_err(codec->dev, "failed to set cache I/O (ret=%i)\n", ret);563 return ret;564 }565···567 * this feature disabled by default. An application (e.g. alsactl) can568 * re-enabled it by using the controls.569 */570+ ret = snd_soc_update_bits(codec, CS4270_MUTE, CS4270_MUTE_AUTO, 0);000571 if (ret < 0) {572 dev_err(codec->dev, "i2c write failed\n");573 return ret;···581 * playback has started. An application (e.g. alsactl) can582 * re-enabled it by using the controls.583 */584+ ret = snd_soc_update_bits(codec, CS4270_TRANS,585+ CS4270_TRANS_SOFT | CS4270_TRANS_ZERO, 0);00586 if (ret < 0) {587 dev_err(codec->dev, "i2c write failed\n");588 return ret;···707 * Assign this variable to the codec_dev field of the machine driver's708 * snd_soc_device structure.709 */710+static const struct snd_soc_codec_driver soc_codec_device_cs4270 = {711+ .probe = cs4270_probe,712+ .remove = cs4270_remove,713+ .suspend = cs4270_soc_suspend,714+ .resume = cs4270_soc_resume,715+ .volatile_register = cs4270_reg_is_volatile,716+ .readable_register = cs4270_reg_is_readable,717+ .reg_cache_size = CS4270_LASTREG + 1,718+ .reg_word_size = sizeof(u8),719+ .reg_cache_default = cs4270_default_reg_cache,720};721722/**
···8 * published by the Free Software Foundation.9 */10011#include <linux/device.h>12#include <linux/firmware.h>13#include <linux/module.h>1415-#include <asm/clkdev.h>16#include <asm/clock.h>1718#include <cpu/sh7722.h>
···8 * published by the Free Software Foundation.9 */1011+#include <linux/clkdev.h>12#include <linux/device.h>13#include <linux/firmware.h>14#include <linux/module.h>15016#include <asm/clock.h>1718#include <cpu/sh7722.h>
+1-1
sound/soc/soc-cache.c
···1361 goto err;1362 }1363 lzo_blocks[i]->sync_bmp = sync_bmp;1364- lzo_blocks[i]->sync_bmp_nbits = reg_size;1365 /* alloc the working space for the compressed block */1366 ret = snd_soc_lzo_prepare(lzo_blocks[i]);1367 if (ret < 0)
···1361 goto err;1362 }1363 lzo_blocks[i]->sync_bmp = sync_bmp;1364+ lzo_blocks[i]->sync_bmp_nbits = bmp_size;1365 /* alloc the working space for the compressed block */1366 ret = snd_soc_lzo_prepare(lzo_blocks[i]);1367 if (ret < 0)