tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/i915: Protect CRC reg macro arguments for consistency
It's probably a good idea to start protecting all macro arguments
to avoid any cargo-cult mistakes when people go looking for examples
of how to define these things.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240531115342.2763-8-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
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drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h
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drivers/gpu/drm/i915/display/intel_pipe_crc_regs.h
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#include "intel_display_reg_defs.h"
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#define _PIPE_CRC_CTL_A 0x60050
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#define PIPE_CRC_CTL(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_CTL_A)
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#define PIPE_CRC_CTL(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_CTL_A)
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#define PIPE_CRC_ENABLE REG_BIT(31)
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/* skl+ source selection */
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#define PIPE_CRC_SOURCE_MASK_SKL REG_GENMASK(30, 28)
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#define PIPE_CRC_EXP_RES2_MASK REG_BIT(22, 0) /* pre-ivb */
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#define _PIPE_CRC_RES_RED_A 0x60060
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#define PIPE_CRC_RES_RED(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_RED_A)
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#define PIPE_CRC_RES_RED(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_RES_RED_A)
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#define _PIPE_CRC_RES_GREEN_A 0x60064
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#define PIPE_CRC_RES_GREEN(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_GREEN_A)
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#define PIPE_CRC_RES_GREEN(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_RES_GREEN_A)
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#define _PIPE_CRC_RES_BLUE_A 0x60068
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#define PIPE_CRC_RES_BLUE(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_BLUE_A)
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#define PIPE_CRC_RES_BLUE(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_RES_BLUE_A)
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#define _PIPE_CRC_RES_RES1_A_I915 0x6006c /* i915+ */
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#define PIPE_CRC_RES_RES1_I915(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_RES1_A_I915)
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#define PIPE_CRC_RES_RES1_I915(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_RES_RES1_A_I915)
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#define _PIPE_CRC_RES_RES2_A_G4X 0x60080 /* g4x+ */
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#define PIPE_CRC_RES_RES2_G4X(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_RES2_A_G4X)
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#define PIPE_CRC_RES_RES2_G4X(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_RES_RES2_A_G4X)
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/* ivb */
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#define _PIPE_CRC_EXP_2_A_IVB 0x60054
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/* ivb */
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#define _PIPE_CRC_RES_1_A_IVB 0x60064
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#define _PIPE_CRC_RES_1_B_IVB 0x61064
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#define PIPE_CRC_RES_1_IVB(pipe) _MMIO_PIPE(pipe, _PIPE_CRC_RES_1_A_IVB, _PIPE_CRC_RES_1_B_IVB)
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#define PIPE_CRC_RES_1_IVB(pipe) _MMIO_PIPE((pipe), _PIPE_CRC_RES_1_A_IVB, _PIPE_CRC_RES_1_B_IVB)
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/* ivb */
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#define _PIPE_CRC_RES_2_A_IVB 0x60068
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#define _PIPE_CRC_RES_2_B_IVB 0x61068
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#define PIPE_CRC_RES_2_IVB(pipe) _MMIO_PIPE(pipe, _PIPE_CRC_RES_2_A_IVB, _PIPE_CRC_RES_2_B_IVB)
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#define PIPE_CRC_RES_2_IVB(pipe) _MMIO_PIPE((pipe), _PIPE_CRC_RES_2_A_IVB, _PIPE_CRC_RES_2_B_IVB)
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/* ivb */
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#define _PIPE_CRC_RES_3_A_IVB 0x6006c
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#define _PIPE_CRC_RES_3_B_IVB 0x6106c
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#define PIPE_CRC_RES_3_IVB(pipe) _MMIO_PIPE(pipe, _PIPE_CRC_RES_3_A_IVB, _PIPE_CRC_RES_3_B_IVB)
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#define PIPE_CRC_RES_3_IVB(pipe) _MMIO_PIPE((pipe), _PIPE_CRC_RES_3_A_IVB, _PIPE_CRC_RES_3_B_IVB)
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/* ivb */
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#define _PIPE_CRC_RES_4_A_IVB 0x60070
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#define _PIPE_CRC_RES_4_B_IVB 0x61070
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#define PIPE_CRC_RES_4_IVB(pipe) _MMIO_PIPE(pipe, _PIPE_CRC_RES_4_A_IVB, _PIPE_CRC_RES_4_B_IVB)
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#define PIPE_CRC_RES_4_IVB(pipe) _MMIO_PIPE((pipe), _PIPE_CRC_RES_4_A_IVB, _PIPE_CRC_RES_4_B_IVB)
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/* ivb */
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#define _PIPE_CRC_RES_5_A_IVB 0x60074
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#define _PIPE_CRC_RES_5_B_IVB 0x61074
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#define PIPE_CRC_RES_5_IVB(pipe) _MMIO_PIPE(pipe, _PIPE_CRC_RES_5_A_IVB, _PIPE_CRC_RES_5_B_IVB)
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#define PIPE_CRC_RES_5_IVB(pipe) _MMIO_PIPE((pipe), _PIPE_CRC_RES_5_A_IVB, _PIPE_CRC_RES_5_B_IVB)
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/* hsw+ */
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#define _PIPE_CRC_EXP_A_HSW 0x60054
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#define _PIPE_CRC_EXP_B_HSW 0x61054
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#define PIPE_CRC_EXP_HSW(pipe) _MMIO_PIPE(pipe, _PIPE_CRC_EXP_A_HSW, _PIPE_CRC_EXP_B_HSW)
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#define PIPE_CRC_EXP_HSW(pipe) _MMIO_PIPE((pipe), _PIPE_CRC_EXP_A_HSW, _PIPE_CRC_EXP_B_HSW)
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/* hsw+ */
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#define _PIPE_CRC_RES_A_HSW 0x60064
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#define _PIPE_CRC_RES_B_HSW 0x61064
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#define PIPE_CRC_RES_HSW(pipe) _MMIO_PIPE(pipe, _PIPE_CRC_RES_A_HSW, _PIPE_CRC_RES_B_HSW)
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#define PIPE_CRC_RES_HSW(pipe) _MMIO_PIPE((pipe), _PIPE_CRC_RES_A_HSW, _PIPE_CRC_RES_B_HSW)
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#endif /* __INTEL_PIPE_CRC_REGS_H__ */