tjh.dev / kernel
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ARM: dts: at91: at91sam9g45: switch to new clock bindings

Switch at91sam9g45 boards to the new PMC clock bindings.

Link: https://lore.kernel.org/r/20200117210619.17768-1-alexandre.belloni@bootlin.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Alexandre Belloni 15090390 82a5df83

+40 -302
+38 -300
arch/arm/boot/dts/at91sam9g45.dtsi
··· 103 103 ramc0: ramc@ffffe400 { 104 104 compatible = "atmel,at91sam9g45-ddramc"; 105 105 reg = <0xffffe400 0x200>; 106 - clocks = <&ddrck>; 106 + clocks = <&pmc PMC_TYPE_SYSTEM 2>; 107 107 clock-names = "ddrck"; 108 108 }; 109 109 110 110 ramc1: ramc@ffffe600 { 111 111 compatible = "atmel,at91sam9g45-ddramc"; 112 112 reg = <0xffffe600 0x200>; 113 - clocks = <&ddrck>; 113 + clocks = <&pmc PMC_TYPE_SYSTEM 2>; 114 114 clock-names = "ddrck"; 115 115 }; 116 116 ··· 128 128 compatible = "atmel,at91sam9g45-pmc", "syscon"; 129 129 reg = <0xfffffc00 0x100>; 130 130 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 131 - interrupt-controller; 132 - #address-cells = <1>; 133 - #size-cells = <0>; 134 - #interrupt-cells = <1>; 135 - 136 - main_osc: main_osc { 137 - compatible = "atmel,at91rm9200-clk-main-osc"; 138 - #clock-cells = <0>; 139 - interrupts-extended = <&pmc AT91_PMC_MOSCS>; 140 - clocks = <&main_xtal>; 141 - }; 142 - 143 - main: mainck { 144 - compatible = "atmel,at91rm9200-clk-main"; 145 - #clock-cells = <0>; 146 - clocks = <&main_osc>; 147 - }; 148 - 149 - plla: pllack { 150 - compatible = "atmel,at91rm9200-clk-pll"; 151 - #clock-cells = <0>; 152 - interrupts-extended = <&pmc AT91_PMC_LOCKA>; 153 - clocks = <&main>; 154 - reg = <0>; 155 - atmel,clk-input-range = <2000000 32000000>; 156 - #atmel,pll-clk-output-range-cells = <4>; 157 - atmel,pll-clk-output-ranges = <745000000 800000000 0 0 158 - 695000000 750000000 1 0 159 - 645000000 700000000 2 0 160 - 595000000 650000000 3 0 161 - 545000000 600000000 0 1 162 - 495000000 555000000 1 1 163 - 445000000 500000000 2 1 164 - 400000000 450000000 3 1>; 165 - }; 166 - 167 - plladiv: plladivck { 168 - compatible = "atmel,at91sam9x5-clk-plldiv"; 169 - #clock-cells = <0>; 170 - clocks = <&plla>; 171 - }; 172 - 173 - utmi: utmick { 174 - compatible = "atmel,at91sam9x5-clk-utmi"; 175 - #clock-cells = <0>; 176 - interrupts-extended = <&pmc AT91_PMC_LOCKU>; 177 - clocks = <&main>; 178 - }; 179 - 180 - mck: masterck { 181 - compatible = "atmel,at91rm9200-clk-master"; 182 - #clock-cells = <0>; 183 - interrupts-extended = <&pmc AT91_PMC_MCKRDY>; 184 - clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>; 185 - atmel,clk-output-range = <0 133333333>; 186 - atmel,clk-divisors = <1 2 4 3>; 187 - }; 188 - 189 - usb: usbck { 190 - compatible = "atmel,at91sam9x5-clk-usb"; 191 - #clock-cells = <0>; 192 - clocks = <&plladiv>, <&utmi>; 193 - }; 194 - 195 - prog: progck { 196 - compatible = "atmel,at91sam9g45-clk-programmable"; 197 - #address-cells = <1>; 198 - #size-cells = <0>; 199 - interrupt-parent = <&pmc>; 200 - clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>; 201 - 202 - prog0: prog0 { 203 - #clock-cells = <0>; 204 - reg = <0>; 205 - interrupts = <AT91_PMC_PCKRDY(0)>; 206 - }; 207 - 208 - prog1: prog1 { 209 - #clock-cells = <0>; 210 - reg = <1>; 211 - interrupts = <AT91_PMC_PCKRDY(1)>; 212 - }; 213 - }; 214 - 215 - systemck { 216 - compatible = "atmel,at91rm9200-clk-system"; 217 - #address-cells = <1>; 218 - #size-cells = <0>; 219 - 220 - ddrck: ddrck { 221 - #clock-cells = <0>; 222 - reg = <2>; 223 - clocks = <&mck>; 224 - }; 225 - 226 - uhpck: uhpck { 227 - #clock-cells = <0>; 228 - reg = <6>; 229 - clocks = <&usb>; 230 - }; 231 - 232 - pck0: pck0 { 233 - #clock-cells = <0>; 234 - reg = <8>; 235 - clocks = <&prog0>; 236 - }; 237 - 238 - pck1: pck1 { 239 - #clock-cells = <0>; 240 - reg = <9>; 241 - clocks = <&prog1>; 242 - }; 243 - }; 244 - 245 - periphck { 246 - compatible = "atmel,at91rm9200-clk-peripheral"; 247 - #address-cells = <1>; 248 - #size-cells = <0>; 249 - clocks = <&mck>; 250 - 251 - pioA_clk: pioA_clk { 252 - #clock-cells = <0>; 253 - reg = <2>; 254 - }; 255 - 256 - pioB_clk: pioB_clk { 257 - #clock-cells = <0>; 258 - reg = <3>; 259 - }; 260 - 261 - pioC_clk: pioC_clk { 262 - #clock-cells = <0>; 263 - reg = <4>; 264 - }; 265 - 266 - pioDE_clk: pioDE_clk { 267 - #clock-cells = <0>; 268 - reg = <5>; 269 - }; 270 - 271 - trng_clk: trng_clk { 272 - #clock-cells = <0>; 273 - reg = <6>; 274 - }; 275 - 276 - usart0_clk: usart0_clk { 277 - #clock-cells = <0>; 278 - reg = <7>; 279 - }; 280 - 281 - usart1_clk: usart1_clk { 282 - #clock-cells = <0>; 283 - reg = <8>; 284 - }; 285 - 286 - usart2_clk: usart2_clk { 287 - #clock-cells = <0>; 288 - reg = <9>; 289 - }; 290 - 291 - usart3_clk: usart3_clk { 292 - #clock-cells = <0>; 293 - reg = <10>; 294 - }; 295 - 296 - mci0_clk: mci0_clk { 297 - #clock-cells = <0>; 298 - reg = <11>; 299 - }; 300 - 301 - twi0_clk: twi0_clk { 302 - #clock-cells = <0>; 303 - reg = <12>; 304 - }; 305 - 306 - twi1_clk: twi1_clk { 307 - #clock-cells = <0>; 308 - reg = <13>; 309 - }; 310 - 311 - spi0_clk: spi0_clk { 312 - #clock-cells = <0>; 313 - reg = <14>; 314 - }; 315 - 316 - spi1_clk: spi1_clk { 317 - #clock-cells = <0>; 318 - reg = <15>; 319 - }; 320 - 321 - ssc0_clk: ssc0_clk { 322 - #clock-cells = <0>; 323 - reg = <16>; 324 - }; 325 - 326 - ssc1_clk: ssc1_clk { 327 - #clock-cells = <0>; 328 - reg = <17>; 329 - }; 330 - 331 - tcb0_clk: tcb0_clk { 332 - #clock-cells = <0>; 333 - reg = <18>; 334 - }; 335 - 336 - pwm_clk: pwm_clk { 337 - #clock-cells = <0>; 338 - reg = <19>; 339 - }; 340 - 341 - adc_clk: adc_clk { 342 - #clock-cells = <0>; 343 - reg = <20>; 344 - }; 345 - 346 - dma0_clk: dma0_clk { 347 - #clock-cells = <0>; 348 - reg = <21>; 349 - }; 350 - 351 - uhphs_clk: uhphs_clk { 352 - #clock-cells = <0>; 353 - reg = <22>; 354 - }; 355 - 356 - lcd_clk: lcd_clk { 357 - #clock-cells = <0>; 358 - reg = <23>; 359 - }; 360 - 361 - ac97_clk: ac97_clk { 362 - #clock-cells = <0>; 363 - reg = <24>; 364 - }; 365 - 366 - macb0_clk: macb0_clk { 367 - #clock-cells = <0>; 368 - reg = <25>; 369 - }; 370 - 371 - isi_clk: isi_clk { 372 - #clock-cells = <0>; 373 - reg = <26>; 374 - }; 375 - 376 - udphs_clk: udphs_clk { 377 - #clock-cells = <0>; 378 - reg = <27>; 379 - }; 380 - 381 - aestdessha_clk: aestdessha_clk { 382 - #clock-cells = <0>; 383 - reg = <28>; 384 - }; 385 - 386 - mci1_clk: mci1_clk { 387 - #clock-cells = <0>; 388 - reg = <29>; 389 - }; 390 - 391 - vdec_clk: vdec_clk { 392 - #clock-cells = <0>; 393 - reg = <30>; 394 - }; 395 - }; 131 + #clock-cells = <2>; 132 + clocks = <&clk32k>, <&main_xtal>; 133 + clock-names = "slow_clk", "main_xtal"; 396 134 }; 397 135 398 136 rstc@fffffd00 { ··· 143 405 compatible = "atmel,at91sam9260-pit"; 144 406 reg = <0xfffffd30 0xf>; 145 407 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 146 - clocks = <&mck>; 408 + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 147 409 }; 148 410 149 411 ··· 159 421 #size-cells = <0>; 160 422 reg = <0xfff7c000 0x100>; 161 423 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>; 162 - clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>; 424 + clocks = <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>; 163 425 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; 164 426 }; 165 427 ··· 169 431 #size-cells = <0>; 170 432 reg = <0xfffd4000 0x100>; 171 433 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>; 172 - clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>; 434 + clocks = <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>; 173 435 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; 174 436 }; 175 437 ··· 178 440 reg = <0xffffec00 0x200>; 179 441 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; 180 442 #dma-cells = <2>; 181 - clocks = <&dma0_clk>; 443 + clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; 182 444 clock-names = "dma_clk"; 183 445 }; 184 446 ··· 621 883 gpio-controller; 622 884 interrupt-controller; 623 885 #interrupt-cells = <2>; 624 - clocks = <&pioA_clk>; 886 + clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; 625 887 }; 626 888 627 889 pioB: gpio@fffff400 { ··· 632 894 gpio-controller; 633 895 interrupt-controller; 634 896 #interrupt-cells = <2>; 635 - clocks = <&pioB_clk>; 897 + clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; 636 898 }; 637 899 638 900 pioC: gpio@fffff600 { ··· 643 905 gpio-controller; 644 906 interrupt-controller; 645 907 #interrupt-cells = <2>; 646 - clocks = <&pioC_clk>; 908 + clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; 647 909 }; 648 910 649 911 pioD: gpio@fffff800 { ··· 654 916 gpio-controller; 655 917 interrupt-controller; 656 918 #interrupt-cells = <2>; 657 - clocks = <&pioDE_clk>; 919 + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 658 920 }; 659 921 660 922 pioE: gpio@fffffa00 { ··· 665 927 gpio-controller; 666 928 interrupt-controller; 667 929 #interrupt-cells = <2>; 668 - clocks = <&pioDE_clk>; 930 + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 669 931 }; 670 932 }; 671 933 ··· 675 937 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 676 938 pinctrl-names = "default"; 677 939 pinctrl-0 = <&pinctrl_dbgu>; 678 - clocks = <&mck>; 940 + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 679 941 clock-names = "usart"; 680 942 status = "disabled"; 681 943 }; ··· 688 950 atmel,use-dma-tx; 689 951 pinctrl-names = "default"; 690 952 pinctrl-0 = <&pinctrl_usart0>; 691 - clocks = <&usart0_clk>; 953 + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; 692 954 clock-names = "usart"; 693 955 status = "disabled"; 694 956 }; ··· 701 963 atmel,use-dma-tx; 702 964 pinctrl-names = "default"; 703 965 pinctrl-0 = <&pinctrl_usart1>; 704 - clocks = <&usart1_clk>; 966 + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 705 967 clock-names = "usart"; 706 968 status = "disabled"; 707 969 }; ··· 714 976 atmel,use-dma-tx; 715 977 pinctrl-names = "default"; 716 978 pinctrl-0 = <&pinctrl_usart2>; 717 - clocks = <&usart2_clk>; 979 + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; 718 980 clock-names = "usart"; 719 981 status = "disabled"; 720 982 }; ··· 727 989 atmel,use-dma-tx; 728 990 pinctrl-names = "default"; 729 991 pinctrl-0 = <&pinctrl_usart3>; 730 - clocks = <&usart3_clk>; 992 + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; 731 993 clock-names = "usart"; 732 994 status = "disabled"; 733 995 }; ··· 738 1000 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>; 739 1001 pinctrl-names = "default"; 740 1002 pinctrl-0 = <&pinctrl_macb_rmii>; 741 - clocks = <&macb0_clk>, <&macb0_clk>; 1003 + clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_PERIPHERAL 25>; 742 1004 clock-names = "hclk", "pclk"; 743 1005 status = "disabled"; 744 1006 }; ··· 747 1009 compatible = "atmel,at91sam9g45-trng"; 748 1010 reg = <0xfffcc000 0x100>; 749 1011 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>; 750 - clocks = <&trng_clk>; 1012 + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; 751 1013 }; 752 1014 753 1015 i2c0: i2c@fff84000 { ··· 758 1020 pinctrl-0 = <&pinctrl_i2c0>; 759 1021 #address-cells = <1>; 760 1022 #size-cells = <0>; 761 - clocks = <&twi0_clk>; 1023 + clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; 762 1024 status = "disabled"; 763 1025 }; 764 1026 ··· 770 1032 pinctrl-0 = <&pinctrl_i2c1>; 771 1033 #address-cells = <1>; 772 1034 #size-cells = <0>; 773 - clocks = <&twi1_clk>; 1035 + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 774 1036 status = "disabled"; 775 1037 }; 776 1038 ··· 780 1042 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 781 1043 pinctrl-names = "default"; 782 1044 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 783 - clocks = <&ssc0_clk>; 1045 + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; 784 1046 clock-names = "pclk"; 785 1047 status = "disabled"; 786 1048 }; ··· 791 1053 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; 792 1054 pinctrl-names = "default"; 793 1055 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 794 - clocks = <&ssc1_clk>; 1056 + clocks = <&pmc PMC_TYPE_PERIPHERAL 17>; 795 1057 clock-names = "pclk"; 796 1058 status = "disabled"; 797 1059 }; ··· 802 1064 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 4>; 803 1065 pinctrl-names = "default"; 804 1066 pinctrl-0 = <&pinctrl_ac97>; 805 - clocks = <&ac97_clk>; 1067 + clocks = <&pmc PMC_TYPE_PERIPHERAL 24>; 806 1068 clock-names = "ac97_clk"; 807 1069 status = "disabled"; 808 1070 }; ··· 813 1075 compatible = "atmel,at91sam9g45-adc"; 814 1076 reg = <0xfffb0000 0x100>; 815 1077 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; 816 - clocks = <&adc_clk>, <&adc_op_clk>; 1078 + clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>; 817 1079 clock-names = "adc_clk", "adc_op_clk"; 818 1080 atmel,adc-channels-used = <0xff>; 819 1081 atmel,adc-vref = <3300>; ··· 849 1111 compatible = "atmel,at91sam9g45-isi"; 850 1112 reg = <0xfffb4000 0x4000>; 851 1113 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 5>; 852 - clocks = <&isi_clk>; 1114 + clocks = <&pmc PMC_TYPE_PERIPHERAL 26>; 853 1115 clock-names = "isi_clk"; 854 1116 status = "disabled"; 855 1117 port { ··· 863 1125 reg = <0xfffb8000 0x300>; 864 1126 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>; 865 1127 #pwm-cells = <3>; 866 - clocks = <&pwm_clk>; 1128 + clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; 867 1129 status = "disabled"; 868 1130 }; 869 1131 ··· 876 1138 dma-names = "rxtx"; 877 1139 #address-cells = <1>; 878 1140 #size-cells = <0>; 879 - clocks = <&mci0_clk>; 1141 + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; 880 1142 clock-names = "mci_clk"; 881 1143 status = "disabled"; 882 1144 }; ··· 890 1152 dma-names = "rxtx"; 891 1153 #address-cells = <1>; 892 1154 #size-cells = <0>; 893 - clocks = <&mci1_clk>; 1155 + clocks = <&pmc PMC_TYPE_PERIPHERAL 29>; 894 1156 clock-names = "mci_clk"; 895 1157 status = "disabled"; 896 1158 }; ··· 914 1176 interrupts = <14 4 3>; 915 1177 pinctrl-names = "default"; 916 1178 pinctrl-0 = <&pinctrl_spi0>; 917 - clocks = <&spi0_clk>; 1179 + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; 918 1180 clock-names = "spi_clk"; 919 1181 status = "disabled"; 920 1182 }; ··· 927 1189 interrupts = <15 4 3>; 928 1190 pinctrl-names = "default"; 929 1191 pinctrl-0 = <&pinctrl_spi1>; 930 - clocks = <&spi1_clk>; 1192 + clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; 931 1193 clock-names = "spi_clk"; 932 1194 status = "disabled"; 933 1195 }; ··· 939 1201 reg = <0x00600000 0x80000 940 1202 0xfff78000 0x400>; 941 1203 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; 942 - clocks = <&udphs_clk>, <&utmi>; 1204 + clocks = <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_CORE PMC_UTMI>; 943 1205 clock-names = "pclk", "hclk"; 944 1206 status = "disabled"; 945 1207 ··· 1032 1294 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>; 1033 1295 pinctrl-names = "default"; 1034 1296 pinctrl-0 = <&pinctrl_fb>; 1035 - clocks = <&lcd_clk>, <&lcd_clk>; 1297 + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>; 1036 1298 clock-names = "hclk", "lcdc_clk"; 1037 1299 status = "disabled"; 1038 1300 }; ··· 1041 1303 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 1042 1304 reg = <0x00700000 0x100000>; 1043 1305 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 1044 - clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; 1306 + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>; 1045 1307 clock-names = "ohci_clk", "hclk", "uhpck"; 1046 1308 status = "disabled"; 1047 1309 }; ··· 1050 1312 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 1051 1313 reg = <0x00800000 0x100000>; 1052 1314 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 1053 - clocks = <&utmi>, <&uhphs_clk>; 1315 + clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>; 1054 1316 clock-names = "usb_clk", "ehci_clk"; 1055 1317 status = "disabled"; 1056 1318 }; ··· 1068 1330 0x3 0x0 0x40000000 0x10000000 1069 1331 0x4 0x0 0x50000000 0x10000000 1070 1332 0x5 0x0 0x60000000 0x10000000>; 1071 - clocks = <&mck>; 1333 + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 1072 1334 status = "disabled"; 1073 1335 1074 1336 nand_controller: nand-controller {
+2 -2
arch/arm/boot/dts/at91sam9m10g45ek.dts
··· 72 72 pinctrl-0 = <&pinctrl_pck1_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>; 73 73 resetb-gpios = <&pioD 12 GPIO_ACTIVE_LOW>; 74 74 pwdn-gpios = <&pioD 13 GPIO_ACTIVE_HIGH>; 75 - clocks = <&pck1>; 75 + clocks = <&pmc PMC_TYPE_SYSTEM 9>; 76 76 clock-names = "xvclk"; 77 - assigned-clocks = <&pck1>; 77 + assigned-clocks = <&pmc PMC_TYPE_SYSTEM 9>; 78 78 assigned-clock-rates = <25000000>; 79 79 80 80 port {