Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: at91: at91sam9n12: switch to new clock bindings

Switch at91sam9n12 boards to the new PMC clock bindings.

Link: https://lore.kernel.org/r/20200116173510.427403-1-alexandre.belloni@bootlin.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

+29 -297
+28 -296
arch/arm/boot/dts/at91sam9n12.dtsi
··· 104 104 ramc0: ramc@ffffe800 { 105 105 compatible = "atmel,at91sam9g45-ddramc"; 106 106 reg = <0xffffe800 0x200>; 107 - clocks = <&ddrck>; 107 + clocks = <&pmc PMC_TYPE_SYSTEM 2>; 108 108 clock-names = "ddrck"; 109 109 }; 110 110 ··· 116 116 pmc: pmc@fffffc00 { 117 117 compatible = "atmel,at91sam9n12-pmc", "syscon"; 118 118 reg = <0xfffffc00 0x200>; 119 + #clock-cells = <2>; 120 + clocks = <&clk32k>, <&main_xtal>; 121 + clock-names = "slow_clk", "main_xtal"; 119 122 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 120 - interrupt-controller; 121 - #address-cells = <1>; 122 - #size-cells = <0>; 123 - #interrupt-cells = <1>; 124 - 125 - main_rc_osc: main_rc_osc { 126 - compatible = "atmel,at91sam9x5-clk-main-rc-osc"; 127 - #clock-cells = <0>; 128 - interrupts-extended = <&pmc AT91_PMC_MOSCRCS>; 129 - clock-frequency = <12000000>; 130 - clock-accuracy = <50000000>; 131 - }; 132 - 133 - main_osc: main_osc { 134 - compatible = "atmel,at91rm9200-clk-main-osc"; 135 - #clock-cells = <0>; 136 - interrupts-extended = <&pmc AT91_PMC_MOSCS>; 137 - clocks = <&main_xtal>; 138 - }; 139 - 140 - main: mainck { 141 - compatible = "atmel,at91sam9x5-clk-main"; 142 - #clock-cells = <0>; 143 - interrupts-extended = <&pmc AT91_PMC_MOSCSELS>; 144 - clocks = <&main_rc_osc>, <&main_osc>; 145 - }; 146 - 147 - plla: pllack { 148 - compatible = "atmel,at91rm9200-clk-pll"; 149 - #clock-cells = <0>; 150 - interrupts-extended = <&pmc AT91_PMC_LOCKA>; 151 - clocks = <&main>; 152 - reg = <0>; 153 - atmel,clk-input-range = <2000000 32000000>; 154 - #atmel,pll-clk-output-range-cells = <4>; 155 - atmel,pll-clk-output-ranges = <745000000 800000000 0 0>, 156 - <695000000 750000000 1 0>, 157 - <645000000 700000000 2 0>, 158 - <595000000 650000000 3 0>, 159 - <545000000 600000000 0 1>, 160 - <495000000 555000000 1 1>, 161 - <445000000 500000000 2 1>, 162 - <400000000 450000000 3 1>; 163 - }; 164 - 165 - plladiv: plladivck { 166 - compatible = "atmel,at91sam9x5-clk-plldiv"; 167 - #clock-cells = <0>; 168 - clocks = <&plla>; 169 - }; 170 - 171 - pllb: pllbck { 172 - compatible = "atmel,at91rm9200-clk-pll"; 173 - #clock-cells = <0>; 174 - interrupts-extended = <&pmc AT91_PMC_LOCKB>; 175 - clocks = <&main>; 176 - reg = <1>; 177 - atmel,clk-input-range = <2000000 32000000>; 178 - #atmel,pll-clk-output-range-cells = <3>; 179 - atmel,pll-clk-output-ranges = <30000000 100000000 0>; 180 - }; 181 - 182 - mck: masterck { 183 - compatible = "atmel,at91sam9x5-clk-master"; 184 - #clock-cells = <0>; 185 - interrupts-extended = <&pmc AT91_PMC_MCKRDY>; 186 - clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>; 187 - atmel,clk-output-range = <0 133333333>; 188 - atmel,clk-divisors = <1 2 4 3>; 189 - atmel,master-clk-have-div3-pres; 190 - }; 191 - 192 - usb: usbck { 193 - compatible = "atmel,at91sam9n12-clk-usb"; 194 - #clock-cells = <0>; 195 - clocks = <&pllb>; 196 - }; 197 - 198 - prog: progck { 199 - compatible = "atmel,at91sam9x5-clk-programmable"; 200 - #address-cells = <1>; 201 - #size-cells = <0>; 202 - interrupt-parent = <&pmc>; 203 - clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>, <&mck>; 204 - 205 - prog0: prog0 { 206 - #clock-cells = <0>; 207 - reg = <0>; 208 - interrupts = <AT91_PMC_PCKRDY(0)>; 209 - }; 210 - 211 - prog1: prog1 { 212 - #clock-cells = <0>; 213 - reg = <1>; 214 - interrupts = <AT91_PMC_PCKRDY(1)>; 215 - }; 216 - }; 217 - 218 - systemck { 219 - compatible = "atmel,at91rm9200-clk-system"; 220 - #address-cells = <1>; 221 - #size-cells = <0>; 222 - 223 - ddrck: ddrck { 224 - #clock-cells = <0>; 225 - reg = <2>; 226 - clocks = <&mck>; 227 - }; 228 - 229 - lcdck: lcdck { 230 - #clock-cells = <0>; 231 - reg = <3>; 232 - clocks = <&mck>; 233 - }; 234 - 235 - uhpck: uhpck { 236 - #clock-cells = <0>; 237 - reg = <6>; 238 - clocks = <&usb>; 239 - }; 240 - 241 - udpck: udpck { 242 - #clock-cells = <0>; 243 - reg = <7>; 244 - clocks = <&usb>; 245 - }; 246 - 247 - pck0: pck0 { 248 - #clock-cells = <0>; 249 - reg = <8>; 250 - clocks = <&prog0>; 251 - }; 252 - 253 - pck1: pck1 { 254 - #clock-cells = <0>; 255 - reg = <9>; 256 - clocks = <&prog1>; 257 - }; 258 - }; 259 - 260 - periphck { 261 - compatible = "atmel,at91sam9x5-clk-peripheral"; 262 - #address-cells = <1>; 263 - #size-cells = <0>; 264 - clocks = <&mck>; 265 - 266 - pioAB_clk: pioAB_clk { 267 - #clock-cells = <0>; 268 - reg = <2>; 269 - }; 270 - 271 - pioCD_clk: pioCD_clk { 272 - #clock-cells = <0>; 273 - reg = <3>; 274 - }; 275 - 276 - fuse_clk: fuse_clk { 277 - #clock-cells = <0>; 278 - reg = <4>; 279 - }; 280 - 281 - usart0_clk: usart0_clk { 282 - #clock-cells = <0>; 283 - reg = <5>; 284 - }; 285 - 286 - usart1_clk: usart1_clk { 287 - #clock-cells = <0>; 288 - reg = <6>; 289 - }; 290 - 291 - usart2_clk: usart2_clk { 292 - #clock-cells = <0>; 293 - reg = <7>; 294 - }; 295 - 296 - usart3_clk: usart3_clk { 297 - #clock-cells = <0>; 298 - reg = <8>; 299 - }; 300 - 301 - twi0_clk: twi0_clk { 302 - reg = <9>; 303 - #clock-cells = <0>; 304 - }; 305 - 306 - twi1_clk: twi1_clk { 307 - #clock-cells = <0>; 308 - reg = <10>; 309 - }; 310 - 311 - mci0_clk: mci0_clk { 312 - #clock-cells = <0>; 313 - reg = <12>; 314 - }; 315 - 316 - spi0_clk: spi0_clk { 317 - #clock-cells = <0>; 318 - reg = <13>; 319 - }; 320 - 321 - spi1_clk: spi1_clk { 322 - #clock-cells = <0>; 323 - reg = <14>; 324 - }; 325 - 326 - uart0_clk: uart0_clk { 327 - #clock-cells = <0>; 328 - reg = <15>; 329 - }; 330 - 331 - uart1_clk: uart1_clk { 332 - #clock-cells = <0>; 333 - reg = <16>; 334 - }; 335 - 336 - tcb_clk: tcb_clk { 337 - #clock-cells = <0>; 338 - reg = <17>; 339 - }; 340 - 341 - pwm_clk: pwm_clk { 342 - #clock-cells = <0>; 343 - reg = <18>; 344 - }; 345 - 346 - adc_clk: adc_clk { 347 - #clock-cells = <0>; 348 - reg = <19>; 349 - }; 350 - 351 - dma0_clk: dma0_clk { 352 - #clock-cells = <0>; 353 - reg = <20>; 354 - }; 355 - 356 - uhphs_clk: uhphs_clk { 357 - #clock-cells = <0>; 358 - reg = <22>; 359 - }; 360 - 361 - udphs_clk: udphs_clk { 362 - #clock-cells = <0>; 363 - reg = <23>; 364 - }; 365 - 366 - lcdc_clk: lcdc_clk { 367 - #clock-cells = <0>; 368 - reg = <25>; 369 - }; 370 - 371 - sha_clk: sha_clk { 372 - #clock-cells = <0>; 373 - reg = <27>; 374 - }; 375 - 376 - ssc0_clk: ssc0_clk { 377 - #clock-cells = <0>; 378 - reg = <28>; 379 - }; 380 - 381 - aes_clk: aes_clk { 382 - #clock-cells = <0>; 383 - reg = <29>; 384 - }; 385 - 386 - trng_clk: trng_clk { 387 - #clock-cells = <0>; 388 - reg = <30>; 389 - }; 390 - }; 391 123 }; 392 124 393 125 rstc@fffffe00 { ··· 132 400 compatible = "atmel,at91sam9260-pit"; 133 401 reg = <0xfffffe30 0xf>; 134 402 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 135 - clocks = <&mck>; 403 + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 136 404 }; 137 405 138 406 shdwc@fffffe10 { ··· 171 439 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; 172 440 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>; 173 441 dma-names = "rxtx"; 174 - clocks = <&mci0_clk>; 442 + clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; 175 443 clock-names = "mci_clk"; 176 444 #address-cells = <1>; 177 445 #size-cells = <0>; ··· 184 452 #size-cells = <0>; 185 453 reg = <0xf8008000 0x100>; 186 454 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; 187 - clocks = <&tcb_clk>, <&clk32k>; 455 + clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>; 188 456 clock-names = "t0_clk", "slow_clk"; 189 457 }; 190 458 ··· 194 462 #size-cells = <0>; 195 463 reg = <0xf800c000 0x100>; 196 464 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; 197 - clocks = <&tcb_clk>, <&clk32k>; 465 + clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>; 198 466 clock-names = "t0_clk", "slow_clk"; 199 467 }; 200 468 ··· 202 470 compatible = "atmel,at91sam9n12-hlcdc"; 203 471 reg = <0xf8038000 0x2000>; 204 472 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>; 205 - clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; 473 + clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>; 206 474 clock-names = "periph_clk", "sys_clk", "slow_clk"; 207 475 status = "disabled"; 208 476 ··· 231 499 reg = <0xffffec00 0x200>; 232 500 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; 233 501 #dma-cells = <2>; 234 - clocks = <&dma0_clk>; 502 + clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; 235 503 clock-names = "dma_clk"; 236 504 }; 237 505 ··· 549 817 gpio-controller; 550 818 interrupt-controller; 551 819 #interrupt-cells = <2>; 552 - clocks = <&pioAB_clk>; 820 + clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; 553 821 }; 554 822 555 823 pioB: gpio@fffff600 { ··· 560 828 gpio-controller; 561 829 interrupt-controller; 562 830 #interrupt-cells = <2>; 563 - clocks = <&pioAB_clk>; 831 + clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; 564 832 }; 565 833 566 834 pioC: gpio@fffff800 { ··· 571 839 gpio-controller; 572 840 interrupt-controller; 573 841 #interrupt-cells = <2>; 574 - clocks = <&pioCD_clk>; 842 + clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; 575 843 }; 576 844 577 845 pioD: gpio@fffffa00 { ··· 582 850 gpio-controller; 583 851 interrupt-controller; 584 852 #interrupt-cells = <2>; 585 - clocks = <&pioCD_clk>; 853 + clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; 586 854 }; 587 855 }; 588 856 ··· 592 860 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 593 861 pinctrl-names = "default"; 594 862 pinctrl-0 = <&pinctrl_dbgu>; 595 - clocks = <&mck>; 863 + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 596 864 clock-names = "usart"; 597 865 status = "disabled"; 598 866 }; ··· 606 874 dma-names = "tx", "rx"; 607 875 pinctrl-names = "default"; 608 876 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 609 - clocks = <&ssc0_clk>; 877 + clocks = <&pmc PMC_TYPE_PERIPHERAL 28>; 610 878 clock-names = "pclk"; 611 879 status = "disabled"; 612 880 }; ··· 617 885 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; 618 886 pinctrl-names = "default"; 619 887 pinctrl-0 = <&pinctrl_usart0>; 620 - clocks = <&usart0_clk>; 888 + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 621 889 clock-names = "usart"; 622 890 status = "disabled"; 623 891 }; ··· 628 896 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; 629 897 pinctrl-names = "default"; 630 898 pinctrl-0 = <&pinctrl_usart1>; 631 - clocks = <&usart1_clk>; 899 + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; 632 900 clock-names = "usart"; 633 901 status = "disabled"; 634 902 }; ··· 639 907 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 640 908 pinctrl-names = "default"; 641 909 pinctrl-0 = <&pinctrl_usart2>; 642 - clocks = <&usart2_clk>; 910 + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; 643 911 clock-names = "usart"; 644 912 status = "disabled"; 645 913 }; ··· 650 918 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 651 919 pinctrl-names = "default"; 652 920 pinctrl-0 = <&pinctrl_usart3>; 653 - clocks = <&usart3_clk>; 921 + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 654 922 clock-names = "usart"; 655 923 status = "disabled"; 656 924 }; ··· 666 934 #size-cells = <0>; 667 935 pinctrl-names = "default"; 668 936 pinctrl-0 = <&pinctrl_i2c0>; 669 - clocks = <&twi0_clk>; 937 + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; 670 938 status = "disabled"; 671 939 }; 672 940 ··· 681 949 #size-cells = <0>; 682 950 pinctrl-names = "default"; 683 951 pinctrl-0 = <&pinctrl_i2c1>; 684 - clocks = <&twi1_clk>; 952 + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; 685 953 status = "disabled"; 686 954 }; 687 955 ··· 696 964 dma-names = "tx", "rx"; 697 965 pinctrl-names = "default"; 698 966 pinctrl-0 = <&pinctrl_spi0>; 699 - clocks = <&spi0_clk>; 967 + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 700 968 clock-names = "spi_clk"; 701 969 status = "disabled"; 702 970 }; ··· 712 980 dma-names = "tx", "rx"; 713 981 pinctrl-names = "default"; 714 982 pinctrl-0 = <&pinctrl_spi1>; 715 - clocks = <&spi1_clk>; 983 + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; 716 984 clock-names = "spi_clk"; 717 985 status = "disabled"; 718 986 }; ··· 741 1009 reg = <0xf8034000 0x300>; 742 1010 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>; 743 1011 #pwm-cells = <3>; 744 - clocks = <&pwm_clk>; 1012 + clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; 745 1013 status = "disabled"; 746 1014 }; 747 1015 ··· 749 1017 compatible = "atmel,at91sam9260-udc"; 750 1018 reg = <0xf803c000 0x4000>; 751 1019 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>; 752 - clocks = <&udphs_clk>, <&udpck>; 1020 + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_SYSTEM 7>; 753 1021 clock-names = "pclk", "hclk"; 754 1022 status = "disabled"; 755 1023 }; ··· 759 1027 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 760 1028 reg = <0x00500000 0x00100000>; 761 1029 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 762 - clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; 1030 + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>; 763 1031 clock-names = "ohci_clk", "hclk", "uhpck"; 764 1032 status = "disabled"; 765 1033 }; ··· 777 1045 0x3 0x0 0x40000000 0x10000000 778 1046 0x4 0x0 0x50000000 0x10000000 779 1047 0x5 0x0 0x60000000 0x10000000>; 780 - clocks = <&mck>; 1048 + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 781 1049 status = "disabled"; 782 1050 783 1051 nand_controller: nand-controller {
+1 -1
arch/arm/boot/dts/at91sam9n12ek.dts
··· 59 59 wm8904: codec@1a { 60 60 compatible = "wlf,wm8904"; 61 61 reg = <0x1a>; 62 - clocks = <&pck0>; 62 + clocks = <&pmc PMC_TYPE_SYSTEM 8>; 63 63 clock-names = "mclk"; 64 64 }; 65 65