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kernel os linux

Merge tag 'at91-dt-5.20-3' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt

AT91 DT for v5.20 #3

It contains updates for LAN966X devices as follows:
- clock gating support
- gpio restart and network switch for lan966x-pcb8291 board

* tag 'at91-dt-5.20-3' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: lan966x: Enable network driver on pcb8291
ARM: dts: lan966x: Disable can0 on pcb8291
ARM: dts: lan966x: Add gpio-restart
ARM: dts: lan966x: add clock gating register

Link: https://lore.kernel.org/r/20220722152041.1752962-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+43 -2
+42 -1
arch/arm/boot/dts/lan966x-pcb8291.dts
··· 4 4 */ 5 5 /dts-v1/; 6 6 #include "lan966x.dtsi" 7 + #include "dt-bindings/phy/phy-lan966x-serdes.h" 7 8 8 9 / { 9 10 model = "Microchip EVB - LAN9662"; ··· 16 15 17 16 aliases { 18 17 serial0 = &usart3; 18 + }; 19 + 20 + gpio-restart { 21 + compatible = "gpio-restart"; 22 + gpios = <&gpio 56 GPIO_ACTIVE_LOW>; 23 + priority = <200>; 19 24 }; 20 25 }; 21 26 ··· 42 35 &can0 { 43 36 pinctrl-0 = <&can0_b_pins>; 44 37 pinctrl-names = "default"; 45 - status = "okay"; 38 + status = "disabled"; /* Conflict with switch */ 46 39 }; 47 40 48 41 &flx3 { ··· 54 47 pinctrl-names = "default"; 55 48 status = "okay"; 56 49 }; 50 + }; 51 + 52 + &mdio1 { 53 + status = "okay"; 54 + }; 55 + 56 + &phy0 { 57 + status = "okay"; 58 + }; 59 + 60 + &phy1 { 61 + status = "okay"; 62 + }; 63 + 64 + &port0 { 65 + phy-handle = <&phy0>; 66 + phy-mode = "gmii"; 67 + phys = <&serdes 0 CU(0)>; 68 + status = "okay"; 69 + }; 70 + 71 + &port1 { 72 + phy-handle = <&phy1>; 73 + phy-mode = "gmii"; 74 + phys = <&serdes 1 CU(1)>; 75 + status = "okay"; 76 + }; 77 + 78 + &serdes { 79 + status = "okay"; 80 + }; 81 + 82 + &switch { 83 + status = "okay"; 57 84 }; 58 85 59 86 &watchdog {
+1 -1
arch/arm/boot/dts/lan966x.dtsi
··· 65 65 #clock-cells = <1>; 66 66 clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>; 67 67 clock-names = "cpu", "ddr", "sys"; 68 - reg = <0xe00c00a8 0x38>; 68 + reg = <0xe00c00a8 0x38>, <0xe00c02cc 0x4>; 69 69 }; 70 70 71 71 timer {