Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

gpu: nova-core: falcon: Move dma_reset functionality into helper

Move dma_reset so we can use it for the upcoming sequencer
functionality.

Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251114195552.739371-5-joelagnelf@nvidia.com>

authored by

Joel Fernandes and committed by
Alexandre Courbot
0f2c8e27 4f7656f7

+7 -2
+7 -2
drivers/gpu/nova-core/falcon.rs
··· 382 382 }) 383 383 } 384 384 385 + /// Resets DMA-related registers. 386 + pub(crate) fn dma_reset(&self, bar: &Bar0) { 387 + regs::NV_PFALCON_FBIF_CTL::update(bar, &E::ID, |v| v.set_allow_phys_no_ctx(true)); 388 + regs::NV_PFALCON_FALCON_DMACTL::default().write(bar, &E::ID); 389 + } 390 + 385 391 /// Wait for memory scrubbing to complete. 386 392 fn reset_wait_mem_scrubbing(&self, bar: &Bar0) -> Result { 387 393 // TIMEOUT: memory scrubbing should complete in less than 20ms. ··· 537 531 538 532 /// Perform a DMA load into `IMEM` and `DMEM` of `fw`, and prepare the falcon to run it. 539 533 pub(crate) fn dma_load<F: FalconFirmware<Target = E>>(&self, bar: &Bar0, fw: &F) -> Result { 540 - regs::NV_PFALCON_FBIF_CTL::update(bar, &E::ID, |v| v.set_allow_phys_no_ctx(true)); 541 - regs::NV_PFALCON_FALCON_DMACTL::default().write(bar, &E::ID); 534 + self.dma_reset(bar); 542 535 regs::NV_PFALCON_FBIF_TRANSCFG::update(bar, &E::ID, 0, |v| { 543 536 v.set_target(FalconFbifTarget::CoherentSysmem) 544 537 .set_mem_type(FalconFbifMemType::Physical)