Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

gpu: nova-core: falcon: Move mbox functionalities into helper

Move falcon reading/writing to mbox functionality into helper so we can
use it from the sequencer resume flow.

Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
[acourbot@nvidia.com: make write/read mailbox methods unfallible.]
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251114195552.739371-4-joelagnelf@nvidia.com>

authored by

Joel Fernandes and committed by
Alexandre Courbot
4f7656f7 c5c0cfa6

+35 -19
+35 -19
drivers/gpu/nova-core/falcon.rs
··· 578 578 Ok(()) 579 579 } 580 580 581 + /// Writes values to the mailbox registers if provided. 582 + pub(crate) fn write_mailboxes(&self, bar: &Bar0, mbox0: Option<u32>, mbox1: Option<u32>) { 583 + if let Some(mbox0) = mbox0 { 584 + regs::NV_PFALCON_FALCON_MAILBOX0::default() 585 + .set_value(mbox0) 586 + .write(bar, &E::ID); 587 + } 588 + 589 + if let Some(mbox1) = mbox1 { 590 + regs::NV_PFALCON_FALCON_MAILBOX1::default() 591 + .set_value(mbox1) 592 + .write(bar, &E::ID); 593 + } 594 + } 595 + 596 + /// Reads the value from `mbox0` register. 597 + pub(crate) fn read_mailbox0(&self, bar: &Bar0) -> u32 { 598 + regs::NV_PFALCON_FALCON_MAILBOX0::read(bar, &E::ID).value() 599 + } 600 + 601 + /// Reads the value from `mbox1` register. 602 + pub(crate) fn read_mailbox1(&self, bar: &Bar0) -> u32 { 603 + regs::NV_PFALCON_FALCON_MAILBOX1::read(bar, &E::ID).value() 604 + } 605 + 606 + /// Reads values from both mailbox registers. 607 + pub(crate) fn read_mailboxes(&self, bar: &Bar0) -> (u32, u32) { 608 + let mbox0 = self.read_mailbox0(bar); 609 + let mbox1 = self.read_mailbox1(bar); 610 + 611 + (mbox0, mbox1) 612 + } 613 + 581 614 /// Start running the loaded firmware. 582 615 /// 583 616 /// `mbox0` and `mbox1` are optional parameters to write into the `MBOX0` and `MBOX1` registers ··· 624 591 mbox0: Option<u32>, 625 592 mbox1: Option<u32>, 626 593 ) -> Result<(u32, u32)> { 627 - if let Some(mbox0) = mbox0 { 628 - regs::NV_PFALCON_FALCON_MAILBOX0::default() 629 - .set_value(mbox0) 630 - .write(bar, &E::ID); 631 - } 632 - 633 - if let Some(mbox1) = mbox1 { 634 - regs::NV_PFALCON_FALCON_MAILBOX1::default() 635 - .set_value(mbox1) 636 - .write(bar, &E::ID); 637 - } 638 - 594 + self.write_mailboxes(bar, mbox0, mbox1); 639 595 self.start(bar)?; 640 596 self.wait_till_halted(bar)?; 641 - 642 - let (mbox0, mbox1) = ( 643 - regs::NV_PFALCON_FALCON_MAILBOX0::read(bar, &E::ID).value(), 644 - regs::NV_PFALCON_FALCON_MAILBOX1::read(bar, &E::ID).value(), 645 - ); 646 - 647 - Ok((mbox0, mbox1)) 597 + Ok(self.read_mailboxes(bar)) 648 598 } 649 599 650 600 /// Returns the fused version of the signature to use in order to run a HS firmware on this