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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
ARM: dts: r8a7793: add MSTP10 clocks to device tree
Instantiate MSTP10 clocks in r8a7793 device tree.
Based on similar work for the r8a7791 by Kuninori Morimoto.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+38
+36
arch/arm/boot/dts/r8a7793.dtsi
+36
arch/arm/boot/dts/r8a7793.dtsi
···
963
963
"qspi_mod", "i2c5", "i2c6", "i2c4",
964
964
"i2c3", "i2c2", "i2c1", "i2c0";
965
965
};
966
+
mstp10_clks: mstp10_clks@e6150998 {
967
+
compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
968
+
reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
969
+
clocks = <&p_clk>,
970
+
<&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
971
+
<&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
972
+
<&p_clk>,
973
+
<&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
974
+
<&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
975
+
<&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
976
+
<&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
977
+
<&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
978
+
<&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
979
+
<&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>;
980
+
981
+
#clock-cells = <1>;
982
+
clock-indices = <
983
+
R8A7793_CLK_SSI_ALL
984
+
R8A7793_CLK_SSI9 R8A7793_CLK_SSI8 R8A7793_CLK_SSI7 R8A7793_CLK_SSI6 R8A7793_CLK_SSI5
985
+
R8A7793_CLK_SSI4 R8A7793_CLK_SSI3 R8A7793_CLK_SSI2 R8A7793_CLK_SSI1 R8A7793_CLK_SSI0
986
+
R8A7793_CLK_SCU_ALL
987
+
R8A7793_CLK_SCU_DVC1 R8A7793_CLK_SCU_DVC0
988
+
R8A7793_CLK_SCU_CTU1_MIX1 R8A7793_CLK_SCU_CTU0_MIX0
989
+
R8A7793_CLK_SCU_SRC9 R8A7793_CLK_SCU_SRC8 R8A7793_CLK_SCU_SRC7 R8A7793_CLK_SCU_SRC6 R8A7793_CLK_SCU_SRC5
990
+
R8A7793_CLK_SCU_SRC4 R8A7793_CLK_SCU_SRC3 R8A7793_CLK_SCU_SRC2 R8A7793_CLK_SCU_SRC1 R8A7793_CLK_SCU_SRC0
991
+
>;
992
+
clock-output-names =
993
+
"ssi-all",
994
+
"ssi9", "ssi8", "ssi7", "ssi6", "ssi5",
995
+
"ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
996
+
"scu-all",
997
+
"scu-dvc1", "scu-dvc0",
998
+
"scu-ctu1-mix1", "scu-ctu0-mix0",
999
+
"scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
1000
+
"scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
1001
+
};
966
1002
mstp11_clks: mstp11_clks@e615099c {
967
1003
compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
968
1004
reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
+2
include/dt-bindings/clock/r8a7793-clock.h
+2
include/dt-bindings/clock/r8a7793-clock.h
···
145
145
#define R8A7793_CLK_SCU_ALL 17
146
146
#define R8A7793_CLK_SCU_DVC1 18
147
147
#define R8A7793_CLK_SCU_DVC0 19
148
+
#define R8A7793_CLK_SCU_CTU1_MIX1 20
149
+
#define R8A7793_CLK_SCU_CTU0_MIX0 21
148
150
#define R8A7793_CLK_SCU_SRC9 22
149
151
#define R8A7793_CLK_SCU_SRC8 23
150
152
#define R8A7793_CLK_SCU_SRC7 24