tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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[IA64] MCA/INIT: remove the physical mode path from minstate.h

Remove the physical mode path from minstate.h.

Signed-off-by: Keith Owens <kaos@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>

authored by Keith Owens and committed by Tony Luck 05f335ea 7f613c7d

+18 -71
unified split
-1
arch/ia64/kernel/ivt.S
··· 69 69 # define DBG_FAULT(i) 70 70 #endif 71 71 72 - #define MINSTATE_VIRT /* needed by minstate.h */ 73 72 #include "minstate.h" 74 73 75 74 #define FAULT(n) \
+18 -70
arch/ia64/kernel/minstate.h
··· 5 5 #include "entry.h" 6 6 7 7 /* 8 - * For ivt.s we want to access the stack virtually so we don't have to disable translation 9 - * on interrupts. 10 - * 11 - * On entry: 12 - * r1: pointer to current task (ar.k6) 13 - */ 14 - #define MINSTATE_START_SAVE_MIN_VIRT \ 15 - (pUStk) mov ar.rsc=0; /* set enforced lazy mode, pl 0, little-endian, loadrs=0 */ \ 16 - ;; \ 17 - (pUStk) mov.m r24=ar.rnat; \ 18 - (pUStk) addl r22=IA64_RBS_OFFSET,r1; /* compute base of RBS */ \ 19 - (pKStk) mov r1=sp; /* get sp */ \ 20 - ;; \ 21 - (pUStk) lfetch.fault.excl.nt1 [r22]; \ 22 - (pUStk) addl r1=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r1; /* compute base of memory stack */ \ 23 - (pUStk) mov r23=ar.bspstore; /* save ar.bspstore */ \ 24 - ;; \ 25 - (pUStk) mov ar.bspstore=r22; /* switch to kernel RBS */ \ 26 - (pKStk) addl r1=-IA64_PT_REGS_SIZE,r1; /* if in kernel mode, use sp (r12) */ \ 27 - ;; \ 28 - (pUStk) mov r18=ar.bsp; \ 29 - (pUStk) mov ar.rsc=0x3; /* set eager mode, pl 0, little-endian, loadrs=0 */ 30 - 31 - #define MINSTATE_END_SAVE_MIN_VIRT \ 32 - bsw.1; /* switch back to bank 1 (must be last in insn group) */ \ 33 - ;; 34 - 35 - /* 36 - * For mca_asm.S we want to access the stack physically since the state is saved before we 37 - * go virtual and don't want to destroy the iip or ipsr. 38 - */ 39 - #define MINSTATE_START_SAVE_MIN_PHYS \ 40 - (pKStk) mov r3=IA64_KR(PER_CPU_DATA);; \ 41 - (pKStk) addl r3=THIS_CPU(ia64_mca_data),r3;; \ 42 - (pKStk) ld8 r3 = [r3];; \ 43 - (pKStk) addl r3=IA64_MCA_CPU_INIT_STACK_OFFSET,r3;; \ 44 - (pKStk) addl r1=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r3; \ 45 - (pUStk) mov ar.rsc=0; /* set enforced lazy mode, pl 0, little-endian, loadrs=0 */ \ 46 - (pUStk) addl r22=IA64_RBS_OFFSET,r1; /* compute base of register backing store */ \ 47 - ;; \ 48 - (pUStk) mov r24=ar.rnat; \ 49 - (pUStk) addl r1=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r1; /* compute base of memory stack */ \ 50 - (pUStk) mov r23=ar.bspstore; /* save ar.bspstore */ \ 51 - (pUStk) dep r22=-1,r22,61,3; /* compute kernel virtual addr of RBS */ \ 52 - ;; \ 53 - (pUStk) mov ar.bspstore=r22; /* switch to kernel RBS */ \ 54 - ;; \ 55 - (pUStk) mov r18=ar.bsp; \ 56 - (pUStk) mov ar.rsc=0x3; /* set eager mode, pl 0, little-endian, loadrs=0 */ \ 57 - 58 - #define MINSTATE_END_SAVE_MIN_PHYS \ 59 - dep r12=-1,r12,61,3; /* make sp a kernel virtual address */ \ 60 - ;; 61 - 62 - #ifdef MINSTATE_VIRT 63 - # define MINSTATE_GET_CURRENT(reg) mov reg=IA64_KR(CURRENT) 64 - # define MINSTATE_START_SAVE_MIN MINSTATE_START_SAVE_MIN_VIRT 65 - # define MINSTATE_END_SAVE_MIN MINSTATE_END_SAVE_MIN_VIRT 66 - #endif 67 - 68 - #ifdef MINSTATE_PHYS 69 - # define MINSTATE_GET_CURRENT(reg) mov reg=IA64_KR(CURRENT);; tpa reg=reg 70 - # define MINSTATE_START_SAVE_MIN MINSTATE_START_SAVE_MIN_PHYS 71 - # define MINSTATE_END_SAVE_MIN MINSTATE_END_SAVE_MIN_PHYS 72 - #endif 73 - 74 - /* 75 8 * DO_SAVE_MIN switches to the kernel stacks (if necessary) and saves 76 9 * the minimum state necessary that allows us to turn psr.ic back 77 10 * on. ··· 30 97 * we can pass interruption state as arguments to a handler. 31 98 */ 32 99 #define DO_SAVE_MIN(COVER,SAVE_IFS,EXTRA) \ 33 - MINSTATE_GET_CURRENT(r16); /* M (or M;;I) */ \ 100 + mov r16=IA64_KR(CURRENT); /* M */ \ 34 101 mov r27=ar.rsc; /* M */ \ 35 102 mov r20=r1; /* A */ \ 36 103 mov r25=ar.unat; /* M */ \ ··· 51 118 SAVE_IFS; \ 52 119 cmp.eq pKStk,pUStk=r0,r17; /* are we in kernel mode already? */ \ 53 120 ;; \ 54 - MINSTATE_START_SAVE_MIN \ 121 + (pUStk) mov ar.rsc=0; /* set enforced lazy mode, pl 0, little-endian, loadrs=0 */ \ 122 + ;; \ 123 + (pUStk) mov.m r24=ar.rnat; \ 124 + (pUStk) addl r22=IA64_RBS_OFFSET,r1; /* compute base of RBS */ \ 125 + (pKStk) mov r1=sp; /* get sp */ \ 126 + ;; \ 127 + (pUStk) lfetch.fault.excl.nt1 [r22]; \ 128 + (pUStk) addl r1=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r1; /* compute base of memory stack */ \ 129 + (pUStk) mov r23=ar.bspstore; /* save ar.bspstore */ \ 130 + ;; \ 131 + (pUStk) mov ar.bspstore=r22; /* switch to kernel RBS */ \ 132 + (pKStk) addl r1=-IA64_PT_REGS_SIZE,r1; /* if in kernel mode, use sp (r12) */ \ 133 + ;; \ 134 + (pUStk) mov r18=ar.bsp; \ 135 + (pUStk) mov ar.rsc=0x3; /* set eager mode, pl 0, little-endian, loadrs=0 */ \ 55 136 adds r17=2*L1_CACHE_BYTES,r1; /* really: biggest cache-line size */ \ 56 137 adds r16=PT(CR_IPSR),r1; \ 57 138 ;; \ ··· 128 181 EXTRA; \ 129 182 movl r1=__gp; /* establish kernel global pointer */ \ 130 183 ;; \ 131 - MINSTATE_END_SAVE_MIN 184 + bsw.1; /* switch back to bank 1 (must be last in insn group) */ \ 185 + ;; 132 186 133 187 /* 134 188 * SAVE_REST saves the remainder of pt_regs (with psr.ic on).