···1+commit e7c570f37384d824cb9725f237920e9691e57269
2+gpg: Signature made Tue 06 Mar 2018 04:52:46 PM PST
3+gpg: using RSA key 00CE76D1834960DFCE886DF8EF4CA1502CCBAB41
4+gpg: issuer "palmer@dabbelt.com"
5+gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [ultimate]
6+gpg: aka "Palmer Dabbelt <palmer@sifive.com>" [ultimate]
7+Author: Palmer Dabbelt <palmer@sifive.com>
8+Date: Thu Mar 1 12:01:06 2018 -0800
9+10+ RISC-V: Add and document the "-mno-relax" option
11+12+ RISC-V relies on aggressive linker relaxation to get good code size. As
13+ a result no text symbol addresses can be known until link time, which
14+ means that alignment must be handled during the link. This alignment
15+ pass is essentially just another linker relaxation, so this has the
16+ unfortunate side effect that linker relaxation is required for
17+ correctness on many RISC-V targets.
18+19+ The RISC-V assembler has supported an ".option norelax" for a long time
20+ because there are situations in which linker relaxation is a bad idea --
21+ the canonical example is when trying to materialize the initial value of
22+ the global pointer into a register, which would otherwise be relaxed to
23+ a NOP. We've been relying on users who want to disable relaxation for
24+ an entire link to pass "-Wl,--no-relax", but that still relies on the
25+ linker relaxing R_RISCV_ALIGN to handle alignment despite it not being
26+ strictly necessary.
27+28+ This patch adds a GCC option, "-mno-relax", that disable linker
29+ relaxation by adding ".option norelax" to the top of every generated
30+ assembly file. The assembler is smart enough to handle alignment at
31+ assemble time for files that have never emitted a relaxable relocation,
32+ so this is sufficient to really disable all relaxations in the linker,
33+ which results in significantly faster link times for large objects.
34+35+ This also has the side effect of allowing toolchains that don't support
36+ linker relaxation (LLVM and the Linux module loader) to function
37+ correctly. Toolchains that don't support linker relaxation should
38+ default to "-mno-relax" and error when presented with any R_RISCV_ALIGN
39+ relocation as those need to be handled for correctness.
40+41+ gcc/ChangeLog
42+43+ 2018-03-01 Palmer Dabbelt <palmer@sifive.com>
44+45+ * config/riscv/riscv.opt (mrelax): New option.
46+ * config/riscv/riscv.c (riscv_file_start): Emit ".option
47+ "norelax" when riscv_mrelax is disabled.
48+ * doc/invoke.texi (RISC-V): Document "-mrelax" and "-mno-relax".
49+50+diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
51+index c38f6c394d54..3e81874de232 100644
52+--- a/gcc/config/riscv/riscv.c
53++++ b/gcc/config/riscv/riscv.c
54+@@ -3979,6 +3979,11 @@ riscv_file_start (void)
55+56+ /* Instruct GAS to generate position-[in]dependent code. */
57+ fprintf (asm_out_file, "\t.option %spic\n", (flag_pic ? "" : "no"));
58++
59++ /* If the user specifies "-mno-relax" on the command line then disable linker
60++ relaxation in the assembler. */
61++ if (! riscv_mrelax)
62++ fprintf (asm_out_file, "\t.option norelax\n");
63+ }
64+65+ /* Implement TARGET_ASM_OUTPUT_MI_THUNK. Generate rtl rather than asm text
66+diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
67+index 581a26bb5c1e..b37ac75d9bb4 100644
68+--- a/gcc/config/riscv/riscv.opt
69++++ b/gcc/config/riscv/riscv.opt
70+@@ -106,6 +106,11 @@ mexplicit-relocs
71+ Target Report Mask(EXPLICIT_RELOCS)
72+ Use %reloc() operators, rather than assembly macros, to load addresses.
73+74++mrelax
75++Target Bool Var(riscv_mrelax) Init(1)
76++Take advantage of linker relaxations to reduce the number of instructions
77++required to materialize symbol addresses.
78++
79+ Mask(64BIT)
80+81+ Mask(MUL)
82+diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
83+index 8d366c626bae..deb48af2ecad 100644
84+--- a/gcc/doc/invoke.texi
85++++ b/gcc/doc/invoke.texi
86+@@ -1042,7 +1042,8 @@ See RS/6000 and PowerPC Options.
87+ -msave-restore -mno-save-restore @gol
88+ -mstrict-align -mno-strict-align @gol
89+ -mcmodel=medlow -mcmodel=medany @gol
90+--mexplicit-relocs -mno-explicit-relocs @gol}
91++-mexplicit-relocs -mno-explicit-relocs @gol
92++-mrelax -mno-relax @gol}
93+94+ @emph{RL78 Options}
95+ @gccoptlist{-msim -mmul=none -mmul=g13 -mmul=g14 -mallregs @gol
96+@@ -23102,6 +23103,12 @@ Use or do not use assembler relocation operators when dealing with symbolic
97+ addresses. The alternative is to use assembler macros instead, which may
98+ limit optimization.
99+100++@item -mrelax
101++@itemx -mno-relax
102++Take advantage of linker relaxations to reduce the number of instructions
103++required to materialize symbol addresses. The default is to take advantage of
104++linker relaxations.
105++
106+ @end table
107+108+ @node RL78 Options
109+