···11+commit e7c570f37384d824cb9725f237920e9691e57269
22+gpg: Signature made Tue 06 Mar 2018 04:52:46 PM PST
33+gpg: using RSA key 00CE76D1834960DFCE886DF8EF4CA1502CCBAB41
44+gpg: issuer "palmer@dabbelt.com"
55+gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [ultimate]
66+gpg: aka "Palmer Dabbelt <palmer@sifive.com>" [ultimate]
77+Author: Palmer Dabbelt <palmer@sifive.com>
88+Date: Thu Mar 1 12:01:06 2018 -0800
99+1010+ RISC-V: Add and document the "-mno-relax" option
1111+1212+ RISC-V relies on aggressive linker relaxation to get good code size. As
1313+ a result no text symbol addresses can be known until link time, which
1414+ means that alignment must be handled during the link. This alignment
1515+ pass is essentially just another linker relaxation, so this has the
1616+ unfortunate side effect that linker relaxation is required for
1717+ correctness on many RISC-V targets.
1818+1919+ The RISC-V assembler has supported an ".option norelax" for a long time
2020+ because there are situations in which linker relaxation is a bad idea --
2121+ the canonical example is when trying to materialize the initial value of
2222+ the global pointer into a register, which would otherwise be relaxed to
2323+ a NOP. We've been relying on users who want to disable relaxation for
2424+ an entire link to pass "-Wl,--no-relax", but that still relies on the
2525+ linker relaxing R_RISCV_ALIGN to handle alignment despite it not being
2626+ strictly necessary.
2727+2828+ This patch adds a GCC option, "-mno-relax", that disable linker
2929+ relaxation by adding ".option norelax" to the top of every generated
3030+ assembly file. The assembler is smart enough to handle alignment at
3131+ assemble time for files that have never emitted a relaxable relocation,
3232+ so this is sufficient to really disable all relaxations in the linker,
3333+ which results in significantly faster link times for large objects.
3434+3535+ This also has the side effect of allowing toolchains that don't support
3636+ linker relaxation (LLVM and the Linux module loader) to function
3737+ correctly. Toolchains that don't support linker relaxation should
3838+ default to "-mno-relax" and error when presented with any R_RISCV_ALIGN
3939+ relocation as those need to be handled for correctness.
4040+4141+ gcc/ChangeLog
4242+4343+ 2018-03-01 Palmer Dabbelt <palmer@sifive.com>
4444+4545+ * config/riscv/riscv.opt (mrelax): New option.
4646+ * config/riscv/riscv.c (riscv_file_start): Emit ".option
4747+ "norelax" when riscv_mrelax is disabled.
4848+ * doc/invoke.texi (RISC-V): Document "-mrelax" and "-mno-relax".
4949+5050+diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
5151+index c38f6c394d54..3e81874de232 100644
5252+--- a/gcc/config/riscv/riscv.c
5353++++ b/gcc/config/riscv/riscv.c
5454+@@ -3979,6 +3979,11 @@ riscv_file_start (void)
5555+5656+ /* Instruct GAS to generate position-[in]dependent code. */
5757+ fprintf (asm_out_file, "\t.option %spic\n", (flag_pic ? "" : "no"));
5858++
5959++ /* If the user specifies "-mno-relax" on the command line then disable linker
6060++ relaxation in the assembler. */
6161++ if (! riscv_mrelax)
6262++ fprintf (asm_out_file, "\t.option norelax\n");
6363+ }
6464+6565+ /* Implement TARGET_ASM_OUTPUT_MI_THUNK. Generate rtl rather than asm text
6666+diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
6767+index 581a26bb5c1e..b37ac75d9bb4 100644
6868+--- a/gcc/config/riscv/riscv.opt
6969++++ b/gcc/config/riscv/riscv.opt
7070+@@ -106,6 +106,11 @@ mexplicit-relocs
7171+ Target Report Mask(EXPLICIT_RELOCS)
7272+ Use %reloc() operators, rather than assembly macros, to load addresses.
7373+7474++mrelax
7575++Target Bool Var(riscv_mrelax) Init(1)
7676++Take advantage of linker relaxations to reduce the number of instructions
7777++required to materialize symbol addresses.
7878++
7979+ Mask(64BIT)
8080+8181+ Mask(MUL)
8282+diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
8383+index 8d366c626bae..deb48af2ecad 100644
8484+--- a/gcc/doc/invoke.texi
8585++++ b/gcc/doc/invoke.texi
8686+@@ -1042,7 +1042,8 @@ See RS/6000 and PowerPC Options.
8787+ -msave-restore -mno-save-restore @gol
8888+ -mstrict-align -mno-strict-align @gol
8989+ -mcmodel=medlow -mcmodel=medany @gol
9090+--mexplicit-relocs -mno-explicit-relocs @gol}
9191++-mexplicit-relocs -mno-explicit-relocs @gol
9292++-mrelax -mno-relax @gol}
9393+9494+ @emph{RL78 Options}
9595+ @gccoptlist{-msim -mmul=none -mmul=g13 -mmul=g14 -mallregs @gol
9696+@@ -23102,6 +23103,12 @@ Use or do not use assembler relocation operators when dealing with symbolic
9797+ addresses. The alternative is to use assembler macros instead, which may
9898+ limit optimization.
9999+100100++@item -mrelax
101101++@itemx -mno-relax
102102++Take advantage of linker relaxations to reduce the number of instructions
103103++required to materialize symbol addresses. The default is to take advantage of
104104++linker relaxations.
105105++
106106+ @end table
107107+108108+ @node RL78 Options
109109+