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OR-1 dataflow CPU sketch
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at pe-frame-redesign 3 folders 30 files
Orual design notes pulled in
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datasheets
images
papers
Design.md
PE-block-diagram.excalidraw.md
PE-flow-diagram.excalidraw.md
alu-and-output-design.md
architectural-positioning.md
architecture-overview.md
assembler-architecture.md
bus-architecture-and-width-decoupling.md
bus-interconnect-design.md
ccu-inter-cluster-routing.md
design-alternatives.md
dfasm-primer.md
em4-analysis.md
flow-control.excalidraw.md
frame-lanes-for-concurrent-matching.md
graph-instruction-repr.md
historical-plausibility.md
io-and-bootstrap.md
iram-and-function-calls.md
loop-patterns-and-flow-control.md
network-and-communication.md
pe-design.md
pe-pipelining-and-multiplexing.md
pe-redesign-discussion-summary.md
pe-redesign-frames-and-pipeline.md
sm-and-token-format-discussion.md
sm-design.md
sources-doc.md
sram-availability.md
syntax-sketch.md