Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

arm64: dts: mt8183: Add kukui kodama board

kodama is also known as Lenovo 10e Chromebook Tablet.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210331091327.1198529-4-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

authored by

Hsin-Yi Wang and committed by
Matthias Brugger
ff33d889 d1eaf77f

+431
+4
arch/arm64/boot/dts/mediatek/Makefile
··· 16 16 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb 17 17 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb 18 18 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb 19 + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku16.dtb 20 + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku272.dtb 21 + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku288.dtb 22 + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku32.dtb 19 23 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb 20 24 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb 21 25 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb
+21
arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku16.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 + /* 3 + * Copyright 2021 Google LLC 4 + * 5 + * SKU: 0x10 => 16 6 + * - bit 8: Camera: 0 (OV5695) 7 + * - bits 7..4: Panel ID: 0x1 (AUO) 8 + */ 9 + 10 + /dts-v1/; 11 + #include "mt8183-kukui-kodama.dtsi" 12 + 13 + / { 14 + model = "MediaTek kodama sku16 board"; 15 + compatible = "google,kodama-sku16", "google,kodama", "mediatek,mt8183"; 16 + }; 17 + 18 + &panel { 19 + status = "okay"; 20 + compatible = "auo,b101uan08.3"; 21 + };
+21
arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku272.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 + /* 3 + * Copyright 2020 Google LLC 4 + * 5 + * SKU: 0x110 => 272 6 + * - bit 8: Camera: 1 (GC5035) 7 + * - bits 7..4: Panel ID: 0x1 (AUO) 8 + */ 9 + 10 + /dts-v1/; 11 + #include "mt8183-kukui-kodama.dtsi" 12 + 13 + / { 14 + model = "MediaTek kodama sku272 board"; 15 + compatible = "google,kodama-sku272", "google,kodama", "mediatek,mt8183"; 16 + }; 17 + 18 + &panel { 19 + status = "okay"; 20 + compatible = "auo,b101uan08.3"; 21 + };
+21
arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku288.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 + /* 3 + * Copyright 2020 Google LLC 4 + * 5 + * SKU: 0x120 => 288 6 + * - bit 8: Camera: 1 (GC5035) 7 + * - bits 7..4: Panel ID: 0x2 (BOE) 8 + */ 9 + 10 + /dts-v1/; 11 + #include "mt8183-kukui-kodama.dtsi" 12 + 13 + / { 14 + model = "MediaTek kodama sku288 board"; 15 + compatible = "google,kodama-sku288", "google,kodama", "mediatek,mt8183"; 16 + }; 17 + 18 + &panel { 19 + status = "okay"; 20 + compatible = "boe,tv101wum-n53"; 21 + };
+21
arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku32.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 + /* 3 + * Copyright 2021 Google LLC 4 + * 5 + * SKU: 0x20 => 32 6 + * - bit 8: Camera: 0 (OV5695) 7 + * - bits 7..4: Panel ID: 0x2 (BOE) 8 + */ 9 + 10 + /dts-v1/; 11 + #include "mt8183-kukui-kodama.dtsi" 12 + 13 + / { 14 + model = "MediaTek kodama sku32 board"; 15 + compatible = "google,kodama-sku32", "google,kodama", "mediatek,mt8183"; 16 + }; 17 + 18 + &panel { 19 + status = "okay"; 20 + compatible = "boe,tv101wum-n53"; 21 + };
+343
arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi
··· 1 + // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 + /* 3 + * Copyright 2021 Google LLC 4 + */ 5 + 6 + /dts-v1/; 7 + #include "mt8183-kukui.dtsi" 8 + 9 + / { 10 + ppvarn_lcd: ppvarn-lcd { 11 + compatible = "regulator-fixed"; 12 + regulator-name = "ppvarn_lcd"; 13 + pinctrl-names = "default"; 14 + pinctrl-0 = <&ppvarn_lcd_en>; 15 + 16 + enable-active-high; 17 + 18 + gpio = <&pio 66 GPIO_ACTIVE_HIGH>; 19 + }; 20 + 21 + ppvarp_lcd: ppvarp-lcd { 22 + compatible = "regulator-fixed"; 23 + regulator-name = "ppvarp_lcd"; 24 + pinctrl-names = "default"; 25 + pinctrl-0 = <&ppvarp_lcd_en>; 26 + 27 + enable-active-high; 28 + 29 + gpio = <&pio 166 GPIO_ACTIVE_HIGH>; 30 + }; 31 + 32 + pp1800_lcd: pp1800-lcd { 33 + compatible = "regulator-fixed"; 34 + regulator-name = "pp1800_lcd"; 35 + pinctrl-names = "default"; 36 + pinctrl-0 = <&pp1800_lcd_en>; 37 + 38 + enable-active-high; 39 + 40 + gpio = <&pio 36 GPIO_ACTIVE_HIGH>; 41 + }; 42 + }; 43 + 44 + &i2c0 { 45 + status = "okay"; 46 + 47 + touchscreen: touchscreen@10 { 48 + compatible = "hid-over-i2c"; 49 + reg = <0x10>; 50 + interrupt-parent = <&pio>; 51 + interrupts = <155 IRQ_TYPE_LEVEL_LOW>; 52 + pinctrl-names = "default"; 53 + pinctrl-0 = <&touch_default>; 54 + 55 + post-power-on-delay-ms = <10>; 56 + hid-descr-addr = <0x0001>; 57 + }; 58 + }; 59 + 60 + &i2c2 { 61 + pinctrl-names = "default"; 62 + pinctrl-0 = <&i2c2_pins>; 63 + status = "okay"; 64 + clock-frequency = <400000>; 65 + 66 + eeprom@58 { 67 + compatible = "atmel,24c64"; 68 + reg = <0x58>; 69 + pagesize = <32>; 70 + }; 71 + }; 72 + 73 + &i2c4 { 74 + pinctrl-names = "default"; 75 + pinctrl-0 = <&i2c4_pins>; 76 + status = "okay"; 77 + clock-frequency = <400000>; 78 + 79 + eeprom@54 { 80 + compatible = "atmel,24c64"; 81 + reg = <0x54>; 82 + pagesize = <32>; 83 + }; 84 + }; 85 + 86 + &mt6358_vcama2_reg { 87 + regulator-min-microvolt = <2800000>; 88 + regulator-max-microvolt = <2800000>; 89 + }; 90 + 91 + &pio { 92 + /* 192 lines */ 93 + gpio-line-names = 94 + "SPI_AP_EC_CS_L", 95 + "SPI_AP_EC_MOSI", 96 + "SPI_AP_EC_CLK", 97 + "I2S3_DO", 98 + "USB_PD_INT_ODL", 99 + "", 100 + "", 101 + "", 102 + "", 103 + "IT6505_HPD_L", 104 + "I2S3_TDM_D3", 105 + "SOC_I2C6_1V8_SCL", 106 + "SOC_I2C6_1V8_SDA", 107 + "DPI_D0", 108 + "DPI_D1", 109 + "DPI_D2", 110 + "DPI_D3", 111 + "DPI_D4", 112 + "DPI_D5", 113 + "DPI_D6", 114 + "DPI_D7", 115 + "DPI_D8", 116 + "DPI_D9", 117 + "DPI_D10", 118 + "DPI_D11", 119 + "DPI_HSYNC", 120 + "DPI_VSYNC", 121 + "DPI_DE", 122 + "DPI_CK", 123 + "AP_MSDC1_CLK", 124 + "AP_MSDC1_DAT3", 125 + "AP_MSDC1_CMD", 126 + "AP_MSDC1_DAT0", 127 + "AP_MSDC1_DAT2", 128 + "AP_MSDC1_DAT1", 129 + "", 130 + "", 131 + "", 132 + "", 133 + "", 134 + "", 135 + "OTG_EN", 136 + "DRVBUS", 137 + "DISP_PWM", 138 + "DSI_TE", 139 + "LCM_RST_1V8", 140 + "AP_CTS_WIFI_RTS", 141 + "AP_RTS_WIFI_CTS", 142 + "SOC_I2C5_1V8_SCL", 143 + "SOC_I2C5_1V8_SDA", 144 + "SOC_I2C3_1V8_SCL", 145 + "SOC_I2C3_1V8_SDA", 146 + "", 147 + "", 148 + "", 149 + "", 150 + "", 151 + "", 152 + "", 153 + "", 154 + "", 155 + "", 156 + "", 157 + "", 158 + "", 159 + "", 160 + "", 161 + "", 162 + "", 163 + "", 164 + "", 165 + "", 166 + "", 167 + "", 168 + "", 169 + "", 170 + "", 171 + "", 172 + "", 173 + "", 174 + "", 175 + "SOC_I2C1_1V8_SDA", 176 + "SOC_I2C0_1V8_SDA", 177 + "SOC_I2C0_1V8_SCL", 178 + "SOC_I2C1_1V8_SCL", 179 + "AP_SPI_H1_MISO", 180 + "AP_SPI_H1_CS_L", 181 + "AP_SPI_H1_MOSI", 182 + "AP_SPI_H1_CLK", 183 + "I2S5_BCK", 184 + "I2S5_LRCK", 185 + "I2S5_DO", 186 + "BOOTBLOCK_EN_L", 187 + "MT8183_KPCOL0", 188 + "SPI_AP_EC_MISO", 189 + "UART_DBG_TX_AP_RX", 190 + "UART_AP_TX_DBG_RX", 191 + "I2S2_MCK", 192 + "I2S2_BCK", 193 + "CLK_5M_WCAM", 194 + "CLK_2M_UCAM", 195 + "I2S2_LRCK", 196 + "I2S2_DI", 197 + "SOC_I2C2_1V8_SCL", 198 + "SOC_I2C2_1V8_SDA", 199 + "SOC_I2C4_1V8_SCL", 200 + "SOC_I2C4_1V8_SDA", 201 + "", 202 + "SCL8", 203 + "SDA8", 204 + "FCAM_PWDN_L", 205 + "", 206 + "", 207 + "", 208 + "", 209 + "", 210 + "", 211 + "", 212 + "", 213 + "", 214 + "", 215 + "", 216 + "", 217 + "", 218 + "", 219 + "", 220 + "", 221 + "", 222 + "", 223 + "", 224 + "", 225 + "", 226 + "", 227 + "", 228 + "", 229 + "", 230 + "I2S_PMIC", 231 + "I2S_PMIC", 232 + "I2S_PMIC", 233 + "I2S_PMIC", 234 + "I2S_PMIC", 235 + "I2S_PMIC", 236 + "I2S_PMIC", 237 + "I2S_PMIC", 238 + "", 239 + "", 240 + "", 241 + "", 242 + "", 243 + "", 244 + /* 245 + * AP_FLASH_WP_L is crossystem ABI. Rev1 schematics 246 + * call it BIOS_FLASH_WP_R_L. 247 + */ 248 + "AP_FLASH_WP_L", 249 + "EC_AP_INT_ODL", 250 + "IT6505_INT_ODL", 251 + "H1_INT_OD_L", 252 + "", 253 + "", 254 + "", 255 + "", 256 + "", 257 + "", 258 + "", 259 + "AP_SPI_FLASH_MISO", 260 + "AP_SPI_FLASH_CS_L", 261 + "AP_SPI_FLASH_MOSI", 262 + "AP_SPI_FLASH_CLK", 263 + "DA7219_IRQ", 264 + "", 265 + "", 266 + "", 267 + "", 268 + "", 269 + "", 270 + "", 271 + "", 272 + "", 273 + "", 274 + "", 275 + "", 276 + "", 277 + "", 278 + "", 279 + "", 280 + "", 281 + "", 282 + "", 283 + "", 284 + "", 285 + "", 286 + "", 287 + "", 288 + "", 289 + ""; 290 + 291 + ppvarp_lcd_en: ppvarp-lcd-en { 292 + pins1 { 293 + pinmux = <PINMUX_GPIO66__FUNC_GPIO66>; 294 + output-low; 295 + }; 296 + }; 297 + 298 + ppvarn_lcd_en: ppvarn-lcd-en { 299 + pins1 { 300 + pinmux = <PINMUX_GPIO166__FUNC_GPIO166>; 301 + output-low; 302 + }; 303 + }; 304 + 305 + pp1800_lcd_en: pp1800-lcd-en { 306 + pins1 { 307 + pinmux = <PINMUX_GPIO36__FUNC_GPIO36>; 308 + output-low; 309 + }; 310 + }; 311 + 312 + touch_default: touchdefault { 313 + pin_irq { 314 + pinmux = <PINMUX_GPIO155__FUNC_GPIO155>; 315 + input-enable; 316 + bias-pull-up; 317 + }; 318 + 319 + touch_pin_reset: pin_reset { 320 + pinmux = <PINMUX_GPIO156__FUNC_GPIO156>; 321 + 322 + /* 323 + * The touchscreen driver doesn't currently support driving 324 + * this reset line. By specifying output-high here 325 + * we're relying on the fact that this pin has a default 326 + * pulldown at boot (which makes sure the controller was in 327 + * reset if it was powered) and then we set it high here 328 + * to take it out of reset. Better would be if the touchscreen 329 + * driver could control this and we could remove 330 + * "output-high" here. 331 + */ 332 + output-high; 333 + }; 334 + }; 335 + }; 336 + 337 + &qca_wifi { 338 + qcom,ath10k-calibration-variant = "GO_KODAMA"; 339 + }; 340 + 341 + &i2c_tunnel { 342 + google,remote-bus = <2>; 343 + };