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powerpc: Fix goof in 6xx and POWER4 idle power-save functions

This fixes a mistake I made when editing these functions - when I
took out the interrupt disabling code (because interrupts are now
disabled by the caller) I left the register that is used for the MSR
value to be used during doze/nap uninitialized. This fixes it.

Also updated some of the comments in idle_power4.S and removed some
code that was copied over from idle_6xx.S but is no longer relevant
(we don't ever clear the CPU_FTR_CAN_NAP bit at runtime for POWER4).

Signed-off-by: Paul Mackerras <paulus@samba.org>

Paul Mackerras ff2e6d7e 9618edab

+5 -21
+2 -1
arch/powerpc/kernel/idle_6xx.S
··· 144 144 DSSALL 145 145 sync 146 146 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) 147 - ori r7,r7,MSR_EE /* Could be ommited (already set) */ 147 + mfmsr r7 148 + ori r7,r7,MSR_EE 148 149 oris r7,r7,MSR_POW@h 149 150 sync 150 151 isync
+3 -20
arch/powerpc/kernel/idle_power4.S
··· 1 1 /* 2 - * This file contains the power_save function for 6xx & 7xxx CPUs 3 - * rewritten in assembler 4 - * 5 - * Warning ! This code assumes that if your machine has a 750fx 6 - * it will have PLL 1 set to low speed mode (used during NAP/DOZE). 7 - * if this is not the case some additional changes will have to 8 - * be done to check a runtime var (a bit like powersave-nap) 2 + * This file contains the power_save function for 970-family CPUs. 9 3 * 10 4 * This program is free software; you can redistribute it and/or 11 5 * modify it under the terms of the GNU General Public License ··· 20 26 21 27 .text 22 28 23 - /* 24 - * Here is the power_save_6xx function. This could eventually be 25 - * split into several functions & changing the function pointer 26 - * depending on the various features. 27 - */ 28 29 _GLOBAL(power4_idle) 29 30 BEGIN_FTR_SECTION 30 31 blr 31 32 END_FTR_SECTION_IFCLR(CPU_FTR_CAN_NAP) 32 - /* We must dynamically check for the NAP feature as it 33 - * can be cleared by CPU init after the fixups are done 34 - */ 35 - LOAD_REG_ADDRBASE(r3,cur_cpu_spec) 36 - ld r4,ADDROFF(cur_cpu_spec)(r3) 37 - ld r4,CPU_SPEC_FEATURES(r4) 38 - andi. r0,r4,CPU_FTR_CAN_NAP 39 - beqlr 40 33 /* Now check if user or arch enabled NAP mode */ 41 34 LOAD_REG_ADDRBASE(r3,powersave_nap) 42 35 lwz r4,ADDROFF(powersave_nap)(r3) ··· 35 54 DSSALL 36 55 sync 37 56 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) 57 + mfmsr r7 58 + ori r7,r7,MSR_EE 38 59 oris r7,r7,MSR_POW@h 39 60 sync 40 61 isync