Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
os
linux
[MIPS] Ocelot 3: Fix MAC address detection after platform_device conversion.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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arch/mips/momentum/ocelot_3/Makefile
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arch/mips/momentum/ocelot_3/Makefile
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arch/mips/momentum/ocelot_3/platform.c
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arch/mips/momentum/ocelot_3/platform.c
···
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#include <linux/delay.h>
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#include <linux/if_ether.h>
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#include <linux/ioport.h>
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#include <linux/mv643xx.h>
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#include <linux/platform_device.h>
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#include "ocelot_3_fpga.h"
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#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE)
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static struct resource mv643xx_eth_shared_resources[] = {
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[0] = {
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.name = "ethernet shared base",
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.start = 0xf1000000 + MV643XX_ETH_SHARED_REGS,
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.end = 0xf1000000 + MV643XX_ETH_SHARED_REGS +
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MV643XX_ETH_SHARED_REGS_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device mv643xx_eth_shared_device = {
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.name = MV643XX_ETH_SHARED_NAME,
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.id = 0,
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.num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources),
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.resource = mv643xx_eth_shared_resources,
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};
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#define MV_SRAM_BASE 0xfe000000UL
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#define MV_SRAM_SIZE (256 * 1024)
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#define MV_SRAM_RXRING_SIZE (MV_SRAM_SIZE / 4)
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#define MV_SRAM_TXRING_SIZE (MV_SRAM_SIZE / 4)
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#define MV_SRAM_BASE_ETH0 MV_SRAM_BASE
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#define MV_SRAM_BASE_ETH1 (MV_SRAM_BASE + (MV_SRAM_SIZE / 2))
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#define MV64x60_IRQ_ETH_0 48
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#define MV64x60_IRQ_ETH_1 49
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#define MV64x60_IRQ_ETH_2 50
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#ifdef CONFIG_MV643XX_ETH_0
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static struct resource mv64x60_eth0_resources[] = {
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[0] = {
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.name = "eth0 irq",
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.start = MV64x60_IRQ_ETH_0,
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.end = MV64x60_IRQ_ETH_0,
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.flags = IORESOURCE_IRQ,
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},
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};
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static char eth0_mac_addr[ETH_ALEN];
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static struct mv643xx_eth_platform_data eth0_pd = {
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.mac_addr = eth0_mac_addr,
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.tx_sram_addr = MV_SRAM_BASE_ETH0,
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.tx_sram_size = MV_SRAM_TXRING_SIZE,
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.tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
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.rx_sram_addr = MV_SRAM_BASE_ETH0 + MV_SRAM_TXRING_SIZE,
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.rx_sram_size = MV_SRAM_RXRING_SIZE,
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.rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
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};
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static struct platform_device eth0_device = {
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.name = MV643XX_ETH_NAME,
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.id = 0,
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.num_resources = ARRAY_SIZE(mv64x60_eth0_resources),
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.resource = mv64x60_eth0_resources,
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.dev = {
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.platform_data = ð0_pd,
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},
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};
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#endif /* CONFIG_MV643XX_ETH_0 */
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#ifdef CONFIG_MV643XX_ETH_1
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static struct resource mv64x60_eth1_resources[] = {
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[0] = {
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.name = "eth1 irq",
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.start = MV64x60_IRQ_ETH_1,
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.end = MV64x60_IRQ_ETH_1,
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.flags = IORESOURCE_IRQ,
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},
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};
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static char eth1_mac_addr[ETH_ALEN];
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static struct mv643xx_eth_platform_data eth1_pd = {
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.mac_addr = eth1_mac_addr,
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.tx_sram_addr = MV_SRAM_BASE_ETH1,
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.tx_sram_size = MV_SRAM_TXRING_SIZE,
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.tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
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.rx_sram_addr = MV_SRAM_BASE_ETH1 + MV_SRAM_TXRING_SIZE,
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.rx_sram_size = MV_SRAM_RXRING_SIZE,
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.rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
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};
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static struct platform_device eth1_device = {
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.name = MV643XX_ETH_NAME,
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.id = 1,
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.num_resources = ARRAY_SIZE(mv64x60_eth1_resources),
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.resource = mv64x60_eth1_resources,
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.dev = {
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.platform_data = ð1_pd,
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},
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};
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#endif /* CONFIG_MV643XX_ETH_1 */
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#ifdef CONFIG_MV643XX_ETH_2
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static struct resource mv64x60_eth2_resources[] = {
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[0] = {
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.name = "eth2 irq",
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.start = MV64x60_IRQ_ETH_2,
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.end = MV64x60_IRQ_ETH_2,
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.flags = IORESOURCE_IRQ,
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},
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};
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static char eth2_mac_addr[ETH_ALEN];
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static struct mv643xx_eth_platform_data eth2_pd = {
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.mac_addr = eth2_mac_addr,
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};
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static struct platform_device eth2_device = {
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.name = MV643XX_ETH_NAME,
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.id = 1,
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.num_resources = ARRAY_SIZE(mv64x60_eth2_resources),
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.resource = mv64x60_eth2_resources,
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.dev = {
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.platform_data = ð2_pd,
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},
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};
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#endif /* CONFIG_MV643XX_ETH_2 */
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static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
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&mv643xx_eth_shared_device,
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#ifdef CONFIG_MV643XX_ETH_0
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ð0_device,
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#endif
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#ifdef CONFIG_MV643XX_ETH_1
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ð1_device,
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#endif
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#ifdef CONFIG_MV643XX_ETH_2
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ð2_device,
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#endif
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};
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static u8 __init exchange_bit(u8 val, u8 cs)
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{
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/* place the data */
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OCELOT_FPGA_WRITE((val << 2) | cs, EEPROM_MODE);
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udelay(1);
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/* turn the clock on */
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OCELOT_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE);
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udelay(1);
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/* turn the clock off and read-strobe */
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OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
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/* return the data */
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return (OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1;
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}
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static void __init get_mac(char dest[6])
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{
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u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
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int i,j;
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for (i = 0; i < 12; i++)
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exchange_bit(read_opcode[i], 1);
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for (j = 0; j < 6; j++) {
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dest[j] = 0;
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for (i = 0; i < 8; i++) {
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dest[j] <<= 1;
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dest[j] |= exchange_bit(0, 1);
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}
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}
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/* turn off CS */
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exchange_bit(0,0);
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}
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/*
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* Copy and increment ethernet MAC address by a small value.
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*
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* This is useful for systems where the only one MAC address is stored in
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* non-volatile memory for multiple ports.
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*/
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static inline void eth_mac_add(unsigned char *dst, unsigned char *src,
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unsigned int add)
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{
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int i;
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BUG_ON(add >= 256);
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for (i = ETH_ALEN; i >= 0; i--) {
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dst[i] = src[i] + add;
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add = dst[i] < src[i]; /* compute carry */
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}
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WARN_ON(add);
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}
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static int __init mv643xx_eth_add_pds(void)
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{
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unsigned char mac[ETH_ALEN];
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int ret;
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get_mac(mac);
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#ifdef CONFIG_MV643XX_ETH_0
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eth_mac_add(eth1_mac_addr, mac, 0);
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#endif
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#ifdef CONFIG_MV643XX_ETH_1
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eth_mac_add(eth1_mac_addr, mac, 1);
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#endif
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#ifdef CONFIG_MV643XX_ETH_2
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eth_mac_add(eth2_mac_addr, mac, 2);
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#endif
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ret = platform_add_devices(mv643xx_eth_pd_devs,
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ARRAY_SIZE(mv643xx_eth_pd_devs));
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return ret;
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}
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device_initcall(mv643xx_eth_add_pds);
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#endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */
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arch/mips/momentum/ocelot_3/prom.c
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arch/mips/momentum/ocelot_3/prom.c
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extern unsigned long marvell_base;
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extern unsigned long cpu_clock;
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#ifdef CONFIG_MV643XX_ETH
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extern unsigned char prom_mac_addr_base[6];
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#endif
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const char *get_system_type(void)
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{
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return "Momentum Ocelot-3";
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}
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#ifdef CONFIG_MV643XX_ETH
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void burn_clocks(void)
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{
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int i;
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/* this loop should burn at least 1us -- this should be plenty */
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for (i = 0; i < 0x10000; i++)
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;
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}
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u8 exchange_bit(u8 val, u8 cs)
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{
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/* place the data */
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OCELOT_FPGA_WRITE((val << 2) | cs, EEPROM_MODE);
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burn_clocks();
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/* turn the clock on */
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OCELOT_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE);
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burn_clocks();
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/* turn the clock off and read-strobe */
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OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
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/* return the data */
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return ((OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1);
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}
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void get_mac(char dest[6])
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{
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u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
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int i,j;
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for (i = 0; i < 12; i++)
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exchange_bit(read_opcode[i], 1);
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for (j = 0; j < 6; j++) {
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dest[j] = 0;
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for (i = 0; i < 8; i++) {
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dest[j] <<= 1;
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dest[j] |= exchange_bit(0, 1);
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}
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}
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/* turn off CS */
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exchange_bit(0,0);
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}
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#endif
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#ifdef CONFIG_64BIT
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···
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mips_machgroup = MACH_GROUP_MOMENCO;
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mips_machtype = MACH_MOMENCO_OCELOT_3;
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#ifdef CONFIG_MV643XX_ETH
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/* get the base MAC address for on-board ethernet ports */
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get_mac(prom_mac_addr_base);
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#endif
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#ifndef CONFIG_64BIT
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debug_vectors->printf("Booting Linux kernel...\n");
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arch/mips/momentum/ocelot_3/setup.c
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arch/mips/momentum/ocelot_3/setup.c
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* BRIEF MODULE DESCRIPTION
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* Momentum Computer Ocelot-3 board dependent boot routines
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*
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* Copyright (C) 1996, 1997, 01, 05 Ralf Baechle
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* Copyright (C) 1996, 1997, 01, 05 - 06 Ralf Baechle
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* Copyright (C) 2000 RidgeRun, Inc.
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* Copyright (C) 2001 Red Hat, Inc.
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* Copyright (C) 2002 Momentum Computer