qlcnic: change all P3 references to P3P

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

This patch just rename all P3 #define to P3P.

Signed-off-by: Sritej Velaga <sritej.velaga@qlogic.com>
Signed-off-by: Amit Kumar Salecha <amit.salecha@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

authored by

Sritej Velaga and committed by

David S. Miller 15 years ago ff1b1bf8 ee07c1a7

+71 -71

5 changed files

expand all

drivers

net

qlcnic

qlcnic.h

qlcnic_ethtool.c

qlcnic_hdr.h

qlcnic_hw.c

qlcnic_init.c

+19 -19

drivers/net/qlcnic/qlcnic.h

··· 94 94 #define FIRST_PAGE_GROUP_START 0 95 95 #define FIRST_PAGE_GROUP_END 0x100000 96 96 97 - #define P3_MAX_MTU (9600) 98 - #define P3_MIN_MTU (68) 97 + #define P3P_MAX_MTU (9600) 98 + #define P3P_MIN_MTU (68) 99 99 #define QLCNIC_MAX_ETHERHDR 32 /* This contains some padding */ 100 100 101 - #define QLCNIC_P3_RX_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + ETH_DATA_LEN) 102 - #define QLCNIC_P3_RX_JUMBO_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + P3_MAX_MTU) 101 + #define QLCNIC_P3P_RX_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + ETH_DATA_LEN) 102 + #define QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + P3P_MAX_MTU) 103 103 #define QLCNIC_CT_DEFAULT_RX_BUF_LEN 2048 104 104 #define QLCNIC_LRO_BUFFER_EXTRA 2048 105 105 ··· 307 307 /* Magic number to let user know flash is programmed */ 308 308 #define QLCNIC_BDINFO_MAGIC 0x12345678 309 309 310 - #define QLCNIC_BRDTYPE_P3_REF_QG 0x0021 311 - #define QLCNIC_BRDTYPE_P3_HMEZ 0x0022 312 - #define QLCNIC_BRDTYPE_P3_10G_CX4_LP 0x0023 313 - #define QLCNIC_BRDTYPE_P3_4_GB 0x0024 314 - #define QLCNIC_BRDTYPE_P3_IMEZ 0x0025 315 - #define QLCNIC_BRDTYPE_P3_10G_SFP_PLUS 0x0026 316 - #define QLCNIC_BRDTYPE_P3_10000_BASE_T 0x0027 317 - #define QLCNIC_BRDTYPE_P3_XG_LOM 0x0028 318 - #define QLCNIC_BRDTYPE_P3_4_GB_MM 0x0029 319 - #define QLCNIC_BRDTYPE_P3_10G_SFP_CT 0x002a 320 - #define QLCNIC_BRDTYPE_P3_10G_SFP_QT 0x002b 321 - #define QLCNIC_BRDTYPE_P3_10G_CX4 0x0031 322 - #define QLCNIC_BRDTYPE_P3_10G_XFP 0x0032 323 - #define QLCNIC_BRDTYPE_P3_10G_TP 0x0080 310 + #define QLCNIC_BRDTYPE_P3P_REF_QG 0x0021 311 + #define QLCNIC_BRDTYPE_P3P_HMEZ 0x0022 312 + #define QLCNIC_BRDTYPE_P3P_10G_CX4_LP 0x0023 313 + #define QLCNIC_BRDTYPE_P3P_4_GB 0x0024 314 + #define QLCNIC_BRDTYPE_P3P_IMEZ 0x0025 315 + #define QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS 0x0026 316 + #define QLCNIC_BRDTYPE_P3P_10000_BASE_T 0x0027 317 + #define QLCNIC_BRDTYPE_P3P_XG_LOM 0x0028 318 + #define QLCNIC_BRDTYPE_P3P_4_GB_MM 0x0029 319 + #define QLCNIC_BRDTYPE_P3P_10G_SFP_CT 0x002a 320 + #define QLCNIC_BRDTYPE_P3P_10G_SFP_QT 0x002b 321 + #define QLCNIC_BRDTYPE_P3P_10G_CX4 0x0031 322 + #define QLCNIC_BRDTYPE_P3P_10G_XFP 0x0032 323 + #define QLCNIC_BRDTYPE_P3P_10G_TP 0x0080 324 324 325 325 #define QLCNIC_MSIX_TABLE_OFFSET 0x44 326 326 ··· 719 719 720 720 /* MAC */ 721 721 722 - #define MC_COUNT_P3 38 722 + #define MC_COUNT_P3P 38 723 723 724 724 #define QLCNIC_MAC_NOOP 0 725 725 #define QLCNIC_MAC_ADD 1

+21 -21

drivers/net/qlcnic/qlcnic_ethtool.c

··· 96 96 static const u32 diag_registers[] = { 97 97 CRB_CMDPEG_STATE, 98 98 CRB_RCVPEG_STATE, 99 - CRB_XG_STATE_P3, 99 + CRB_XG_STATE_P3P, 100 100 CRB_FW_CAPABILITIES_1, 101 101 ISR_INT_STATE_REG, 102 102 QLCNIC_CRB_DRV_ACTIVE, ··· 189 189 goto skip; 190 190 } 191 191 192 - val = QLCRD32(adapter, P3_LINK_SPEED_REG(pcifn)); 193 - ecmd->speed = P3_LINK_SPEED_MHZ * 194 - P3_LINK_SPEED_VAL(pcifn, val); 192 + val = QLCRD32(adapter, P3P_LINK_SPEED_REG(pcifn)); 193 + ecmd->speed = P3P_LINK_SPEED_MHZ * 194 + P3P_LINK_SPEED_VAL(pcifn, val); 195 195 ecmd->duplex = DUPLEX_FULL; 196 196 ecmd->autoneg = AUTONEG_DISABLE; 197 197 } else ··· 202 202 ecmd->transceiver = XCVR_EXTERNAL; 203 203 204 204 switch (adapter->ahw.board_type) { 205 - case QLCNIC_BRDTYPE_P3_REF_QG: 206 - case QLCNIC_BRDTYPE_P3_4_GB: 207 - case QLCNIC_BRDTYPE_P3_4_GB_MM: 205 + case QLCNIC_BRDTYPE_P3P_REF_QG: 206 + case QLCNIC_BRDTYPE_P3P_4_GB: 207 + case QLCNIC_BRDTYPE_P3P_4_GB_MM: 208 208 209 209 ecmd->supported |= SUPPORTED_Autoneg; 210 210 ecmd->advertising |= ADVERTISED_Autoneg; 211 - case QLCNIC_BRDTYPE_P3_10G_CX4: 212 - case QLCNIC_BRDTYPE_P3_10G_CX4_LP: 213 - case QLCNIC_BRDTYPE_P3_10000_BASE_T: 211 + case QLCNIC_BRDTYPE_P3P_10G_CX4: 212 + case QLCNIC_BRDTYPE_P3P_10G_CX4_LP: 213 + case QLCNIC_BRDTYPE_P3P_10000_BASE_T: 214 214 ecmd->supported |= SUPPORTED_TP; 215 215 ecmd->advertising |= ADVERTISED_TP; 216 216 ecmd->port = PORT_TP; 217 217 ecmd->autoneg = adapter->link_autoneg; 218 218 break; 219 - case QLCNIC_BRDTYPE_P3_IMEZ: 220 - case QLCNIC_BRDTYPE_P3_XG_LOM: 221 - case QLCNIC_BRDTYPE_P3_HMEZ: 219 + case QLCNIC_BRDTYPE_P3P_IMEZ: 220 + case QLCNIC_BRDTYPE_P3P_XG_LOM: 221 + case QLCNIC_BRDTYPE_P3P_HMEZ: 222 222 ecmd->supported |= SUPPORTED_MII; 223 223 ecmd->advertising |= ADVERTISED_MII; 224 224 ecmd->port = PORT_MII; 225 225 ecmd->autoneg = AUTONEG_DISABLE; 226 226 break; 227 - case QLCNIC_BRDTYPE_P3_10G_SFP_PLUS: 228 - case QLCNIC_BRDTYPE_P3_10G_SFP_CT: 229 - case QLCNIC_BRDTYPE_P3_10G_SFP_QT: 227 + case QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS: 228 + case QLCNIC_BRDTYPE_P3P_10G_SFP_CT: 229 + case QLCNIC_BRDTYPE_P3P_10G_SFP_QT: 230 230 ecmd->advertising |= ADVERTISED_TP; 231 231 ecmd->supported |= SUPPORTED_TP; 232 232 check_sfp_module = netif_running(dev) && 233 233 adapter->has_link_events; 234 - case QLCNIC_BRDTYPE_P3_10G_XFP: 234 + case QLCNIC_BRDTYPE_P3P_10G_XFP: 235 235 ecmd->supported |= SUPPORTED_FIBRE; 236 236 ecmd->advertising |= ADVERTISED_FIBRE; 237 237 ecmd->port = PORT_FIBRE; 238 238 ecmd->autoneg = AUTONEG_DISABLE; 239 239 break; 240 - case QLCNIC_BRDTYPE_P3_10G_TP: 240 + case QLCNIC_BRDTYPE_P3P_10G_TP: 241 241 if (adapter->ahw.port_type == QLCNIC_XGBE) { 242 242 ecmd->autoneg = AUTONEG_DISABLE; 243 243 ecmd->supported |= (SUPPORTED_FIBRE | SUPPORTED_TP); ··· 381 381 struct qlcnic_adapter *adapter = netdev_priv(dev); 382 382 u32 val; 383 383 384 - val = QLCRD32(adapter, CRB_XG_STATE_P3); 385 - val = XG_LINK_STATE_P3(adapter->ahw.pci_func, val); 386 - return (val == XG_LINK_UP_P3) ? 0 : 1; 384 + val = QLCRD32(adapter, CRB_XG_STATE_P3P); 385 + val = XG_LINK_STATE_P3P(adapter->ahw.pci_func, val); 386 + return (val == XG_LINK_UP_P3P) ? 0 : 1; 387 387 } 388 388 389 389 static int

+11 -11

drivers/net/qlcnic/qlcnic_hdr.h

··· 556 556 #define XG_LINK_UP 0x10 557 557 #define XG_LINK_DOWN 0x20 558 558 559 - #define XG_LINK_UP_P3 0x01 560 - #define XG_LINK_DOWN_P3 0x02 561 - #define XG_LINK_STATE_P3_MASK 0xf 562 - #define XG_LINK_STATE_P3(pcifn, val) \ 563 - (((val) >> ((pcifn) * 4)) & XG_LINK_STATE_P3_MASK) 559 + #define XG_LINK_UP_P3P 0x01 560 + #define XG_LINK_DOWN_P3P 0x02 561 + #define XG_LINK_STATE_P3P_MASK 0xf 562 + #define XG_LINK_STATE_P3P(pcifn, val) \ 563 + (((val) >> ((pcifn) * 4)) & XG_LINK_STATE_P3P_MASK) 564 564 565 - #define P3_LINK_SPEED_MHZ 100 566 - #define P3_LINK_SPEED_MASK 0xff 567 - #define P3_LINK_SPEED_REG(pcifn) \ 565 + #define P3P_LINK_SPEED_MHZ 100 566 + #define P3P_LINK_SPEED_MASK 0xff 567 + #define P3P_LINK_SPEED_REG(pcifn) \ 568 568 (CRB_PF_LINK_SPEED_1 + (((pcifn) / 4) * 4)) 569 - #define P3_LINK_SPEED_VAL(pcifn, reg) \ 570 - (((reg) >> (8 * ((pcifn) & 0x3))) & P3_LINK_SPEED_MASK) 569 + #define P3P_LINK_SPEED_VAL(pcifn, reg) \ 570 + (((reg) >> (8 * ((pcifn) & 0x3))) & P3P_LINK_SPEED_MASK) 571 571 572 572 #define QLCNIC_CAM_RAM_BASE (QLCNIC_CRB_CAM + 0x02000) 573 573 #define QLCNIC_CAM_RAM(reg) (QLCNIC_CAM_RAM_BASE + (reg)) ··· 592 592 #define CRB_CMDPEG_STATE (QLCNIC_REG(0x50)) 593 593 #define CRB_RCVPEG_STATE (QLCNIC_REG(0x13c)) 594 594 595 - #define CRB_XG_STATE_P3 (QLCNIC_REG(0x98)) 595 + #define CRB_XG_STATE_P3P (QLCNIC_REG(0x98)) 596 596 #define CRB_PF_LINK_SPEED_1 (QLCNIC_REG(0xe8)) 597 597 #define CRB_PF_LINK_SPEED_2 (QLCNIC_REG(0xec)) 598 598

+18 -18

drivers/net/qlcnic/qlcnic_hw.c

··· 754 754 struct qlcnic_adapter *adapter = netdev_priv(netdev); 755 755 int rc = 0; 756 756 757 - if (mtu < P3_MIN_MTU || mtu > P3_MAX_MTU) { 757 + if (mtu < P3P_MIN_MTU || mtu > P3P_MAX_MTU) { 758 758 dev_err(&adapter->netdev->dev, "%d bytes < mtu < %d bytes" 759 - " not supported\n", P3_MAX_MTU, P3_MIN_MTU); 759 + " not supported\n", P3P_MAX_MTU, P3P_MIN_MTU); 760 760 return -EINVAL; 761 761 } 762 762 ··· 1161 1161 1162 1162 adapter->ahw.board_type = board_type; 1163 1163 1164 - if (board_type == QLCNIC_BRDTYPE_P3_4_GB_MM) { 1164 + if (board_type == QLCNIC_BRDTYPE_P3P_4_GB_MM) { 1165 1165 u32 gpio = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_PAD_GPIO_I); 1166 1166 if ((gpio & 0x8000) == 0) 1167 - board_type = QLCNIC_BRDTYPE_P3_10G_TP; 1167 + board_type = QLCNIC_BRDTYPE_P3P_10G_TP; 1168 1168 } 1169 1169 1170 1170 switch (board_type) { 1171 - case QLCNIC_BRDTYPE_P3_HMEZ: 1172 - case QLCNIC_BRDTYPE_P3_XG_LOM: 1173 - case QLCNIC_BRDTYPE_P3_10G_CX4: 1174 - case QLCNIC_BRDTYPE_P3_10G_CX4_LP: 1175 - case QLCNIC_BRDTYPE_P3_IMEZ: 1176 - case QLCNIC_BRDTYPE_P3_10G_SFP_PLUS: 1177 - case QLCNIC_BRDTYPE_P3_10G_SFP_CT: 1178 - case QLCNIC_BRDTYPE_P3_10G_SFP_QT: 1179 - case QLCNIC_BRDTYPE_P3_10G_XFP: 1180 - case QLCNIC_BRDTYPE_P3_10000_BASE_T: 1171 + case QLCNIC_BRDTYPE_P3P_HMEZ: 1172 + case QLCNIC_BRDTYPE_P3P_XG_LOM: 1173 + case QLCNIC_BRDTYPE_P3P_10G_CX4: 1174 + case QLCNIC_BRDTYPE_P3P_10G_CX4_LP: 1175 + case QLCNIC_BRDTYPE_P3P_IMEZ: 1176 + case QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS: 1177 + case QLCNIC_BRDTYPE_P3P_10G_SFP_CT: 1178 + case QLCNIC_BRDTYPE_P3P_10G_SFP_QT: 1179 + case QLCNIC_BRDTYPE_P3P_10G_XFP: 1180 + case QLCNIC_BRDTYPE_P3P_10000_BASE_T: 1181 1181 adapter->ahw.port_type = QLCNIC_XGBE; 1182 1182 break; 1183 - case QLCNIC_BRDTYPE_P3_REF_QG: 1184 - case QLCNIC_BRDTYPE_P3_4_GB: 1185 - case QLCNIC_BRDTYPE_P3_4_GB_MM: 1183 + case QLCNIC_BRDTYPE_P3P_REF_QG: 1184 + case QLCNIC_BRDTYPE_P3P_4_GB: 1185 + case QLCNIC_BRDTYPE_P3P_4_GB_MM: 1186 1186 adapter->ahw.port_type = QLCNIC_GBE; 1187 1187 break; 1188 - case QLCNIC_BRDTYPE_P3_10G_TP: 1188 + case QLCNIC_BRDTYPE_P3P_10G_TP: 1189 1189 adapter->ahw.port_type = (adapter->portnum < 2) ? 1190 1190 QLCNIC_XGBE : QLCNIC_GBE; 1191 1191 break;

+2 -2

drivers/net/qlcnic/qlcnic_init.c

··· 259 259 switch (ring) { 260 260 case RCV_RING_NORMAL: 261 261 rds_ring->num_desc = adapter->num_rxd; 262 - rds_ring->dma_size = QLCNIC_P3_RX_BUF_MAX_LEN; 262 + rds_ring->dma_size = QLCNIC_P3P_RX_BUF_MAX_LEN; 263 263 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN; 264 264 break; 265 265 266 266 case RCV_RING_JUMBO: 267 267 rds_ring->num_desc = adapter->num_jumbo_rxd; 268 268 rds_ring->dma_size = 269 - QLCNIC_P3_RX_JUMBO_BUF_MAX_LEN; 269 + QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN; 270 270 271 271 if (adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO) 272 272 rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;