Merge tag 'irq-urgent-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull more irq updates from Thomas Gleixner:
"A set of updates for the interrupt subsystem:

- A treewide cleanup for the irq_domain code, which makes the naming
consistent and gets rid of the original oddity of naming domains
'host'.

This is a trivial mechanical change and is done late to ensure that
all instances have been catched and new code merged post rc1 wont
reintroduce new instances.

- A trivial consistency fix in the migration code

The recent introduction of irq_force_complete_move() in the core
code, causes a problem for the nostalgia crowd who maintains ia64
out of tree.

The code assumes that hierarchical interrupt domains are enabled
and dereferences irq_data::parent_data unconditionally. That works
in mainline because both architectures which enable that code have
hierarchical domains enabled. Though it breaks the ia64 build,
which enables the functionality, but does not have hierarchical
domains.

While it's not really a problem for mainline today, this
unconditional dereference is inconsistent and trivially fixable by
using the existing helper function irqd_get_parent_data(), which
has the appropriate #ifdeffery in place"

* tag 'irq-urgent-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
genirq/migration: Use irqd_get_parent_data() in irq_force_complete_move()
irqdomain: Stop using 'host' for domain
irqdomain: Rename irq_get_default_host() to irq_get_default_domain()
irqdomain: Rename irq_set_default_host() to irq_set_default_domain()

+54 -54
+1 -1
arch/arc/kernel/intc-arcv2.c
··· 178 178 * Needed for primary domain lookup to succeed 179 179 * This is a primary irqchip, and can never have a parent 180 180 */ 181 - irq_set_default_host(root_domain); 181 + irq_set_default_domain(root_domain); 182 182 183 183 #ifdef CONFIG_SMP 184 184 irq_create_mapping(root_domain, IPI_IRQ);
+1 -1
arch/arc/kernel/intc-compact.c
··· 121 121 * Needed for primary domain lookup to succeed 122 122 * This is a primary irqchip, and can never have a parent 123 123 */ 124 - irq_set_default_host(root_domain); 124 + irq_set_default_domain(root_domain); 125 125 126 126 return 0; 127 127 }
+1 -1
arch/arm/mach-pxa/irq.c
··· 152 152 &pxa_irq_ops, NULL); 153 153 if (!pxa_irq_domain) 154 154 panic("Unable to add PXA IRQ domain\n"); 155 - irq_set_default_host(pxa_irq_domain); 155 + irq_set_default_domain(pxa_irq_domain); 156 156 157 157 for (n = 0; n < irq_nr; n += 32) { 158 158 void __iomem *base = irq_base(n >> 5);
+3 -3
arch/mips/cavium-octeon/octeon-irq.c
··· 1505 1505 1506 1506 ciu_domain = irq_domain_add_tree( 1507 1507 ciu_node, &octeon_irq_domain_ciu_ops, dd); 1508 - irq_set_default_host(ciu_domain); 1508 + irq_set_default_domain(ciu_domain); 1509 1509 1510 1510 /* CIU_0 */ 1511 1511 for (i = 0; i < 16; i++) { ··· 2076 2076 2077 2077 ciu_domain = irq_domain_add_tree( 2078 2078 ciu_node, &octeon_irq_domain_ciu2_ops, NULL); 2079 - irq_set_default_host(ciu_domain); 2079 + irq_set_default_domain(ciu_domain); 2080 2080 2081 2081 /* CUI2 */ 2082 2082 for (i = 0; i < 64; i++) { ··· 2929 2929 /* Only do per CPU things if it is the CIU of the boot node. */ 2930 2930 octeon_irq_ciu3_alloc_resources(ciu3_info); 2931 2931 if (node == 0) 2932 - irq_set_default_host(domain); 2932 + irq_set_default_domain(domain); 2933 2933 2934 2934 octeon_irq_use_ip4 = false; 2935 2935 /* Enable the CIU lines */
+1 -1
arch/mips/pci/pci-xtalk-bridge.c
··· 620 620 if (bridge_get_partnum(virt_to_phys((void *)bd->bridge_addr), partnum)) 621 621 return -EPROBE_DEFER; /* not available yet */ 622 622 623 - parent = irq_get_default_host(); 623 + parent = irq_get_default_domain(); 624 624 if (!parent) 625 625 return -ENODEV; 626 626 fn = irq_domain_alloc_named_fwnode("BRIDGE");
+1 -1
arch/mips/sgi-ip27/ip27-irq.c
··· 297 297 if (WARN_ON(domain == NULL)) 298 298 return; 299 299 300 - irq_set_default_host(domain); 300 + irq_set_default_domain(domain); 301 301 302 302 irq_set_percpu_devid(IP27_HUB_PEND0_IRQ); 303 303 irq_set_chained_handler_and_data(IP27_HUB_PEND0_IRQ, ip27_do_irq_mask0,
+1 -1
arch/mips/sgi-ip30/ip30-irq.c
··· 313 313 if (!domain) 314 314 return; 315 315 316 - irq_set_default_host(domain); 316 + irq_set_default_domain(domain); 317 317 318 318 irq_set_percpu_devid(IP30_HEART_L0_IRQ); 319 319 irq_set_chained_handler_and_data(IP30_HEART_L0_IRQ, ip30_normal_irq,
+1 -1
arch/nios2/kernel/irq.c
··· 72 72 domain = irq_domain_add_linear(node, NIOS2_CPU_NR_IRQS, &irq_ops, NULL); 73 73 BUG_ON(!domain); 74 74 75 - irq_set_default_host(domain); 75 + irq_set_default_domain(domain); 76 76 of_node_put(node); 77 77 /* Load the initial ienable value */ 78 78 ienable = RDCTL(CTL_IENABLE);
+1 -1
arch/powerpc/kvm/book3s_hv.c
··· 6041 6041 * the underlying calls, which will EOI the interrupt in real 6042 6042 * mode, need an HW IRQ number mapped in the XICS IRQ domain. 6043 6043 */ 6044 - host_data = irq_domain_get_irq_data(irq_get_default_host(), host_irq); 6044 + host_data = irq_domain_get_irq_data(irq_get_default_domain(), host_irq); 6045 6045 irq_map->r_hwirq = (unsigned int)irqd_to_hwirq(host_data); 6046 6046 6047 6047 if (i == pimap->n_mapped)
+1 -1
arch/powerpc/kvm/book3s_xive.c
··· 1555 1555 struct kvmppc_xive_src_block *sb; 1556 1556 struct kvmppc_xive_irq_state *state; 1557 1557 struct irq_data *host_data = 1558 - irq_domain_get_irq_data(irq_get_default_host(), host_irq); 1558 + irq_domain_get_irq_data(irq_get_default_domain(), host_irq); 1559 1559 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(host_data); 1560 1560 u16 idx; 1561 1561 u8 prio;
+1 -1
arch/powerpc/platforms/44x/uic.c
··· 291 291 if (!primary_uic) 292 292 panic("Unable to initialize primary UIC %pOF\n", np); 293 293 294 - irq_set_default_host(primary_uic->irqhost); 294 + irq_set_default_domain(primary_uic->irqhost); 295 295 of_node_put(np); 296 296 297 297 /* The scan again for cascaded UICs */
+1 -1
arch/powerpc/platforms/52xx/mpc52xx_pic.c
··· 453 453 if (!mpc52xx_irqhost) 454 454 panic(__FILE__ ": Cannot allocate the IRQ host\n"); 455 455 456 - irq_set_default_host(mpc52xx_irqhost); 456 + irq_set_default_domain(mpc52xx_irqhost); 457 457 458 458 pr_info("MPC52xx PIC is up and running!\n"); 459 459 }
+1 -1
arch/powerpc/platforms/amigaone/setup.c
··· 109 109 110 110 i8259_init(pic, int_ack); 111 111 ppc_md.get_irq = i8259_irq; 112 - irq_set_default_host(i8259_get_host()); 112 + irq_set_default_domain(i8259_get_host()); 113 113 } 114 114 115 115 static int __init request_isa_regions(void)
+1 -1
arch/powerpc/platforms/chrp/setup.c
··· 486 486 i8259_init(pic, chrp_int_ack); 487 487 if (ppc_md.get_irq == NULL) { 488 488 ppc_md.get_irq = i8259_irq; 489 - irq_set_default_host(i8259_get_host()); 489 + irq_set_default_domain(i8259_get_host()); 490 490 } 491 491 if (chrp_mpic != NULL) { 492 492 cascade_irq = irq_of_parse_and_map(pic, 0);
+1 -1
arch/powerpc/platforms/embedded6xx/flipper-pic.c
··· 190 190 flipper_irq_host = flipper_pic_init(np); 191 191 BUG_ON(!flipper_irq_host); 192 192 193 - irq_set_default_host(flipper_irq_host); 193 + irq_set_default_domain(flipper_irq_host); 194 194 195 195 of_node_put(np); 196 196 }
+1 -1
arch/powerpc/platforms/pasemi/setup.c
··· 228 228 irq_set_chained_handler(gpio_virq, sb600_8259_cascade); 229 229 mpic_unmask_irq(irq_get_irq_data(gpio_virq)); 230 230 231 - irq_set_default_host(mpic->irqhost); 231 + irq_set_default_domain(mpic->irqhost); 232 232 } 233 233 234 234 #else
+1 -1
arch/powerpc/platforms/powermac/pic.c
··· 330 330 pmac_pic_host = irq_domain_add_linear(master, max_irqs, 331 331 &pmac_pic_host_ops, NULL); 332 332 BUG_ON(pmac_pic_host == NULL); 333 - irq_set_default_host(pmac_pic_host); 333 + irq_set_default_domain(pmac_pic_host); 334 334 335 335 /* Get addresses of first controller if we have a node for it */ 336 336 BUG_ON(of_address_to_resource(master, 0, &r));
+1 -1
arch/powerpc/platforms/powernv/pci-ioda.c
··· 1881 1881 static int __init pnv_msi_allocate_domains(struct pci_controller *hose, unsigned int count) 1882 1882 { 1883 1883 struct pnv_phb *phb = hose->private_data; 1884 - struct irq_domain *parent = irq_get_default_host(); 1884 + struct irq_domain *parent = irq_get_default_domain(); 1885 1885 1886 1886 hose->fwnode = irq_domain_alloc_named_id_fwnode("PNV-MSI", phb->opal_id); 1887 1887 if (!hose->fwnode)
+1 -1
arch/powerpc/platforms/ps3/interrupt.c
··· 744 744 struct irq_domain *host; 745 745 746 746 host = irq_domain_add_nomap(NULL, PS3_PLUG_MAX + 1, &ps3_host_ops, NULL); 747 - irq_set_default_host(host); 747 + irq_set_default_domain(host); 748 748 749 749 for_each_possible_cpu(cpu) { 750 750 struct ps3_private *pd = &per_cpu(ps3_private, cpu);
+1 -1
arch/powerpc/platforms/pseries/msi.c
··· 611 611 static int __pseries_msi_allocate_domains(struct pci_controller *phb, 612 612 unsigned int count) 613 613 { 614 - struct irq_domain *parent = irq_get_default_host(); 614 + struct irq_domain *parent = irq_get_default_domain(); 615 615 616 616 phb->fwnode = irq_domain_alloc_named_id_fwnode("pSeries-MSI", 617 617 phb->global_number);
+1 -1
arch/powerpc/sysdev/ehv_pic.c
··· 291 291 ehv_pic->coreint_flag = of_property_read_bool(np, "has-external-proxy"); 292 292 293 293 global_ehv_pic = ehv_pic; 294 - irq_set_default_host(global_ehv_pic->irqhost); 294 + irq_set_default_domain(global_ehv_pic->irqhost); 295 295 }
+1 -1
arch/powerpc/sysdev/ipic.c
··· 757 757 ipic_write(ipic->regs, IPIC_SEMSR, temp); 758 758 759 759 primary_ipic = ipic; 760 - irq_set_default_host(primary_ipic->irqhost); 760 + irq_set_default_domain(primary_ipic->irqhost); 761 761 762 762 ipic_write(ipic->regs, IPIC_SIMSR_H, 0); 763 763 ipic_write(ipic->regs, IPIC_SIMSR_L, 0);
+1 -1
arch/powerpc/sysdev/mpic.c
··· 1520 1520 1521 1521 if (!(mpic->flags & MPIC_SECONDARY)) { 1522 1522 mpic_primary = mpic; 1523 - irq_set_default_host(mpic->irqhost); 1523 + irq_set_default_domain(mpic->irqhost); 1524 1524 } 1525 1525 1526 1526 return mpic;
+1 -1
arch/powerpc/sysdev/xics/xics-common.c
··· 472 472 return -ENOMEM; 473 473 } 474 474 475 - irq_set_default_host(xics_host); 475 + irq_set_default_domain(xics_host); 476 476 return 0; 477 477 } 478 478
+1 -1
arch/powerpc/sysdev/xive/common.c
··· 1467 1467 xive_irq_domain = irq_domain_add_tree(np, &xive_irq_domain_ops, NULL); 1468 1468 if (WARN_ON(xive_irq_domain == NULL)) 1469 1469 return; 1470 - irq_set_default_host(xive_irq_domain); 1470 + irq_set_default_domain(xive_irq_domain); 1471 1471 } 1472 1472 1473 1473 static void xive_cleanup_cpu_queues(unsigned int cpu, struct xive_cpu *xc)
+1 -1
arch/x86/kernel/apic/vector.c
··· 799 799 x86_vector_domain = irq_domain_create_tree(fn, &x86_vector_domain_ops, 800 800 NULL); 801 801 BUG_ON(x86_vector_domain == NULL); 802 - irq_set_default_host(x86_vector_domain); 802 + irq_set_default_domain(x86_vector_domain); 803 803 804 804 BUG_ON(!alloc_cpumask_var(&vector_searchmask, GFP_KERNEL)); 805 805
+3 -3
drivers/irqchip/irq-armada-370-xp.c
··· 564 564 565 565 static int mpic_starting_cpu(unsigned int cpu) 566 566 { 567 - struct mpic *mpic = irq_get_default_host()->host_data; 567 + struct mpic *mpic = irq_get_default_domain()->host_data; 568 568 569 569 mpic_perf_init(mpic); 570 570 mpic_smp_cpu_init(mpic); ··· 700 700 701 701 static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs) 702 702 { 703 - struct mpic *mpic = irq_get_default_host()->host_data; 703 + struct mpic *mpic = irq_get_default_domain()->host_data; 704 704 irq_hw_number_t i; 705 705 u32 irqstat; 706 706 ··· 880 880 } 881 881 882 882 if (mpic_is_ipi_available(mpic)) { 883 - irq_set_default_host(mpic->domain); 883 + irq_set_default_domain(mpic->domain); 884 884 set_handle_irq(mpic_handle_irq); 885 885 #ifdef CONFIG_SMP 886 886 err = mpic_ipi_init(mpic, node);
+1 -1
drivers/irqchip/irq-clps711x.c
··· 191 191 goto out_irqfree; 192 192 } 193 193 194 - irq_set_default_host(clps711x_intc->domain); 194 + irq_set_default_domain(clps711x_intc->domain); 195 195 set_handle_irq(clps711x_irqh); 196 196 197 197 #ifdef CONFIG_FIQ
+1 -1
drivers/irqchip/irq-imx-gpcv2.c
··· 247 247 kfree(cd); 248 248 return -ENOMEM; 249 249 } 250 - irq_set_default_host(domain); 250 + irq_set_default_domain(domain); 251 251 252 252 /* Initially mask all interrupts */ 253 253 for (i = 0; i < IMR_NUM; i++) {
+1 -1
drivers/irqchip/irq-pic32-evic.c
··· 291 291 gc->private = &priv[i]; 292 292 } 293 293 294 - irq_set_default_host(evic_irq_domain); 294 + irq_set_default_domain(evic_irq_domain); 295 295 296 296 /* 297 297 * External interrupts have software configurable edge polarity. These
+1 -1
drivers/irqchip/irq-xilinx-intc.c
··· 233 233 } 234 234 } else { 235 235 primary_intc = irqc; 236 - irq_set_default_host(primary_intc->root_domain); 236 + irq_set_default_domain(primary_intc->root_domain); 237 237 set_handle_irq(xil_intc_handle_irq); 238 238 } 239 239
+1 -1
drivers/irqchip/irq-xtensa-mx.c
··· 156 156 { 157 157 unsigned int i; 158 158 159 - irq_set_default_host(root_domain); 159 + irq_set_default_domain(root_domain); 160 160 secondary_init_irq(); 161 161 162 162 /* Initialize default IRQ routing to CPU 0 */
+2 -2
drivers/irqchip/irq-xtensa-pic.c
··· 87 87 struct irq_domain *root_domain = 88 88 irq_domain_add_legacy(NULL, NR_IRQS - 1, 1, 0, 89 89 &xtensa_irq_domain_ops, &xtensa_irq_chip); 90 - irq_set_default_host(root_domain); 90 + irq_set_default_domain(root_domain); 91 91 return 0; 92 92 } 93 93 ··· 97 97 struct irq_domain *root_domain = 98 98 irq_domain_add_linear(np, NR_IRQS, &xtensa_irq_domain_ops, 99 99 &xtensa_irq_chip); 100 - irq_set_default_host(root_domain); 100 + irq_set_default_domain(root_domain); 101 101 return 0; 102 102 } 103 103 IRQCHIP_DECLARE(xtensa_irq_chip, "cdns,xtensa-pic", xtensa_pic_init);
+8 -8
include/linux/irqdomain.h
··· 72 72 73 73 /** 74 74 * struct irq_domain_ops - Methods for irq_domain objects 75 - * @match: Match an interrupt controller device node to a host, returns 75 + * @match: Match an interrupt controller device node to a domain, returns 76 76 * 1 on a match 77 77 * @select: Match an interrupt controller fw specification. It is more generic 78 78 * than @match as it receives a complete struct irq_fwspec. Therefore, ··· 352 352 void *host_data); 353 353 struct irq_domain *irq_find_matching_fwspec(struct irq_fwspec *fwspec, 354 354 enum irq_domain_bus_token bus_token); 355 - void irq_set_default_host(struct irq_domain *host); 356 - struct irq_domain *irq_get_default_host(void); 355 + void irq_set_default_domain(struct irq_domain *domain); 356 + struct irq_domain *irq_get_default_domain(void); 357 357 int irq_domain_alloc_descs(int virq, unsigned int nr_irqs, 358 358 irq_hw_number_t hwirq, int node, 359 359 const struct irq_affinity_desc *affinity); ··· 454 454 return IS_ERR(d) ? NULL : d; 455 455 } 456 456 457 - unsigned int irq_create_direct_mapping(struct irq_domain *host); 457 + unsigned int irq_create_direct_mapping(struct irq_domain *domain); 458 458 #endif 459 459 460 460 static inline struct irq_domain *irq_domain_add_tree(struct device_node *of_node, ··· 507 507 return IS_ERR(d) ? NULL : d; 508 508 } 509 509 510 - void irq_domain_remove(struct irq_domain *host); 510 + void irq_domain_remove(struct irq_domain *domain); 511 511 512 512 int irq_domain_associate(struct irq_domain *domain, unsigned int irq, 513 513 irq_hw_number_t hwirq); ··· 515 515 unsigned int irq_base, 516 516 irq_hw_number_t hwirq_base, int count); 517 517 518 - unsigned int irq_create_mapping_affinity(struct irq_domain *host, 518 + unsigned int irq_create_mapping_affinity(struct irq_domain *domain, 519 519 irq_hw_number_t hwirq, 520 520 const struct irq_affinity_desc *affinity); 521 521 unsigned int irq_create_fwspec_mapping(struct irq_fwspec *fwspec); 522 522 void irq_dispose_mapping(unsigned int virq); 523 523 524 - static inline unsigned int irq_create_mapping(struct irq_domain *host, 524 + static inline unsigned int irq_create_mapping(struct irq_domain *domain, 525 525 irq_hw_number_t hwirq) 526 526 { 527 - return irq_create_mapping_affinity(host, hwirq, NULL); 527 + return irq_create_mapping_affinity(domain, hwirq, NULL); 528 528 } 529 529 530 530 struct irq_desc *__irq_resolve_mapping(struct irq_domain *domain,
+7 -7
kernel/irq/irqdomain.c
··· 398 398 * If the going away domain is the default one, reset it. 399 399 */ 400 400 if (unlikely(irq_default_domain == domain)) 401 - irq_set_default_host(NULL); 401 + irq_set_default_domain(NULL); 402 402 403 403 mutex_unlock(&irq_domain_mutex); 404 404 ··· 573 573 EXPORT_SYMBOL_GPL(irq_find_matching_fwspec); 574 574 575 575 /** 576 - * irq_set_default_host() - Set a "default" irq domain 576 + * irq_set_default_domain() - Set a "default" irq domain 577 577 * @domain: default domain pointer 578 578 * 579 579 * For convenience, it's possible to set a "default" domain that will be used ··· 581 581 * platforms that want to manipulate a few hard coded interrupt numbers that 582 582 * aren't properly represented in the device-tree. 583 583 */ 584 - void irq_set_default_host(struct irq_domain *domain) 584 + void irq_set_default_domain(struct irq_domain *domain) 585 585 { 586 586 pr_debug("Default domain set to @0x%p\n", domain); 587 587 588 588 irq_default_domain = domain; 589 589 } 590 - EXPORT_SYMBOL_GPL(irq_set_default_host); 590 + EXPORT_SYMBOL_GPL(irq_set_default_domain); 591 591 592 592 /** 593 - * irq_get_default_host() - Retrieve the "default" irq domain 593 + * irq_get_default_domain() - Retrieve the "default" irq domain 594 594 * 595 595 * Returns: the default domain, if any. 596 596 * ··· 598 598 * systems that cannot implement a firmware->fwnode mapping (which 599 599 * both DT and ACPI provide). 600 600 */ 601 - struct irq_domain *irq_get_default_host(void) 601 + struct irq_domain *irq_get_default_domain(void) 602 602 { 603 603 return irq_default_domain; 604 604 } 605 - EXPORT_SYMBOL_GPL(irq_get_default_host); 605 + EXPORT_SYMBOL_GPL(irq_get_default_domain); 606 606 607 607 static bool irq_domain_is_nomap(struct irq_domain *domain) 608 608 {
+1 -1
kernel/irq/migration.c
··· 37 37 38 38 void irq_force_complete_move(struct irq_desc *desc) 39 39 { 40 - for (struct irq_data *d = irq_desc_get_irq_data(desc); d; d = d->parent_data) { 40 + for (struct irq_data *d = irq_desc_get_irq_data(desc); d; d = irqd_get_parent_data(d)) { 41 41 if (d->chip && d->chip->irq_force_complete_move) { 42 42 d->chip->irq_force_complete_move(d); 43 43 return;