Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'spi-fix-v5.10-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi fixes from Mark Brown:
"This is a relatively large set of fixes, the bulk of it being a series
from Lukas Wunner which fixes confusion with the lifetime of driver
data allocated along with the SPI controller structure that's been
created as part of the conversion to devm APIs.

The simplest fix, explained in detail in Lukas' commit message, is to
move to a devm_ function for allocation of the controller and hence
driver data in order to push the free of that after anything tries to
reference the driver data in the remove path. This results in a
relatively large diff due to the addition of a new function but isn't
particularly complex.

There's also a fix from Sven van Asbroeck which fixes yet more fallout
from the conflicts between the various different places one can
configure the polarity of GPIOs in modern systems.

Otherwise everything is fairly small and driver specific"

* tag 'spi-fix-v5.10-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
spi: npcm-fiu: Don't leak SPI master in probe error path
spi: dw: Set transfer handler before unmasking the IRQs
spi: cadence-quadspi: Fix error return code in cqspi_probe
spi: bcm2835aux: Restore err assignment in bcm2835aux_spi_probe
spi: lpspi: Fix use-after-free on unbind
spi: bcm-qspi: Fix use-after-free on unbind
spi: bcm2835aux: Fix use-after-free on unbind
spi: bcm2835: Fix use-after-free on unbind
spi: Introduce device-managed SPI controller allocation
spi: fsi: Fix transfer returning without finalizing message
spi: fix client driver breakages when using GPIO descriptors

+115 -76
+12 -22
drivers/spi/spi-bcm-qspi.c
··· 1327 1327 1328 1328 data = of_id->data; 1329 1329 1330 - master = spi_alloc_master(dev, sizeof(struct bcm_qspi)); 1330 + master = devm_spi_alloc_master(dev, sizeof(struct bcm_qspi)); 1331 1331 if (!master) { 1332 1332 dev_err(dev, "error allocating spi_master\n"); 1333 1333 return -ENOMEM; ··· 1367 1367 1368 1368 if (res) { 1369 1369 qspi->base[MSPI] = devm_ioremap_resource(dev, res); 1370 - if (IS_ERR(qspi->base[MSPI])) { 1371 - ret = PTR_ERR(qspi->base[MSPI]); 1372 - goto qspi_resource_err; 1373 - } 1370 + if (IS_ERR(qspi->base[MSPI])) 1371 + return PTR_ERR(qspi->base[MSPI]); 1374 1372 } else { 1375 - goto qspi_resource_err; 1373 + return 0; 1376 1374 } 1377 1375 1378 1376 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "bspi"); 1379 1377 if (res) { 1380 1378 qspi->base[BSPI] = devm_ioremap_resource(dev, res); 1381 - if (IS_ERR(qspi->base[BSPI])) { 1382 - ret = PTR_ERR(qspi->base[BSPI]); 1383 - goto qspi_resource_err; 1384 - } 1379 + if (IS_ERR(qspi->base[BSPI])) 1380 + return PTR_ERR(qspi->base[BSPI]); 1385 1381 qspi->bspi_mode = true; 1386 1382 } else { 1387 1383 qspi->bspi_mode = false; ··· 1388 1392 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cs_reg"); 1389 1393 if (res) { 1390 1394 qspi->base[CHIP_SELECT] = devm_ioremap_resource(dev, res); 1391 - if (IS_ERR(qspi->base[CHIP_SELECT])) { 1392 - ret = PTR_ERR(qspi->base[CHIP_SELECT]); 1393 - goto qspi_resource_err; 1394 - } 1395 + if (IS_ERR(qspi->base[CHIP_SELECT])) 1396 + return PTR_ERR(qspi->base[CHIP_SELECT]); 1395 1397 } 1396 1398 1397 1399 qspi->dev_ids = kcalloc(num_irqs, sizeof(struct bcm_qspi_dev_id), 1398 1400 GFP_KERNEL); 1399 - if (!qspi->dev_ids) { 1400 - ret = -ENOMEM; 1401 - goto qspi_resource_err; 1402 - } 1401 + if (!qspi->dev_ids) 1402 + return -ENOMEM; 1403 1403 1404 1404 for (val = 0; val < num_irqs; val++) { 1405 1405 irq = -1; ··· 1476 1484 qspi->xfer_mode.addrlen = -1; 1477 1485 qspi->xfer_mode.hp = -1; 1478 1486 1479 - ret = devm_spi_register_master(&pdev->dev, master); 1487 + ret = spi_register_master(master); 1480 1488 if (ret < 0) { 1481 1489 dev_err(dev, "can't register master\n"); 1482 1490 goto qspi_reg_err; ··· 1489 1497 clk_disable_unprepare(qspi->clk); 1490 1498 qspi_probe_err: 1491 1499 kfree(qspi->dev_ids); 1492 - qspi_resource_err: 1493 - spi_master_put(master); 1494 1500 return ret; 1495 1501 } 1496 1502 /* probe function to be called by SoC specific platform driver probe */ ··· 1498 1508 { 1499 1509 struct bcm_qspi *qspi = platform_get_drvdata(pdev); 1500 1510 1511 + spi_unregister_master(qspi->master); 1501 1512 bcm_qspi_hw_uninit(qspi); 1502 1513 clk_disable_unprepare(qspi->clk); 1503 1514 kfree(qspi->dev_ids); 1504 - spi_unregister_master(qspi->master); 1505 1515 1506 1516 return 0; 1507 1517 }
+8 -16
drivers/spi/spi-bcm2835.c
··· 1278 1278 struct bcm2835_spi *bs; 1279 1279 int err; 1280 1280 1281 - ctlr = spi_alloc_master(&pdev->dev, ALIGN(sizeof(*bs), 1281 + ctlr = devm_spi_alloc_master(&pdev->dev, ALIGN(sizeof(*bs), 1282 1282 dma_get_cache_alignment())); 1283 1283 if (!ctlr) 1284 1284 return -ENOMEM; ··· 1299 1299 bs->ctlr = ctlr; 1300 1300 1301 1301 bs->regs = devm_platform_ioremap_resource(pdev, 0); 1302 - if (IS_ERR(bs->regs)) { 1303 - err = PTR_ERR(bs->regs); 1304 - goto out_controller_put; 1305 - } 1302 + if (IS_ERR(bs->regs)) 1303 + return PTR_ERR(bs->regs); 1306 1304 1307 1305 bs->clk = devm_clk_get(&pdev->dev, NULL); 1308 - if (IS_ERR(bs->clk)) { 1309 - err = dev_err_probe(&pdev->dev, PTR_ERR(bs->clk), 1310 - "could not get clk\n"); 1311 - goto out_controller_put; 1312 - } 1306 + if (IS_ERR(bs->clk)) 1307 + return dev_err_probe(&pdev->dev, PTR_ERR(bs->clk), 1308 + "could not get clk\n"); 1313 1309 1314 1310 bs->irq = platform_get_irq(pdev, 0); 1315 - if (bs->irq <= 0) { 1316 - err = bs->irq ? bs->irq : -ENODEV; 1317 - goto out_controller_put; 1318 - } 1311 + if (bs->irq <= 0) 1312 + return bs->irq ? bs->irq : -ENODEV; 1319 1313 1320 1314 clk_prepare_enable(bs->clk); 1321 1315 ··· 1343 1349 bcm2835_dma_release(ctlr, bs); 1344 1350 out_clk_disable: 1345 1351 clk_disable_unprepare(bs->clk); 1346 - out_controller_put: 1347 - spi_controller_put(ctlr); 1348 1352 return err; 1349 1353 } 1350 1354
+7 -13
drivers/spi/spi-bcm2835aux.c
··· 494 494 unsigned long clk_hz; 495 495 int err; 496 496 497 - master = spi_alloc_master(&pdev->dev, sizeof(*bs)); 497 + master = devm_spi_alloc_master(&pdev->dev, sizeof(*bs)); 498 498 if (!master) 499 499 return -ENOMEM; 500 500 ··· 524 524 525 525 /* the main area */ 526 526 bs->regs = devm_platform_ioremap_resource(pdev, 0); 527 - if (IS_ERR(bs->regs)) { 528 - err = PTR_ERR(bs->regs); 529 - goto out_master_put; 530 - } 527 + if (IS_ERR(bs->regs)) 528 + return PTR_ERR(bs->regs); 531 529 532 530 bs->clk = devm_clk_get(&pdev->dev, NULL); 533 531 if (IS_ERR(bs->clk)) { 534 532 err = PTR_ERR(bs->clk); 535 533 dev_err(&pdev->dev, "could not get clk: %d\n", err); 536 - goto out_master_put; 534 + return err; 537 535 } 538 536 539 537 bs->irq = platform_get_irq(pdev, 0); 540 - if (bs->irq <= 0) { 541 - err = bs->irq ? bs->irq : -ENODEV; 542 - goto out_master_put; 543 - } 538 + if (bs->irq <= 0) 539 + return bs->irq ? bs->irq : -ENODEV; 544 540 545 541 /* this also enables the HW block */ 546 542 err = clk_prepare_enable(bs->clk); 547 543 if (err) { 548 544 dev_err(&pdev->dev, "could not prepare clock: %d\n", err); 549 - goto out_master_put; 545 + return err; 550 546 } 551 547 552 548 /* just checking if the clock returns a sane value */ ··· 577 581 578 582 out_clk_disable: 579 583 clk_disable_unprepare(bs->clk); 580 - out_master_put: 581 - spi_master_put(master); 582 584 return err; 583 585 } 584 586
+2
drivers/spi/spi-cadence-quadspi.c
··· 1260 1260 /* Obtain QSPI reset control */ 1261 1261 rstc = devm_reset_control_get_optional_exclusive(dev, "qspi"); 1262 1262 if (IS_ERR(rstc)) { 1263 + ret = PTR_ERR(rstc); 1263 1264 dev_err(dev, "Cannot get QSPI reset.\n"); 1264 1265 goto probe_reset_failed; 1265 1266 } 1266 1267 1267 1268 rstc_ocp = devm_reset_control_get_optional_exclusive(dev, "qspi-ocp"); 1268 1269 if (IS_ERR(rstc_ocp)) { 1270 + ret = PTR_ERR(rstc_ocp); 1269 1271 dev_err(dev, "Cannot get QSPI OCP reset.\n"); 1270 1272 goto probe_reset_failed; 1271 1273 }
+2 -2
drivers/spi/spi-dw-core.c
··· 357 357 dw_writel(dws, DW_SPI_TXFTLR, level); 358 358 dw_writel(dws, DW_SPI_RXFTLR, level - 1); 359 359 360 + dws->transfer_handler = dw_spi_transfer_handler; 361 + 360 362 imask = SPI_INT_TXEI | SPI_INT_TXOI | SPI_INT_RXUI | SPI_INT_RXOI | 361 363 SPI_INT_RXFI; 362 364 spi_umask_intr(dws, imask); 363 - 364 - dws->transfer_handler = dw_spi_transfer_handler; 365 365 } 366 366 367 367 /*
+1 -1
drivers/spi/spi-fsi.c
··· 477 477 478 478 rc = fsi_spi_check_mux(ctx->fsi, ctx->dev); 479 479 if (rc) 480 - return rc; 480 + goto error; 481 481 482 482 list_for_each_entry(transfer, &mesg->transfers, transfer_list) { 483 483 struct fsi_spi_sequence seq;
-3
drivers/spi/spi-fsl-lpspi.c
··· 938 938 spi_controller_get_devdata(controller); 939 939 940 940 pm_runtime_disable(fsl_lpspi->dev); 941 - 942 - spi_master_put(controller); 943 - 944 941 return 0; 945 942 } 946 943
+1 -1
drivers/spi/spi-npcm-fiu.c
··· 679 679 struct resource *res; 680 680 int id; 681 681 682 - ctrl = spi_alloc_master(dev, sizeof(*fiu)); 682 + ctrl = devm_spi_alloc_master(dev, sizeof(*fiu)); 683 683 if (!ctrl) 684 684 return -ENOMEM; 685 685
+63 -18
drivers/spi/spi.c
··· 812 812 enable = !enable; 813 813 814 814 if (spi->cs_gpiod || gpio_is_valid(spi->cs_gpio)) { 815 - /* 816 - * Honour the SPI_NO_CS flag and invert the enable line, as 817 - * active low is default for SPI. Execution paths that handle 818 - * polarity inversion in gpiolib (such as device tree) will 819 - * enforce active high using the SPI_CS_HIGH resulting in a 820 - * double inversion through the code above. 821 - */ 822 815 if (!(spi->mode & SPI_NO_CS)) { 823 816 if (spi->cs_gpiod) 817 + /* polarity handled by gpiolib */ 824 818 gpiod_set_value_cansleep(spi->cs_gpiod, 825 - !enable); 819 + enable1); 826 820 else 821 + /* 822 + * invert the enable line, as active low is 823 + * default for SPI. 824 + */ 827 825 gpio_set_value_cansleep(spi->cs_gpio, !enable); 828 826 } 829 827 /* Some SPI masters need both GPIO CS & slave_select */ ··· 1990 1992 } 1991 1993 spi->chip_select = value; 1992 1994 1993 - /* 1994 - * For descriptors associated with the device, polarity inversion is 1995 - * handled in the gpiolib, so all gpio chip selects are "active high" 1996 - * in the logical sense, the gpiolib will invert the line if need be. 1997 - */ 1998 - if ((ctlr->use_gpio_descriptors) && ctlr->cs_gpiods && 1999 - ctlr->cs_gpiods[spi->chip_select]) 2000 - spi->mode |= SPI_CS_HIGH; 2001 - 2002 1995 /* Device speed */ 2003 1996 if (!of_property_read_u32(nc, "spi-max-frequency", &value)) 2004 1997 spi->max_speed_hz = value; ··· 2442 2453 } 2443 2454 EXPORT_SYMBOL_GPL(__spi_alloc_controller); 2444 2455 2456 + static void devm_spi_release_controller(struct device *dev, void *ctlr) 2457 + { 2458 + spi_controller_put(*(struct spi_controller **)ctlr); 2459 + } 2460 + 2461 + /** 2462 + * __devm_spi_alloc_controller - resource-managed __spi_alloc_controller() 2463 + * @dev: physical device of SPI controller 2464 + * @size: how much zeroed driver-private data to allocate 2465 + * @slave: whether to allocate an SPI master (false) or SPI slave (true) 2466 + * Context: can sleep 2467 + * 2468 + * Allocate an SPI controller and automatically release a reference on it 2469 + * when @dev is unbound from its driver. Drivers are thus relieved from 2470 + * having to call spi_controller_put(). 2471 + * 2472 + * The arguments to this function are identical to __spi_alloc_controller(). 2473 + * 2474 + * Return: the SPI controller structure on success, else NULL. 2475 + */ 2476 + struct spi_controller *__devm_spi_alloc_controller(struct device *dev, 2477 + unsigned int size, 2478 + bool slave) 2479 + { 2480 + struct spi_controller **ptr, *ctlr; 2481 + 2482 + ptr = devres_alloc(devm_spi_release_controller, sizeof(*ptr), 2483 + GFP_KERNEL); 2484 + if (!ptr) 2485 + return NULL; 2486 + 2487 + ctlr = __spi_alloc_controller(dev, size, slave); 2488 + if (ctlr) { 2489 + *ptr = ctlr; 2490 + devres_add(dev, ptr); 2491 + } else { 2492 + devres_free(ptr); 2493 + } 2494 + 2495 + return ctlr; 2496 + } 2497 + EXPORT_SYMBOL_GPL(__devm_spi_alloc_controller); 2498 + 2445 2499 #ifdef CONFIG_OF 2446 2500 static int of_spi_get_gpio_numbers(struct spi_controller *ctlr) 2447 2501 { ··· 2821 2789 } 2822 2790 EXPORT_SYMBOL_GPL(devm_spi_register_controller); 2823 2791 2792 + static int devm_spi_match_controller(struct device *dev, void *res, void *ctlr) 2793 + { 2794 + return *(struct spi_controller **)res == ctlr; 2795 + } 2796 + 2824 2797 static int __unregister(struct device *dev, void *null) 2825 2798 { 2826 2799 spi_unregister_device(to_spi_device(dev)); ··· 2867 2830 list_del(&ctlr->list); 2868 2831 mutex_unlock(&board_lock); 2869 2832 2870 - device_unregister(&ctlr->dev); 2833 + device_del(&ctlr->dev); 2834 + 2835 + /* Release the last reference on the controller if its driver 2836 + * has not yet been converted to devm_spi_alloc_master/slave(). 2837 + */ 2838 + if (!devres_find(ctlr->dev.parent, devm_spi_release_controller, 2839 + devm_spi_match_controller, ctlr)) 2840 + put_device(&ctlr->dev); 2841 + 2871 2842 /* free bus id */ 2872 2843 mutex_lock(&board_lock); 2873 2844 if (found == ctlr)
+19
include/linux/spi/spi.h
··· 734 734 return __spi_alloc_controller(host, size, true); 735 735 } 736 736 737 + struct spi_controller *__devm_spi_alloc_controller(struct device *dev, 738 + unsigned int size, 739 + bool slave); 740 + 741 + static inline struct spi_controller *devm_spi_alloc_master(struct device *dev, 742 + unsigned int size) 743 + { 744 + return __devm_spi_alloc_controller(dev, size, false); 745 + } 746 + 747 + static inline struct spi_controller *devm_spi_alloc_slave(struct device *dev, 748 + unsigned int size) 749 + { 750 + if (!IS_ENABLED(CONFIG_SPI_SLAVE)) 751 + return NULL; 752 + 753 + return __devm_spi_alloc_controller(dev, size, true); 754 + } 755 + 737 756 extern int spi_register_controller(struct spi_controller *ctlr); 738 757 extern int devm_spi_register_controller(struct device *dev, 739 758 struct spi_controller *ctlr);