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Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/amd/display: Phase 1 Add Bw Allocation source and header files
[WHY]
To implement BW Allocation as per USB4 spec chapter 10.7
[HOW]
Implement the DP-Tx portion of the logic to interact with DPIA
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: Mustapha Ghaddar <mghaddar@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Mustapha Ghaddar
and committed by
Alex Deucher
fe4e2662
7ce24a36
+111
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drivers/gpu/drm/amd/display/dc/dc_link.h
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drivers/gpu/drm/amd/display/dc/dc_link.h
···
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bool optimize_edp_link_rate; /* eDP ILR */
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} ilr;
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};
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/*
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* USB4 DPIA BW ALLOCATION STRUCTS
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*/
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struct dc_dpia_bw_alloc {
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int sink_verified_bw; // The Verified BW that sink can allocated and use that has been verified already
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int sink_allocated_bw; // The Actual Allocated BW that sink currently allocated
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int padding_bw; // The Padding "Un-used" BW allocated by CM for padding reasons
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int sink_max_bw; // The Max BW that sink can require/support
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int estimated_bw; // The estimated available BW for this DPIA
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int bw_granularity; // BW Granularity
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bool bw_alloc_enabled; // The BW Alloc Mode Support is turned ON for all 3: DP-Tx & Dpia & CM
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};
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/*
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* A link contains one or more sinks and their connected status.
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* The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
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drivers/gpu/drm/amd/display/dc/link/link_dp_dpia_bw.c
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drivers/gpu/drm/amd/display/dc/link/link_dp_dpia_bw.c
···
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/*
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* Copyright 2022 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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/*********************************************************************/
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// USB4 DPIA BANDWIDTH ALLOCATION LOGIC
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/*********************************************************************/
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drivers/gpu/drm/amd/display/dc/link/link_dp_dpia_bw.h
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drivers/gpu/drm/amd/display/dc/link/link_dp_dpia_bw.h
···
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/*
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* Copyright 2021 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef DC_INC_LINK_DP_DPIA_BW_H_
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#define DC_INC_LINK_DP_DPIA_BW_H_
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// XXX: TODO: Re-add for Phase 2
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/* Number of Host Routers per motherboard is 2 and 2 DPIA per host router */
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#define MAX_HR_NUM 2
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struct dc_host_router_bw_alloc {
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int max_bw[MAX_HR_NUM]; // The Max BW that each Host Router has available to be shared btw DPIAs
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int total_estimated_bw[MAX_HR_NUM]; // The Total Verified and available BW that Host Router has
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};
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/*
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* Enable BW Allocation Mode Support from the DP-Tx side
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*
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* @link: pointer to the dc_link struct instance
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*
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* return: SUCCESS or FAILURE
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*/
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bool set_dptx_usb4_bw_alloc_support(struct dc_link *link);
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/*
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* Send a request from DP-Tx requesting to allocate BW remotely after
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* allocating it locally. This will get processed by CM and a CB function
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* will be called.
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*
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* @link: pointer to the dc_link struct instance
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* @req_bw: The requested bw in Kbyte to allocated
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*
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* return: none
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*/
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void set_usb4_req_bw_req(struct dc_link *link, int req_bw);
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/*
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* CB function for when the status of the Req above is complete. We will
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* find out the result of allocating on CM and update structs accordingly
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*
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* @link: pointer to the dc_link struct instance
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*
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* return: none
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*/
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void get_usb4_req_bw_resp(struct dc_link *link);
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#endif /* DC_INC_LINK_DP_DPIA_BW_H_ */