Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

x86/microcode: Merge the early microcode loader

Merge the early loader functionality into the driver proper. The
diff is huge but logically, it is simply moving code from the
_early.c files into the main driver.

Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Jones <davej@codemonkey.org.uk>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Len Brown <len.brown@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Link: http://lkml.kernel.org/r/1445334889-300-3-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>

authored by

Borislav Petkov and committed by
Ingo Molnar
fe055896 9a2bc335

+1399 -1477
+1 -18
arch/x86/Kconfig
··· 1126 1126 bool "CPU microcode loading support" 1127 1127 default y 1128 1128 depends on CPU_SUP_AMD || CPU_SUP_INTEL 1129 + depends on BLK_DEV_INITRD 1129 1130 select FW_LOADER 1130 1131 ---help--- 1131 1132 ··· 1167 1166 config MICROCODE_OLD_INTERFACE 1168 1167 def_bool y 1169 1168 depends on MICROCODE 1170 - 1171 - config MICROCODE_INTEL_EARLY 1172 - bool 1173 - 1174 - config MICROCODE_AMD_EARLY 1175 - bool 1176 - 1177 - config MICROCODE_EARLY 1178 - bool "Early load microcode" 1179 - depends on MICROCODE && BLK_DEV_INITRD 1180 - select MICROCODE_INTEL_EARLY if MICROCODE_INTEL 1181 - select MICROCODE_AMD_EARLY if MICROCODE_AMD 1182 - default y 1183 - help 1184 - This option provides functionality to read additional microcode data 1185 - at the beginning of initrd image. The data tells kernel to load 1186 - microcode to CPU's as early as possible. No functional change if no 1187 - microcode data is glued to the initrd, therefore it's safe to say Y. 1188 1169 1189 1170 config X86_MSR 1190 1171 tristate "/dev/cpu/*/msr - Model-specific register support"
+7 -12
arch/x86/include/asm/microcode.h
··· 81 81 static inline void __exit exit_amd_microcode(void) {} 82 82 #endif 83 83 84 - #ifdef CONFIG_MICROCODE_EARLY 85 84 #define MAX_UCODE_COUNT 128 86 85 87 86 #define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24)) ··· 155 156 return model; 156 157 } 157 158 159 + #ifdef CONFIG_MICROCODE 158 160 extern void __init load_ucode_bsp(void); 159 161 extern void load_ucode_ap(void); 160 162 extern int __init save_microcode_in_initrd(void); 161 163 void reload_early_microcode(void); 162 164 extern bool get_builtin_firmware(struct cpio_data *cd, const char *name); 163 165 #else 164 - static inline void __init load_ucode_bsp(void) {} 165 - static inline void load_ucode_ap(void) {} 166 - static inline int __init save_microcode_in_initrd(void) 167 - { 168 - return 0; 169 - } 170 - static inline void reload_early_microcode(void) {} 171 - static inline bool get_builtin_firmware(struct cpio_data *cd, const char *name) 172 - { 173 - return false; 174 - } 166 + static inline void __init load_ucode_bsp(void) { } 167 + static inline void load_ucode_ap(void) { } 168 + static inline int __init save_microcode_in_initrd(void) { return 0; } 169 + static inline void reload_early_microcode(void) { } 170 + static inline bool 171 + get_builtin_firmware(struct cpio_data *cd, const char *name) { return false; } 175 172 #endif 176 173 #endif /* _ASM_X86_MICROCODE_H */
+1 -1
arch/x86/include/asm/microcode_amd.h
··· 64 64 #define PATCH_MAX_SIZE PAGE_SIZE 65 65 extern u8 amd_ucode_patch[PATCH_MAX_SIZE]; 66 66 67 - #ifdef CONFIG_MICROCODE_AMD_EARLY 67 + #ifdef CONFIG_MICROCODE_AMD 68 68 extern void __init load_ucode_amd_bsp(unsigned int family); 69 69 extern void load_ucode_amd_ap(void); 70 70 extern int __init save_microcode_in_initrd_amd(void);
+3 -7
arch/x86/include/asm/microcode_intel.h
··· 57 57 extern int microcode_sanity_check(void *mc, int print_err); 58 58 extern int find_matching_signature(void *mc, unsigned int csig, int cpf); 59 59 60 - #ifdef CONFIG_MICROCODE_INTEL_EARLY 60 + #ifdef CONFIG_MICROCODE_INTEL 61 61 extern void __init load_ucode_intel_bsp(void); 62 62 extern void load_ucode_intel_ap(void); 63 63 extern void show_ucode_info_early(void); ··· 71 71 static inline void reload_ucode_intel(void) {} 72 72 #endif 73 73 74 - #if defined(CONFIG_MICROCODE_INTEL_EARLY) && defined(CONFIG_HOTPLUG_CPU) 74 + #ifdef CONFIG_HOTPLUG_CPU 75 75 extern int save_mc_for_early(u8 *mc); 76 76 #else 77 - static inline int save_mc_for_early(u8 *mc) 78 - { 79 - return 0; 80 - } 77 + static inline int save_mc_for_early(u8 *mc) { return 0; } 81 78 #endif 82 - 83 79 #endif /* _ASM_X86_MICROCODE_INTEL_H */
-3
arch/x86/kernel/cpu/microcode/Makefile
··· 2 2 obj-$(CONFIG_MICROCODE) += microcode.o 3 3 microcode-$(CONFIG_MICROCODE_INTEL) += intel.o intel_lib.o 4 4 microcode-$(CONFIG_MICROCODE_AMD) += amd.o 5 - obj-$(CONFIG_MICROCODE_EARLY) += core_early.o 6 - obj-$(CONFIG_MICROCODE_INTEL_EARLY) += intel_early.o 7 - obj-$(CONFIG_MICROCODE_AMD_EARLY) += amd_early.o
+441 -5
arch/x86/kernel/cpu/microcode/amd.c
··· 1 1 /* 2 2 * AMD CPU Microcode Update Driver for Linux 3 + * 4 + * This driver allows to upgrade microcode on F10h AMD 5 + * CPUs and later. 6 + * 3 7 * Copyright (C) 2008-2011 Advanced Micro Devices Inc. 4 8 * 5 9 * Author: Peter Oruba <peter.oruba@amd.com> ··· 15 11 * Andreas Herrmann <herrmann.der.user@googlemail.com> 16 12 * Borislav Petkov <bp@alien8.de> 17 13 * 18 - * This driver allows to upgrade microcode on F10h AMD 19 - * CPUs and later. 14 + * early loader: 15 + * Copyright (C) 2013 Advanced Micro Devices, Inc. 16 + * 17 + * Author: Jacob Shin <jacob.shin@amd.com> 18 + * Fixes: Borislav Petkov <bp@suse.de> 20 19 * 21 20 * Licensed under the terms of the GNU General Public 22 21 * License version 2. See file COPYING for details. 23 22 */ 24 - 25 23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 26 24 25 + #include <linux/earlycpio.h> 27 26 #include <linux/firmware.h> 28 27 #include <linux/uaccess.h> 29 28 #include <linux/vmalloc.h> 29 + #include <linux/initrd.h> 30 30 #include <linux/kernel.h> 31 31 #include <linux/module.h> 32 32 #include <linux/pci.h> 33 33 34 + #include <asm/microcode_amd.h> 34 35 #include <asm/microcode.h> 35 36 #include <asm/processor.h> 37 + #include <asm/setup.h> 38 + #include <asm/cpu.h> 36 39 #include <asm/msr.h> 37 - #include <asm/microcode_amd.h> 38 40 39 41 MODULE_DESCRIPTION("AMD Microcode Update Driver"); 40 42 MODULE_AUTHOR("Peter Oruba"); ··· 57 47 58 48 static LIST_HEAD(pcache); 59 49 50 + /* 51 + * This points to the current valid container of microcode patches which we will 52 + * save from the initrd before jettisoning its contents. 53 + */ 54 + static u8 *container; 55 + static size_t container_size; 56 + 57 + static u32 ucode_new_rev; 58 + u8 amd_ucode_patch[PATCH_MAX_SIZE]; 59 + static u16 this_equiv_id; 60 + 61 + static struct cpio_data ucode_cpio; 62 + 63 + /* 64 + * Microcode patch container file is prepended to the initrd in cpio format. 65 + * See Documentation/x86/early-microcode.txt 66 + */ 67 + static __initdata char ucode_path[] = "kernel/x86/microcode/AuthenticAMD.bin"; 68 + 69 + static struct cpio_data __init find_ucode_in_initrd(void) 70 + { 71 + long offset = 0; 72 + char *path; 73 + void *start; 74 + size_t size; 75 + 76 + #ifdef CONFIG_X86_32 77 + struct boot_params *p; 78 + 79 + /* 80 + * On 32-bit, early load occurs before paging is turned on so we need 81 + * to use physical addresses. 82 + */ 83 + p = (struct boot_params *)__pa_nodebug(&boot_params); 84 + path = (char *)__pa_nodebug(ucode_path); 85 + start = (void *)p->hdr.ramdisk_image; 86 + size = p->hdr.ramdisk_size; 87 + #else 88 + path = ucode_path; 89 + start = (void *)(boot_params.hdr.ramdisk_image + PAGE_OFFSET); 90 + size = boot_params.hdr.ramdisk_size; 91 + #endif 92 + 93 + return find_cpio_data(path, start, size, &offset); 94 + } 95 + 96 + static size_t compute_container_size(u8 *data, u32 total_size) 97 + { 98 + size_t size = 0; 99 + u32 *header = (u32 *)data; 100 + 101 + if (header[0] != UCODE_MAGIC || 102 + header[1] != UCODE_EQUIV_CPU_TABLE_TYPE || /* type */ 103 + header[2] == 0) /* size */ 104 + return size; 105 + 106 + size = header[2] + CONTAINER_HDR_SZ; 107 + total_size -= size; 108 + data += size; 109 + 110 + while (total_size) { 111 + u16 patch_size; 112 + 113 + header = (u32 *)data; 114 + 115 + if (header[0] != UCODE_UCODE_TYPE) 116 + break; 117 + 118 + /* 119 + * Sanity-check patch size. 120 + */ 121 + patch_size = header[1]; 122 + if (patch_size > PATCH_MAX_SIZE) 123 + break; 124 + 125 + size += patch_size + SECTION_HDR_SIZE; 126 + data += patch_size + SECTION_HDR_SIZE; 127 + total_size -= patch_size + SECTION_HDR_SIZE; 128 + } 129 + 130 + return size; 131 + } 132 + 133 + /* 134 + * Early load occurs before we can vmalloc(). So we look for the microcode 135 + * patch container file in initrd, traverse equivalent cpu table, look for a 136 + * matching microcode patch, and update, all in initrd memory in place. 137 + * When vmalloc() is available for use later -- on 64-bit during first AP load, 138 + * and on 32-bit during save_microcode_in_initrd_amd() -- we can call 139 + * load_microcode_amd() to save equivalent cpu table and microcode patches in 140 + * kernel heap memory. 141 + */ 142 + static void apply_ucode_in_initrd(void *ucode, size_t size, bool save_patch) 143 + { 144 + struct equiv_cpu_entry *eq; 145 + size_t *cont_sz; 146 + u32 *header; 147 + u8 *data, **cont; 148 + u8 (*patch)[PATCH_MAX_SIZE]; 149 + u16 eq_id = 0; 150 + int offset, left; 151 + u32 rev, eax, ebx, ecx, edx; 152 + u32 *new_rev; 153 + 154 + #ifdef CONFIG_X86_32 155 + new_rev = (u32 *)__pa_nodebug(&ucode_new_rev); 156 + cont_sz = (size_t *)__pa_nodebug(&container_size); 157 + cont = (u8 **)__pa_nodebug(&container); 158 + patch = (u8 (*)[PATCH_MAX_SIZE])__pa_nodebug(&amd_ucode_patch); 159 + #else 160 + new_rev = &ucode_new_rev; 161 + cont_sz = &container_size; 162 + cont = &container; 163 + patch = &amd_ucode_patch; 164 + #endif 165 + 166 + data = ucode; 167 + left = size; 168 + header = (u32 *)data; 169 + 170 + /* find equiv cpu table */ 171 + if (header[0] != UCODE_MAGIC || 172 + header[1] != UCODE_EQUIV_CPU_TABLE_TYPE || /* type */ 173 + header[2] == 0) /* size */ 174 + return; 175 + 176 + eax = 0x00000001; 177 + ecx = 0; 178 + native_cpuid(&eax, &ebx, &ecx, &edx); 179 + 180 + while (left > 0) { 181 + eq = (struct equiv_cpu_entry *)(data + CONTAINER_HDR_SZ); 182 + 183 + *cont = data; 184 + 185 + /* Advance past the container header */ 186 + offset = header[2] + CONTAINER_HDR_SZ; 187 + data += offset; 188 + left -= offset; 189 + 190 + eq_id = find_equiv_id(eq, eax); 191 + if (eq_id) { 192 + this_equiv_id = eq_id; 193 + *cont_sz = compute_container_size(*cont, left + offset); 194 + 195 + /* 196 + * truncate how much we need to iterate over in the 197 + * ucode update loop below 198 + */ 199 + left = *cont_sz - offset; 200 + break; 201 + } 202 + 203 + /* 204 + * support multiple container files appended together. if this 205 + * one does not have a matching equivalent cpu entry, we fast 206 + * forward to the next container file. 207 + */ 208 + while (left > 0) { 209 + header = (u32 *)data; 210 + if (header[0] == UCODE_MAGIC && 211 + header[1] == UCODE_EQUIV_CPU_TABLE_TYPE) 212 + break; 213 + 214 + offset = header[1] + SECTION_HDR_SIZE; 215 + data += offset; 216 + left -= offset; 217 + } 218 + 219 + /* mark where the next microcode container file starts */ 220 + offset = data - (u8 *)ucode; 221 + ucode = data; 222 + } 223 + 224 + if (!eq_id) { 225 + *cont = NULL; 226 + *cont_sz = 0; 227 + return; 228 + } 229 + 230 + if (check_current_patch_level(&rev, true)) 231 + return; 232 + 233 + while (left > 0) { 234 + struct microcode_amd *mc; 235 + 236 + header = (u32 *)data; 237 + if (header[0] != UCODE_UCODE_TYPE || /* type */ 238 + header[1] == 0) /* size */ 239 + break; 240 + 241 + mc = (struct microcode_amd *)(data + SECTION_HDR_SIZE); 242 + 243 + if (eq_id == mc->hdr.processor_rev_id && rev < mc->hdr.patch_id) { 244 + 245 + if (!__apply_microcode_amd(mc)) { 246 + rev = mc->hdr.patch_id; 247 + *new_rev = rev; 248 + 249 + if (save_patch) 250 + memcpy(patch, mc, 251 + min_t(u32, header[1], PATCH_MAX_SIZE)); 252 + } 253 + } 254 + 255 + offset = header[1] + SECTION_HDR_SIZE; 256 + data += offset; 257 + left -= offset; 258 + } 259 + } 260 + 261 + static bool __init load_builtin_amd_microcode(struct cpio_data *cp, 262 + unsigned int family) 263 + { 264 + #ifdef CONFIG_X86_64 265 + char fw_name[36] = "amd-ucode/microcode_amd.bin"; 266 + 267 + if (family >= 0x15) 268 + snprintf(fw_name, sizeof(fw_name), 269 + "amd-ucode/microcode_amd_fam%.2xh.bin", family); 270 + 271 + return get_builtin_firmware(cp, fw_name); 272 + #else 273 + return false; 274 + #endif 275 + } 276 + 277 + void __init load_ucode_amd_bsp(unsigned int family) 278 + { 279 + struct cpio_data cp; 280 + void **data; 281 + size_t *size; 282 + 283 + #ifdef CONFIG_X86_32 284 + data = (void **)__pa_nodebug(&ucode_cpio.data); 285 + size = (size_t *)__pa_nodebug(&ucode_cpio.size); 286 + #else 287 + data = &ucode_cpio.data; 288 + size = &ucode_cpio.size; 289 + #endif 290 + 291 + cp = find_ucode_in_initrd(); 292 + if (!cp.data) { 293 + if (!load_builtin_amd_microcode(&cp, family)) 294 + return; 295 + } 296 + 297 + *data = cp.data; 298 + *size = cp.size; 299 + 300 + apply_ucode_in_initrd(cp.data, cp.size, true); 301 + } 302 + 303 + #ifdef CONFIG_X86_32 304 + /* 305 + * On 32-bit, since AP's early load occurs before paging is turned on, we 306 + * cannot traverse cpu_equiv_table and pcache in kernel heap memory. So during 307 + * cold boot, AP will apply_ucode_in_initrd() just like the BSP. During 308 + * save_microcode_in_initrd_amd() BSP's patch is copied to amd_ucode_patch, 309 + * which is used upon resume from suspend. 310 + */ 311 + void load_ucode_amd_ap(void) 312 + { 313 + struct microcode_amd *mc; 314 + size_t *usize; 315 + void **ucode; 316 + 317 + mc = (struct microcode_amd *)__pa_nodebug(amd_ucode_patch); 318 + if (mc->hdr.patch_id && mc->hdr.processor_rev_id) { 319 + __apply_microcode_amd(mc); 320 + return; 321 + } 322 + 323 + ucode = (void *)__pa_nodebug(&container); 324 + usize = (size_t *)__pa_nodebug(&container_size); 325 + 326 + if (!*ucode || !*usize) 327 + return; 328 + 329 + apply_ucode_in_initrd(*ucode, *usize, false); 330 + } 331 + 332 + static void __init collect_cpu_sig_on_bsp(void *arg) 333 + { 334 + unsigned int cpu = smp_processor_id(); 335 + struct ucode_cpu_info *uci = ucode_cpu_info + cpu; 336 + 337 + uci->cpu_sig.sig = cpuid_eax(0x00000001); 338 + } 339 + 340 + static void __init get_bsp_sig(void) 341 + { 342 + unsigned int bsp = boot_cpu_data.cpu_index; 343 + struct ucode_cpu_info *uci = ucode_cpu_info + bsp; 344 + 345 + if (!uci->cpu_sig.sig) 346 + smp_call_function_single(bsp, collect_cpu_sig_on_bsp, NULL, 1); 347 + } 348 + #else 349 + void load_ucode_amd_ap(void) 350 + { 351 + unsigned int cpu = smp_processor_id(); 352 + struct equiv_cpu_entry *eq; 353 + struct microcode_amd *mc; 354 + u32 rev, eax; 355 + u16 eq_id; 356 + 357 + /* Exit if called on the BSP. */ 358 + if (!cpu) 359 + return; 360 + 361 + if (!container) 362 + return; 363 + 364 + /* 365 + * 64-bit runs with paging enabled, thus early==false. 366 + */ 367 + if (check_current_patch_level(&rev, false)) 368 + return; 369 + 370 + eax = cpuid_eax(0x00000001); 371 + eq = (struct equiv_cpu_entry *)(container + CONTAINER_HDR_SZ); 372 + 373 + eq_id = find_equiv_id(eq, eax); 374 + if (!eq_id) 375 + return; 376 + 377 + if (eq_id == this_equiv_id) { 378 + mc = (struct microcode_amd *)amd_ucode_patch; 379 + 380 + if (mc && rev < mc->hdr.patch_id) { 381 + if (!__apply_microcode_amd(mc)) 382 + ucode_new_rev = mc->hdr.patch_id; 383 + } 384 + 385 + } else { 386 + if (!ucode_cpio.data) 387 + return; 388 + 389 + /* 390 + * AP has a different equivalence ID than BSP, looks like 391 + * mixed-steppings silicon so go through the ucode blob anew. 392 + */ 393 + apply_ucode_in_initrd(ucode_cpio.data, ucode_cpio.size, false); 394 + } 395 + } 396 + #endif 397 + 398 + int __init save_microcode_in_initrd_amd(void) 399 + { 400 + unsigned long cont; 401 + int retval = 0; 402 + enum ucode_state ret; 403 + u8 *cont_va; 404 + u32 eax; 405 + 406 + if (!container) 407 + return -EINVAL; 408 + 409 + #ifdef CONFIG_X86_32 410 + get_bsp_sig(); 411 + cont = (unsigned long)container; 412 + cont_va = __va(container); 413 + #else 414 + /* 415 + * We need the physical address of the container for both bitness since 416 + * boot_params.hdr.ramdisk_image is a physical address. 417 + */ 418 + cont = __pa(container); 419 + cont_va = container; 420 + #endif 421 + 422 + /* 423 + * Take into account the fact that the ramdisk might get relocated and 424 + * therefore we need to recompute the container's position in virtual 425 + * memory space. 426 + */ 427 + if (relocated_ramdisk) 428 + container = (u8 *)(__va(relocated_ramdisk) + 429 + (cont - boot_params.hdr.ramdisk_image)); 430 + else 431 + container = cont_va; 432 + 433 + if (ucode_new_rev) 434 + pr_info("microcode: updated early to new patch_level=0x%08x\n", 435 + ucode_new_rev); 436 + 437 + eax = cpuid_eax(0x00000001); 438 + eax = ((eax >> 8) & 0xf) + ((eax >> 20) & 0xff); 439 + 440 + ret = load_microcode_amd(smp_processor_id(), eax, container, container_size); 441 + if (ret != UCODE_OK) 442 + retval = -EINVAL; 443 + 444 + /* 445 + * This will be freed any msec now, stash patches for the current 446 + * family and switch to patch cache for cpu hotplug, etc later. 447 + */ 448 + container = NULL; 449 + container_size = 0; 450 + 451 + return retval; 452 + } 453 + 454 + void reload_ucode_amd(void) 455 + { 456 + struct microcode_amd *mc; 457 + u32 rev; 458 + 459 + /* 460 + * early==false because this is a syscore ->resume path and by 461 + * that time paging is long enabled. 462 + */ 463 + if (check_current_patch_level(&rev, false)) 464 + return; 465 + 466 + mc = (struct microcode_amd *)amd_ucode_patch; 467 + 468 + if (mc && rev < mc->hdr.patch_id) { 469 + if (!__apply_microcode_amd(mc)) { 470 + ucode_new_rev = mc->hdr.patch_id; 471 + pr_info("microcode: reload patch_level=0x%08x\n", 472 + ucode_new_rev); 473 + } 474 + } 475 + } 60 476 static u16 __find_equiv_id(unsigned int cpu) 61 477 { 62 478 struct ucode_cpu_info *uci = ucode_cpu_info + cpu; ··· 871 435 if (ret != UCODE_OK) 872 436 cleanup(); 873 437 874 - #if defined(CONFIG_MICROCODE_AMD_EARLY) && defined(CONFIG_X86_32) 438 + #ifdef CONFIG_X86_32 875 439 /* save BSP's matching patch for early load */ 876 440 if (cpu_data(cpu).cpu_index == boot_cpu_data.cpu_index) { 877 441 struct ucode_patch *p = find_patch(cpu);
-444
arch/x86/kernel/cpu/microcode/amd_early.c
··· 1 - /* 2 - * Copyright (C) 2013 Advanced Micro Devices, Inc. 3 - * 4 - * Author: Jacob Shin <jacob.shin@amd.com> 5 - * Fixes: Borislav Petkov <bp@suse.de> 6 - * 7 - * This program is free software; you can redistribute it and/or modify 8 - * it under the terms of the GNU General Public License version 2 as 9 - * published by the Free Software Foundation. 10 - */ 11 - 12 - #include <linux/earlycpio.h> 13 - #include <linux/initrd.h> 14 - 15 - #include <asm/cpu.h> 16 - #include <asm/setup.h> 17 - #include <asm/microcode_amd.h> 18 - 19 - /* 20 - * This points to the current valid container of microcode patches which we will 21 - * save from the initrd before jettisoning its contents. 22 - */ 23 - static u8 *container; 24 - static size_t container_size; 25 - 26 - static u32 ucode_new_rev; 27 - u8 amd_ucode_patch[PATCH_MAX_SIZE]; 28 - static u16 this_equiv_id; 29 - 30 - static struct cpio_data ucode_cpio; 31 - 32 - /* 33 - * Microcode patch container file is prepended to the initrd in cpio format. 34 - * See Documentation/x86/early-microcode.txt 35 - */ 36 - static __initdata char ucode_path[] = "kernel/x86/microcode/AuthenticAMD.bin"; 37 - 38 - static struct cpio_data __init find_ucode_in_initrd(void) 39 - { 40 - long offset = 0; 41 - char *path; 42 - void *start; 43 - size_t size; 44 - 45 - #ifdef CONFIG_X86_32 46 - struct boot_params *p; 47 - 48 - /* 49 - * On 32-bit, early load occurs before paging is turned on so we need 50 - * to use physical addresses. 51 - */ 52 - p = (struct boot_params *)__pa_nodebug(&boot_params); 53 - path = (char *)__pa_nodebug(ucode_path); 54 - start = (void *)p->hdr.ramdisk_image; 55 - size = p->hdr.ramdisk_size; 56 - #else 57 - path = ucode_path; 58 - start = (void *)(boot_params.hdr.ramdisk_image + PAGE_OFFSET); 59 - size = boot_params.hdr.ramdisk_size; 60 - #endif 61 - 62 - return find_cpio_data(path, start, size, &offset); 63 - } 64 - 65 - static size_t compute_container_size(u8 *data, u32 total_size) 66 - { 67 - size_t size = 0; 68 - u32 *header = (u32 *)data; 69 - 70 - if (header[0] != UCODE_MAGIC || 71 - header[1] != UCODE_EQUIV_CPU_TABLE_TYPE || /* type */ 72 - header[2] == 0) /* size */ 73 - return size; 74 - 75 - size = header[2] + CONTAINER_HDR_SZ; 76 - total_size -= size; 77 - data += size; 78 - 79 - while (total_size) { 80 - u16 patch_size; 81 - 82 - header = (u32 *)data; 83 - 84 - if (header[0] != UCODE_UCODE_TYPE) 85 - break; 86 - 87 - /* 88 - * Sanity-check patch size. 89 - */ 90 - patch_size = header[1]; 91 - if (patch_size > PATCH_MAX_SIZE) 92 - break; 93 - 94 - size += patch_size + SECTION_HDR_SIZE; 95 - data += patch_size + SECTION_HDR_SIZE; 96 - total_size -= patch_size + SECTION_HDR_SIZE; 97 - } 98 - 99 - return size; 100 - } 101 - 102 - /* 103 - * Early load occurs before we can vmalloc(). So we look for the microcode 104 - * patch container file in initrd, traverse equivalent cpu table, look for a 105 - * matching microcode patch, and update, all in initrd memory in place. 106 - * When vmalloc() is available for use later -- on 64-bit during first AP load, 107 - * and on 32-bit during save_microcode_in_initrd_amd() -- we can call 108 - * load_microcode_amd() to save equivalent cpu table and microcode patches in 109 - * kernel heap memory. 110 - */ 111 - static void apply_ucode_in_initrd(void *ucode, size_t size, bool save_patch) 112 - { 113 - struct equiv_cpu_entry *eq; 114 - size_t *cont_sz; 115 - u32 *header; 116 - u8 *data, **cont; 117 - u8 (*patch)[PATCH_MAX_SIZE]; 118 - u16 eq_id = 0; 119 - int offset, left; 120 - u32 rev, eax, ebx, ecx, edx; 121 - u32 *new_rev; 122 - 123 - #ifdef CONFIG_X86_32 124 - new_rev = (u32 *)__pa_nodebug(&ucode_new_rev); 125 - cont_sz = (size_t *)__pa_nodebug(&container_size); 126 - cont = (u8 **)__pa_nodebug(&container); 127 - patch = (u8 (*)[PATCH_MAX_SIZE])__pa_nodebug(&amd_ucode_patch); 128 - #else 129 - new_rev = &ucode_new_rev; 130 - cont_sz = &container_size; 131 - cont = &container; 132 - patch = &amd_ucode_patch; 133 - #endif 134 - 135 - data = ucode; 136 - left = size; 137 - header = (u32 *)data; 138 - 139 - /* find equiv cpu table */ 140 - if (header[0] != UCODE_MAGIC || 141 - header[1] != UCODE_EQUIV_CPU_TABLE_TYPE || /* type */ 142 - header[2] == 0) /* size */ 143 - return; 144 - 145 - eax = 0x00000001; 146 - ecx = 0; 147 - native_cpuid(&eax, &ebx, &ecx, &edx); 148 - 149 - while (left > 0) { 150 - eq = (struct equiv_cpu_entry *)(data + CONTAINER_HDR_SZ); 151 - 152 - *cont = data; 153 - 154 - /* Advance past the container header */ 155 - offset = header[2] + CONTAINER_HDR_SZ; 156 - data += offset; 157 - left -= offset; 158 - 159 - eq_id = find_equiv_id(eq, eax); 160 - if (eq_id) { 161 - this_equiv_id = eq_id; 162 - *cont_sz = compute_container_size(*cont, left + offset); 163 - 164 - /* 165 - * truncate how much we need to iterate over in the 166 - * ucode update loop below 167 - */ 168 - left = *cont_sz - offset; 169 - break; 170 - } 171 - 172 - /* 173 - * support multiple container files appended together. if this 174 - * one does not have a matching equivalent cpu entry, we fast 175 - * forward to the next container file. 176 - */ 177 - while (left > 0) { 178 - header = (u32 *)data; 179 - if (header[0] == UCODE_MAGIC && 180 - header[1] == UCODE_EQUIV_CPU_TABLE_TYPE) 181 - break; 182 - 183 - offset = header[1] + SECTION_HDR_SIZE; 184 - data += offset; 185 - left -= offset; 186 - } 187 - 188 - /* mark where the next microcode container file starts */ 189 - offset = data - (u8 *)ucode; 190 - ucode = data; 191 - } 192 - 193 - if (!eq_id) { 194 - *cont = NULL; 195 - *cont_sz = 0; 196 - return; 197 - } 198 - 199 - if (check_current_patch_level(&rev, true)) 200 - return; 201 - 202 - while (left > 0) { 203 - struct microcode_amd *mc; 204 - 205 - header = (u32 *)data; 206 - if (header[0] != UCODE_UCODE_TYPE || /* type */ 207 - header[1] == 0) /* size */ 208 - break; 209 - 210 - mc = (struct microcode_amd *)(data + SECTION_HDR_SIZE); 211 - 212 - if (eq_id == mc->hdr.processor_rev_id && rev < mc->hdr.patch_id) { 213 - 214 - if (!__apply_microcode_amd(mc)) { 215 - rev = mc->hdr.patch_id; 216 - *new_rev = rev; 217 - 218 - if (save_patch) 219 - memcpy(patch, mc, 220 - min_t(u32, header[1], PATCH_MAX_SIZE)); 221 - } 222 - } 223 - 224 - offset = header[1] + SECTION_HDR_SIZE; 225 - data += offset; 226 - left -= offset; 227 - } 228 - } 229 - 230 - static bool __init load_builtin_amd_microcode(struct cpio_data *cp, 231 - unsigned int family) 232 - { 233 - #ifdef CONFIG_X86_64 234 - char fw_name[36] = "amd-ucode/microcode_amd.bin"; 235 - 236 - if (family >= 0x15) 237 - snprintf(fw_name, sizeof(fw_name), 238 - "amd-ucode/microcode_amd_fam%.2xh.bin", family); 239 - 240 - return get_builtin_firmware(cp, fw_name); 241 - #else 242 - return false; 243 - #endif 244 - } 245 - 246 - void __init load_ucode_amd_bsp(unsigned int family) 247 - { 248 - struct cpio_data cp; 249 - void **data; 250 - size_t *size; 251 - 252 - #ifdef CONFIG_X86_32 253 - data = (void **)__pa_nodebug(&ucode_cpio.data); 254 - size = (size_t *)__pa_nodebug(&ucode_cpio.size); 255 - #else 256 - data = &ucode_cpio.data; 257 - size = &ucode_cpio.size; 258 - #endif 259 - 260 - cp = find_ucode_in_initrd(); 261 - if (!cp.data) { 262 - if (!load_builtin_amd_microcode(&cp, family)) 263 - return; 264 - } 265 - 266 - *data = cp.data; 267 - *size = cp.size; 268 - 269 - apply_ucode_in_initrd(cp.data, cp.size, true); 270 - } 271 - 272 - #ifdef CONFIG_X86_32 273 - /* 274 - * On 32-bit, since AP's early load occurs before paging is turned on, we 275 - * cannot traverse cpu_equiv_table and pcache in kernel heap memory. So during 276 - * cold boot, AP will apply_ucode_in_initrd() just like the BSP. During 277 - * save_microcode_in_initrd_amd() BSP's patch is copied to amd_ucode_patch, 278 - * which is used upon resume from suspend. 279 - */ 280 - void load_ucode_amd_ap(void) 281 - { 282 - struct microcode_amd *mc; 283 - size_t *usize; 284 - void **ucode; 285 - 286 - mc = (struct microcode_amd *)__pa_nodebug(amd_ucode_patch); 287 - if (mc->hdr.patch_id && mc->hdr.processor_rev_id) { 288 - __apply_microcode_amd(mc); 289 - return; 290 - } 291 - 292 - ucode = (void *)__pa_nodebug(&container); 293 - usize = (size_t *)__pa_nodebug(&container_size); 294 - 295 - if (!*ucode || !*usize) 296 - return; 297 - 298 - apply_ucode_in_initrd(*ucode, *usize, false); 299 - } 300 - 301 - static void __init collect_cpu_sig_on_bsp(void *arg) 302 - { 303 - unsigned int cpu = smp_processor_id(); 304 - struct ucode_cpu_info *uci = ucode_cpu_info + cpu; 305 - 306 - uci->cpu_sig.sig = cpuid_eax(0x00000001); 307 - } 308 - 309 - static void __init get_bsp_sig(void) 310 - { 311 - unsigned int bsp = boot_cpu_data.cpu_index; 312 - struct ucode_cpu_info *uci = ucode_cpu_info + bsp; 313 - 314 - if (!uci->cpu_sig.sig) 315 - smp_call_function_single(bsp, collect_cpu_sig_on_bsp, NULL, 1); 316 - } 317 - #else 318 - void load_ucode_amd_ap(void) 319 - { 320 - unsigned int cpu = smp_processor_id(); 321 - struct equiv_cpu_entry *eq; 322 - struct microcode_amd *mc; 323 - u32 rev, eax; 324 - u16 eq_id; 325 - 326 - /* Exit if called on the BSP. */ 327 - if (!cpu) 328 - return; 329 - 330 - if (!container) 331 - return; 332 - 333 - /* 334 - * 64-bit runs with paging enabled, thus early==false. 335 - */ 336 - if (check_current_patch_level(&rev, false)) 337 - return; 338 - 339 - eax = cpuid_eax(0x00000001); 340 - eq = (struct equiv_cpu_entry *)(container + CONTAINER_HDR_SZ); 341 - 342 - eq_id = find_equiv_id(eq, eax); 343 - if (!eq_id) 344 - return; 345 - 346 - if (eq_id == this_equiv_id) { 347 - mc = (struct microcode_amd *)amd_ucode_patch; 348 - 349 - if (mc && rev < mc->hdr.patch_id) { 350 - if (!__apply_microcode_amd(mc)) 351 - ucode_new_rev = mc->hdr.patch_id; 352 - } 353 - 354 - } else { 355 - if (!ucode_cpio.data) 356 - return; 357 - 358 - /* 359 - * AP has a different equivalence ID than BSP, looks like 360 - * mixed-steppings silicon so go through the ucode blob anew. 361 - */ 362 - apply_ucode_in_initrd(ucode_cpio.data, ucode_cpio.size, false); 363 - } 364 - } 365 - #endif 366 - 367 - int __init save_microcode_in_initrd_amd(void) 368 - { 369 - unsigned long cont; 370 - int retval = 0; 371 - enum ucode_state ret; 372 - u8 *cont_va; 373 - u32 eax; 374 - 375 - if (!container) 376 - return -EINVAL; 377 - 378 - #ifdef CONFIG_X86_32 379 - get_bsp_sig(); 380 - cont = (unsigned long)container; 381 - cont_va = __va(container); 382 - #else 383 - /* 384 - * We need the physical address of the container for both bitness since 385 - * boot_params.hdr.ramdisk_image is a physical address. 386 - */ 387 - cont = __pa(container); 388 - cont_va = container; 389 - #endif 390 - 391 - /* 392 - * Take into account the fact that the ramdisk might get relocated and 393 - * therefore we need to recompute the container's position in virtual 394 - * memory space. 395 - */ 396 - if (relocated_ramdisk) 397 - container = (u8 *)(__va(relocated_ramdisk) + 398 - (cont - boot_params.hdr.ramdisk_image)); 399 - else 400 - container = cont_va; 401 - 402 - if (ucode_new_rev) 403 - pr_info("microcode: updated early to new patch_level=0x%08x\n", 404 - ucode_new_rev); 405 - 406 - eax = cpuid_eax(0x00000001); 407 - eax = ((eax >> 8) & 0xf) + ((eax >> 20) & 0xff); 408 - 409 - ret = load_microcode_amd(smp_processor_id(), eax, container, container_size); 410 - if (ret != UCODE_OK) 411 - retval = -EINVAL; 412 - 413 - /* 414 - * This will be freed any msec now, stash patches for the current 415 - * family and switch to patch cache for cpu hotplug, etc later. 416 - */ 417 - container = NULL; 418 - container_size = 0; 419 - 420 - return retval; 421 - } 422 - 423 - void reload_ucode_amd(void) 424 - { 425 - struct microcode_amd *mc; 426 - u32 rev; 427 - 428 - /* 429 - * early==false because this is a syscore ->resume path and by 430 - * that time paging is long enabled. 431 - */ 432 - if (check_current_patch_level(&rev, false)) 433 - return; 434 - 435 - mc = (struct microcode_amd *)amd_ucode_patch; 436 - 437 - if (mc && rev < mc->hdr.patch_id) { 438 - if (!__apply_microcode_amd(mc)) { 439 - ucode_new_rev = mc->hdr.patch_id; 440 - pr_info("microcode: reload patch_level=0x%08x\n", 441 - ucode_new_rev); 442 - } 443 - } 444 - }
+157 -3
arch/x86/kernel/cpu/microcode/core.c
··· 5 5 * 2006 Shaohua Li <shaohua.li@intel.com> 6 6 * 2013-2015 Borislav Petkov <bp@alien8.de> 7 7 * 8 + * X86 CPU microcode early update for Linux: 9 + * 10 + * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com> 11 + * H Peter Anvin" <hpa@zytor.com> 12 + * (C) 2015 Borislav Petkov <bp@alien8.de> 13 + * 8 14 * This driver allows to upgrade microcode on x86 processors. 9 15 * 10 16 * This program is free software; you can redistribute it and/or ··· 22 16 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 23 17 24 18 #include <linux/platform_device.h> 19 + #include <linux/syscore_ops.h> 25 20 #include <linux/miscdevice.h> 26 21 #include <linux/capability.h> 22 + #include <linux/firmware.h> 27 23 #include <linux/kernel.h> 28 24 #include <linux/module.h> 29 25 #include <linux/mutex.h> 30 26 #include <linux/cpu.h> 31 27 #include <linux/fs.h> 32 28 #include <linux/mm.h> 33 - #include <linux/syscore_ops.h> 34 29 30 + #include <asm/microcode_intel.h> 31 + #include <asm/cpu_device_id.h> 32 + #include <asm/microcode_amd.h> 33 + #include <asm/perf_event.h> 35 34 #include <asm/microcode.h> 36 35 #include <asm/processor.h> 37 - #include <asm/cpu_device_id.h> 38 - #include <asm/perf_event.h> 36 + #include <asm/cmdline.h> 39 37 40 38 MODULE_DESCRIPTION("Microcode Update Driver"); 41 39 MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>"); ··· 77 67 struct cpu_signature *cpu_sig; 78 68 int err; 79 69 }; 70 + 71 + static bool __init check_loader_disabled_bsp(void) 72 + { 73 + #ifdef CONFIG_X86_32 74 + const char *cmdline = (const char *)__pa_nodebug(boot_command_line); 75 + const char *opt = "dis_ucode_ldr"; 76 + const char *option = (const char *)__pa_nodebug(opt); 77 + bool *res = (bool *)__pa_nodebug(&dis_ucode_ldr); 78 + 79 + #else /* CONFIG_X86_64 */ 80 + const char *cmdline = boot_command_line; 81 + const char *option = "dis_ucode_ldr"; 82 + bool *res = &dis_ucode_ldr; 83 + #endif 84 + 85 + if (cmdline_find_option_bool(cmdline, option)) 86 + *res = true; 87 + 88 + return *res; 89 + } 90 + 91 + extern struct builtin_fw __start_builtin_fw[]; 92 + extern struct builtin_fw __end_builtin_fw[]; 93 + 94 + bool get_builtin_firmware(struct cpio_data *cd, const char *name) 95 + { 96 + #ifdef CONFIG_FW_LOADER 97 + struct builtin_fw *b_fw; 98 + 99 + for (b_fw = __start_builtin_fw; b_fw != __end_builtin_fw; b_fw++) { 100 + if (!strcmp(name, b_fw->name)) { 101 + cd->size = b_fw->size; 102 + cd->data = b_fw->data; 103 + return true; 104 + } 105 + } 106 + #endif 107 + return false; 108 + } 109 + 110 + void __init load_ucode_bsp(void) 111 + { 112 + int vendor; 113 + unsigned int family; 114 + 115 + if (check_loader_disabled_bsp()) 116 + return; 117 + 118 + if (!have_cpuid_p()) 119 + return; 120 + 121 + vendor = x86_vendor(); 122 + family = x86_family(); 123 + 124 + switch (vendor) { 125 + case X86_VENDOR_INTEL: 126 + if (family >= 6) 127 + load_ucode_intel_bsp(); 128 + break; 129 + case X86_VENDOR_AMD: 130 + if (family >= 0x10) 131 + load_ucode_amd_bsp(family); 132 + break; 133 + default: 134 + break; 135 + } 136 + } 137 + 138 + static bool check_loader_disabled_ap(void) 139 + { 140 + #ifdef CONFIG_X86_32 141 + return *((bool *)__pa_nodebug(&dis_ucode_ldr)); 142 + #else 143 + return dis_ucode_ldr; 144 + #endif 145 + } 146 + 147 + void load_ucode_ap(void) 148 + { 149 + int vendor, family; 150 + 151 + if (check_loader_disabled_ap()) 152 + return; 153 + 154 + if (!have_cpuid_p()) 155 + return; 156 + 157 + vendor = x86_vendor(); 158 + family = x86_family(); 159 + 160 + switch (vendor) { 161 + case X86_VENDOR_INTEL: 162 + if (family >= 6) 163 + load_ucode_intel_ap(); 164 + break; 165 + case X86_VENDOR_AMD: 166 + if (family >= 0x10) 167 + load_ucode_amd_ap(); 168 + break; 169 + default: 170 + break; 171 + } 172 + } 173 + 174 + int __init save_microcode_in_initrd(void) 175 + { 176 + struct cpuinfo_x86 *c = &boot_cpu_data; 177 + 178 + switch (c->x86_vendor) { 179 + case X86_VENDOR_INTEL: 180 + if (c->x86 >= 6) 181 + save_microcode_in_initrd_intel(); 182 + break; 183 + case X86_VENDOR_AMD: 184 + if (c->x86 >= 0x10) 185 + save_microcode_in_initrd_amd(); 186 + break; 187 + default: 188 + break; 189 + } 190 + 191 + return 0; 192 + } 193 + 194 + void reload_early_microcode(void) 195 + { 196 + int vendor, family; 197 + 198 + vendor = x86_vendor(); 199 + family = x86_family(); 200 + 201 + switch (vendor) { 202 + case X86_VENDOR_INTEL: 203 + if (family >= 6) 204 + reload_ucode_intel(); 205 + break; 206 + case X86_VENDOR_AMD: 207 + if (family >= 0x10) 208 + reload_ucode_amd(); 209 + break; 210 + default: 211 + break; 212 + } 213 + } 80 214 81 215 static void collect_cpu_info_local(void *arg) 82 216 {
-170
arch/x86/kernel/cpu/microcode/core_early.c
··· 1 - /* 2 - * X86 CPU microcode early update for Linux 3 - * 4 - * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com> 5 - * H Peter Anvin" <hpa@zytor.com> 6 - * (C) 2015 Borislav Petkov <bp@alien8.de> 7 - * 8 - * This driver allows to early upgrade microcode on Intel processors 9 - * belonging to IA-32 family - PentiumPro, Pentium II, 10 - * Pentium III, Xeon, Pentium 4, etc. 11 - * 12 - * Reference: Section 9.11 of Volume 3, IA-32 Intel Architecture 13 - * Software Developer's Manual. 14 - * 15 - * This program is free software; you can redistribute it and/or 16 - * modify it under the terms of the GNU General Public License 17 - * as published by the Free Software Foundation; either version 18 - * 2 of the License, or (at your option) any later version. 19 - */ 20 - #include <linux/module.h> 21 - #include <linux/firmware.h> 22 - #include <asm/microcode.h> 23 - #include <asm/microcode_intel.h> 24 - #include <asm/microcode_amd.h> 25 - #include <asm/processor.h> 26 - #include <asm/cmdline.h> 27 - 28 - static bool __init check_loader_disabled_bsp(void) 29 - { 30 - #ifdef CONFIG_X86_32 31 - const char *cmdline = (const char *)__pa_nodebug(boot_command_line); 32 - const char *opt = "dis_ucode_ldr"; 33 - const char *option = (const char *)__pa_nodebug(opt); 34 - bool *res = (bool *)__pa_nodebug(&dis_ucode_ldr); 35 - 36 - #else /* CONFIG_X86_64 */ 37 - const char *cmdline = boot_command_line; 38 - const char *option = "dis_ucode_ldr"; 39 - bool *res = &dis_ucode_ldr; 40 - #endif 41 - 42 - if (cmdline_find_option_bool(cmdline, option)) 43 - *res = true; 44 - 45 - return *res; 46 - } 47 - 48 - extern struct builtin_fw __start_builtin_fw[]; 49 - extern struct builtin_fw __end_builtin_fw[]; 50 - 51 - bool get_builtin_firmware(struct cpio_data *cd, const char *name) 52 - { 53 - #ifdef CONFIG_FW_LOADER 54 - struct builtin_fw *b_fw; 55 - 56 - for (b_fw = __start_builtin_fw; b_fw != __end_builtin_fw; b_fw++) { 57 - if (!strcmp(name, b_fw->name)) { 58 - cd->size = b_fw->size; 59 - cd->data = b_fw->data; 60 - return true; 61 - } 62 - } 63 - #endif 64 - return false; 65 - } 66 - 67 - void __init load_ucode_bsp(void) 68 - { 69 - int vendor; 70 - unsigned int family; 71 - 72 - if (check_loader_disabled_bsp()) 73 - return; 74 - 75 - if (!have_cpuid_p()) 76 - return; 77 - 78 - vendor = x86_vendor(); 79 - family = x86_family(); 80 - 81 - switch (vendor) { 82 - case X86_VENDOR_INTEL: 83 - if (family >= 6) 84 - load_ucode_intel_bsp(); 85 - break; 86 - case X86_VENDOR_AMD: 87 - if (family >= 0x10) 88 - load_ucode_amd_bsp(family); 89 - break; 90 - default: 91 - break; 92 - } 93 - } 94 - 95 - static bool check_loader_disabled_ap(void) 96 - { 97 - #ifdef CONFIG_X86_32 98 - return *((bool *)__pa_nodebug(&dis_ucode_ldr)); 99 - #else 100 - return dis_ucode_ldr; 101 - #endif 102 - } 103 - 104 - void load_ucode_ap(void) 105 - { 106 - int vendor, family; 107 - 108 - if (check_loader_disabled_ap()) 109 - return; 110 - 111 - if (!have_cpuid_p()) 112 - return; 113 - 114 - vendor = x86_vendor(); 115 - family = x86_family(); 116 - 117 - switch (vendor) { 118 - case X86_VENDOR_INTEL: 119 - if (family >= 6) 120 - load_ucode_intel_ap(); 121 - break; 122 - case X86_VENDOR_AMD: 123 - if (family >= 0x10) 124 - load_ucode_amd_ap(); 125 - break; 126 - default: 127 - break; 128 - } 129 - } 130 - 131 - int __init save_microcode_in_initrd(void) 132 - { 133 - struct cpuinfo_x86 *c = &boot_cpu_data; 134 - 135 - switch (c->x86_vendor) { 136 - case X86_VENDOR_INTEL: 137 - if (c->x86 >= 6) 138 - save_microcode_in_initrd_intel(); 139 - break; 140 - case X86_VENDOR_AMD: 141 - if (c->x86 >= 0x10) 142 - save_microcode_in_initrd_amd(); 143 - break; 144 - default: 145 - break; 146 - } 147 - 148 - return 0; 149 - } 150 - 151 - void reload_early_microcode(void) 152 - { 153 - int vendor, family; 154 - 155 - vendor = x86_vendor(); 156 - family = x86_family(); 157 - 158 - switch (vendor) { 159 - case X86_VENDOR_INTEL: 160 - if (family >= 6) 161 - reload_ucode_intel(); 162 - break; 163 - case X86_VENDOR_AMD: 164 - if (family >= 0x10) 165 - reload_ucode_amd(); 166 - break; 167 - default: 168 - break; 169 - } 170 - }
+787 -1
arch/x86/kernel/cpu/microcode/intel.c
··· 4 4 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk> 5 5 * 2006 Shaohua Li <shaohua.li@intel.com> 6 6 * 7 + * Intel CPU microcode early update for Linux 8 + * 9 + * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com> 10 + * H Peter Anvin" <hpa@zytor.com> 11 + * 7 12 * This program is free software; you can redistribute it and/or 8 13 * modify it under the terms of the GNU General Public License 9 14 * as published by the Free Software Foundation; either version 10 15 * 2 of the License, or (at your option) any later version. 11 16 */ 12 17 18 + /* 19 + * This needs to be before all headers so that pr_debug in printk.h doesn't turn 20 + * printk calls into no_printk(). 21 + * 22 + *#define DEBUG 23 + */ 13 24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 14 25 26 + #include <linux/earlycpio.h> 15 27 #include <linux/firmware.h> 16 28 #include <linux/uaccess.h> 29 + #include <linux/vmalloc.h> 30 + #include <linux/initrd.h> 17 31 #include <linux/kernel.h> 18 32 #include <linux/module.h> 19 - #include <linux/vmalloc.h> 33 + #include <linux/slab.h> 34 + #include <linux/cpu.h> 35 + #include <linux/mm.h> 20 36 21 37 #include <asm/microcode_intel.h> 22 38 #include <asm/processor.h> 39 + #include <asm/tlbflush.h> 40 + #include <asm/setup.h> 23 41 #include <asm/msr.h> 24 42 25 43 MODULE_DESCRIPTION("Microcode Update Driver"); 26 44 MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>"); 27 45 MODULE_LICENSE("GPL"); 46 + 47 + static unsigned long mc_saved_in_initrd[MAX_UCODE_COUNT]; 48 + static struct mc_saved_data { 49 + unsigned int mc_saved_count; 50 + struct microcode_intel **mc_saved; 51 + } mc_saved_data; 52 + 53 + static enum ucode_state 54 + load_microcode_early(struct microcode_intel **saved, 55 + unsigned int num_saved, struct ucode_cpu_info *uci) 56 + { 57 + struct microcode_intel *ucode_ptr, *new_mc = NULL; 58 + struct microcode_header_intel *mc_hdr; 59 + int new_rev, ret, i; 60 + 61 + new_rev = uci->cpu_sig.rev; 62 + 63 + for (i = 0; i < num_saved; i++) { 64 + ucode_ptr = saved[i]; 65 + mc_hdr = (struct microcode_header_intel *)ucode_ptr; 66 + 67 + ret = has_newer_microcode(ucode_ptr, 68 + uci->cpu_sig.sig, 69 + uci->cpu_sig.pf, 70 + new_rev); 71 + if (!ret) 72 + continue; 73 + 74 + new_rev = mc_hdr->rev; 75 + new_mc = ucode_ptr; 76 + } 77 + 78 + if (!new_mc) 79 + return UCODE_NFOUND; 80 + 81 + uci->mc = (struct microcode_intel *)new_mc; 82 + return UCODE_OK; 83 + } 84 + 85 + static inline void 86 + copy_initrd_ptrs(struct microcode_intel **mc_saved, unsigned long *initrd, 87 + unsigned long off, int num_saved) 88 + { 89 + int i; 90 + 91 + for (i = 0; i < num_saved; i++) 92 + mc_saved[i] = (struct microcode_intel *)(initrd[i] + off); 93 + } 94 + 95 + #ifdef CONFIG_X86_32 96 + static void 97 + microcode_phys(struct microcode_intel **mc_saved_tmp, 98 + struct mc_saved_data *mc_saved_data) 99 + { 100 + int i; 101 + struct microcode_intel ***mc_saved; 102 + 103 + mc_saved = (struct microcode_intel ***) 104 + __pa_nodebug(&mc_saved_data->mc_saved); 105 + for (i = 0; i < mc_saved_data->mc_saved_count; i++) { 106 + struct microcode_intel *p; 107 + 108 + p = *(struct microcode_intel **) 109 + __pa_nodebug(mc_saved_data->mc_saved + i); 110 + mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p); 111 + } 112 + } 113 + #endif 114 + 115 + static enum ucode_state 116 + load_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd, 117 + unsigned long initrd_start, struct ucode_cpu_info *uci) 118 + { 119 + struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT]; 120 + unsigned int count = mc_saved_data->mc_saved_count; 121 + 122 + if (!mc_saved_data->mc_saved) { 123 + copy_initrd_ptrs(mc_saved_tmp, initrd, initrd_start, count); 124 + 125 + return load_microcode_early(mc_saved_tmp, count, uci); 126 + } else { 127 + #ifdef CONFIG_X86_32 128 + microcode_phys(mc_saved_tmp, mc_saved_data); 129 + return load_microcode_early(mc_saved_tmp, count, uci); 130 + #else 131 + return load_microcode_early(mc_saved_data->mc_saved, 132 + count, uci); 133 + #endif 134 + } 135 + } 136 + 137 + /* 138 + * Given CPU signature and a microcode patch, this function finds if the 139 + * microcode patch has matching family and model with the CPU. 140 + */ 141 + static enum ucode_state 142 + matching_model_microcode(struct microcode_header_intel *mc_header, 143 + unsigned long sig) 144 + { 145 + unsigned int fam, model; 146 + unsigned int fam_ucode, model_ucode; 147 + struct extended_sigtable *ext_header; 148 + unsigned long total_size = get_totalsize(mc_header); 149 + unsigned long data_size = get_datasize(mc_header); 150 + int ext_sigcount, i; 151 + struct extended_signature *ext_sig; 152 + 153 + fam = __x86_family(sig); 154 + model = x86_model(sig); 155 + 156 + fam_ucode = __x86_family(mc_header->sig); 157 + model_ucode = x86_model(mc_header->sig); 158 + 159 + if (fam == fam_ucode && model == model_ucode) 160 + return UCODE_OK; 161 + 162 + /* Look for ext. headers: */ 163 + if (total_size <= data_size + MC_HEADER_SIZE) 164 + return UCODE_NFOUND; 165 + 166 + ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE; 167 + ext_sig = (void *)ext_header + EXT_HEADER_SIZE; 168 + ext_sigcount = ext_header->count; 169 + 170 + for (i = 0; i < ext_sigcount; i++) { 171 + fam_ucode = __x86_family(ext_sig->sig); 172 + model_ucode = x86_model(ext_sig->sig); 173 + 174 + if (fam == fam_ucode && model == model_ucode) 175 + return UCODE_OK; 176 + 177 + ext_sig++; 178 + } 179 + return UCODE_NFOUND; 180 + } 181 + 182 + static int 183 + save_microcode(struct mc_saved_data *mc_saved_data, 184 + struct microcode_intel **mc_saved_src, 185 + unsigned int mc_saved_count) 186 + { 187 + int i, j; 188 + struct microcode_intel **saved_ptr; 189 + int ret; 190 + 191 + if (!mc_saved_count) 192 + return -EINVAL; 193 + 194 + /* 195 + * Copy new microcode data. 196 + */ 197 + saved_ptr = kcalloc(mc_saved_count, sizeof(struct microcode_intel *), GFP_KERNEL); 198 + if (!saved_ptr) 199 + return -ENOMEM; 200 + 201 + for (i = 0; i < mc_saved_count; i++) { 202 + struct microcode_header_intel *mc_hdr; 203 + struct microcode_intel *mc; 204 + unsigned long size; 205 + 206 + if (!mc_saved_src[i]) { 207 + ret = -EINVAL; 208 + goto err; 209 + } 210 + 211 + mc = mc_saved_src[i]; 212 + mc_hdr = &mc->hdr; 213 + size = get_totalsize(mc_hdr); 214 + 215 + saved_ptr[i] = kmalloc(size, GFP_KERNEL); 216 + if (!saved_ptr[i]) { 217 + ret = -ENOMEM; 218 + goto err; 219 + } 220 + 221 + memcpy(saved_ptr[i], mc, size); 222 + } 223 + 224 + /* 225 + * Point to newly saved microcode. 226 + */ 227 + mc_saved_data->mc_saved = saved_ptr; 228 + mc_saved_data->mc_saved_count = mc_saved_count; 229 + 230 + return 0; 231 + 232 + err: 233 + for (j = 0; j <= i; j++) 234 + kfree(saved_ptr[j]); 235 + kfree(saved_ptr); 236 + 237 + return ret; 238 + } 239 + 240 + /* 241 + * A microcode patch in ucode_ptr is saved into mc_saved 242 + * - if it has matching signature and newer revision compared to an existing 243 + * patch mc_saved. 244 + * - or if it is a newly discovered microcode patch. 245 + * 246 + * The microcode patch should have matching model with CPU. 247 + * 248 + * Returns: The updated number @num_saved of saved microcode patches. 249 + */ 250 + static unsigned int _save_mc(struct microcode_intel **mc_saved, 251 + u8 *ucode_ptr, unsigned int num_saved) 252 + { 253 + struct microcode_header_intel *mc_hdr, *mc_saved_hdr; 254 + unsigned int sig, pf; 255 + int found = 0, i; 256 + 257 + mc_hdr = (struct microcode_header_intel *)ucode_ptr; 258 + 259 + for (i = 0; i < num_saved; i++) { 260 + mc_saved_hdr = (struct microcode_header_intel *)mc_saved[i]; 261 + sig = mc_saved_hdr->sig; 262 + pf = mc_saved_hdr->pf; 263 + 264 + if (!find_matching_signature(ucode_ptr, sig, pf)) 265 + continue; 266 + 267 + found = 1; 268 + 269 + if (mc_hdr->rev <= mc_saved_hdr->rev) 270 + continue; 271 + 272 + /* 273 + * Found an older ucode saved earlier. Replace it with 274 + * this newer one. 275 + */ 276 + mc_saved[i] = (struct microcode_intel *)ucode_ptr; 277 + break; 278 + } 279 + 280 + /* Newly detected microcode, save it to memory. */ 281 + if (i >= num_saved && !found) 282 + mc_saved[num_saved++] = (struct microcode_intel *)ucode_ptr; 283 + 284 + return num_saved; 285 + } 286 + 287 + /* 288 + * Get microcode matching with BSP's model. Only CPUs with the same model as 289 + * BSP can stay in the platform. 290 + */ 291 + static enum ucode_state __init 292 + get_matching_model_microcode(int cpu, unsigned long start, 293 + void *data, size_t size, 294 + struct mc_saved_data *mc_saved_data, 295 + unsigned long *mc_saved_in_initrd, 296 + struct ucode_cpu_info *uci) 297 + { 298 + u8 *ucode_ptr = data; 299 + unsigned int leftover = size; 300 + enum ucode_state state = UCODE_OK; 301 + unsigned int mc_size; 302 + struct microcode_header_intel *mc_header; 303 + struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT]; 304 + unsigned int mc_saved_count = mc_saved_data->mc_saved_count; 305 + int i; 306 + 307 + while (leftover && mc_saved_count < ARRAY_SIZE(mc_saved_tmp)) { 308 + 309 + if (leftover < sizeof(mc_header)) 310 + break; 311 + 312 + mc_header = (struct microcode_header_intel *)ucode_ptr; 313 + 314 + mc_size = get_totalsize(mc_header); 315 + if (!mc_size || mc_size > leftover || 316 + microcode_sanity_check(ucode_ptr, 0) < 0) 317 + break; 318 + 319 + leftover -= mc_size; 320 + 321 + /* 322 + * Since APs with same family and model as the BSP may boot in 323 + * the platform, we need to find and save microcode patches 324 + * with the same family and model as the BSP. 325 + */ 326 + if (matching_model_microcode(mc_header, uci->cpu_sig.sig) != 327 + UCODE_OK) { 328 + ucode_ptr += mc_size; 329 + continue; 330 + } 331 + 332 + mc_saved_count = _save_mc(mc_saved_tmp, ucode_ptr, mc_saved_count); 333 + 334 + ucode_ptr += mc_size; 335 + } 336 + 337 + if (leftover) { 338 + state = UCODE_ERROR; 339 + goto out; 340 + } 341 + 342 + if (mc_saved_count == 0) { 343 + state = UCODE_NFOUND; 344 + goto out; 345 + } 346 + 347 + for (i = 0; i < mc_saved_count; i++) 348 + mc_saved_in_initrd[i] = (unsigned long)mc_saved_tmp[i] - start; 349 + 350 + mc_saved_data->mc_saved_count = mc_saved_count; 351 + out: 352 + return state; 353 + } 354 + 355 + static int collect_cpu_info_early(struct ucode_cpu_info *uci) 356 + { 357 + unsigned int val[2]; 358 + unsigned int family, model; 359 + struct cpu_signature csig; 360 + unsigned int eax, ebx, ecx, edx; 361 + 362 + csig.sig = 0; 363 + csig.pf = 0; 364 + csig.rev = 0; 365 + 366 + memset(uci, 0, sizeof(*uci)); 367 + 368 + eax = 0x00000001; 369 + ecx = 0; 370 + native_cpuid(&eax, &ebx, &ecx, &edx); 371 + csig.sig = eax; 372 + 373 + family = __x86_family(csig.sig); 374 + model = x86_model(csig.sig); 375 + 376 + if ((model >= 5) || (family > 6)) { 377 + /* get processor flags from MSR 0x17 */ 378 + native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]); 379 + csig.pf = 1 << ((val[1] >> 18) & 7); 380 + } 381 + native_wrmsr(MSR_IA32_UCODE_REV, 0, 0); 382 + 383 + /* As documented in the SDM: Do a CPUID 1 here */ 384 + sync_core(); 385 + 386 + /* get the current revision from MSR 0x8B */ 387 + native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]); 388 + 389 + csig.rev = val[1]; 390 + 391 + uci->cpu_sig = csig; 392 + uci->valid = 1; 393 + 394 + return 0; 395 + } 396 + 397 + #ifdef DEBUG 398 + static void show_saved_mc(void) 399 + { 400 + int i, j; 401 + unsigned int sig, pf, rev, total_size, data_size, date; 402 + struct ucode_cpu_info uci; 403 + 404 + if (mc_saved_data.mc_saved_count == 0) { 405 + pr_debug("no microcode data saved.\n"); 406 + return; 407 + } 408 + pr_debug("Total microcode saved: %d\n", mc_saved_data.mc_saved_count); 409 + 410 + collect_cpu_info_early(&uci); 411 + 412 + sig = uci.cpu_sig.sig; 413 + pf = uci.cpu_sig.pf; 414 + rev = uci.cpu_sig.rev; 415 + pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev); 416 + 417 + for (i = 0; i < mc_saved_data.mc_saved_count; i++) { 418 + struct microcode_header_intel *mc_saved_header; 419 + struct extended_sigtable *ext_header; 420 + int ext_sigcount; 421 + struct extended_signature *ext_sig; 422 + 423 + mc_saved_header = (struct microcode_header_intel *) 424 + mc_saved_data.mc_saved[i]; 425 + sig = mc_saved_header->sig; 426 + pf = mc_saved_header->pf; 427 + rev = mc_saved_header->rev; 428 + total_size = get_totalsize(mc_saved_header); 429 + data_size = get_datasize(mc_saved_header); 430 + date = mc_saved_header->date; 431 + 432 + pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, toal size=0x%x, date = %04x-%02x-%02x\n", 433 + i, sig, pf, rev, total_size, 434 + date & 0xffff, 435 + date >> 24, 436 + (date >> 16) & 0xff); 437 + 438 + /* Look for ext. headers: */ 439 + if (total_size <= data_size + MC_HEADER_SIZE) 440 + continue; 441 + 442 + ext_header = (void *) mc_saved_header + data_size + MC_HEADER_SIZE; 443 + ext_sigcount = ext_header->count; 444 + ext_sig = (void *)ext_header + EXT_HEADER_SIZE; 445 + 446 + for (j = 0; j < ext_sigcount; j++) { 447 + sig = ext_sig->sig; 448 + pf = ext_sig->pf; 449 + 450 + pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n", 451 + j, sig, pf); 452 + 453 + ext_sig++; 454 + } 455 + 456 + } 457 + } 458 + #else 459 + static inline void show_saved_mc(void) 460 + { 461 + } 462 + #endif 463 + 464 + #ifdef CONFIG_HOTPLUG_CPU 465 + static DEFINE_MUTEX(x86_cpu_microcode_mutex); 466 + /* 467 + * Save this mc into mc_saved_data. So it will be loaded early when a CPU is 468 + * hot added or resumes. 469 + * 470 + * Please make sure this mc should be a valid microcode patch before calling 471 + * this function. 472 + */ 473 + int save_mc_for_early(u8 *mc) 474 + { 475 + struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT]; 476 + unsigned int mc_saved_count_init; 477 + unsigned int mc_saved_count; 478 + struct microcode_intel **mc_saved; 479 + int ret = 0; 480 + int i; 481 + 482 + /* 483 + * Hold hotplug lock so mc_saved_data is not accessed by a CPU in 484 + * hotplug. 485 + */ 486 + mutex_lock(&x86_cpu_microcode_mutex); 487 + 488 + mc_saved_count_init = mc_saved_data.mc_saved_count; 489 + mc_saved_count = mc_saved_data.mc_saved_count; 490 + mc_saved = mc_saved_data.mc_saved; 491 + 492 + if (mc_saved && mc_saved_count) 493 + memcpy(mc_saved_tmp, mc_saved, 494 + mc_saved_count * sizeof(struct microcode_intel *)); 495 + /* 496 + * Save the microcode patch mc in mc_save_tmp structure if it's a newer 497 + * version. 498 + */ 499 + mc_saved_count = _save_mc(mc_saved_tmp, mc, mc_saved_count); 500 + 501 + /* 502 + * Save the mc_save_tmp in global mc_saved_data. 503 + */ 504 + ret = save_microcode(&mc_saved_data, mc_saved_tmp, mc_saved_count); 505 + if (ret) { 506 + pr_err("Cannot save microcode patch.\n"); 507 + goto out; 508 + } 509 + 510 + show_saved_mc(); 511 + 512 + /* 513 + * Free old saved microcode data. 514 + */ 515 + if (mc_saved) { 516 + for (i = 0; i < mc_saved_count_init; i++) 517 + kfree(mc_saved[i]); 518 + kfree(mc_saved); 519 + } 520 + 521 + out: 522 + mutex_unlock(&x86_cpu_microcode_mutex); 523 + 524 + return ret; 525 + } 526 + EXPORT_SYMBOL_GPL(save_mc_for_early); 527 + #endif 528 + 529 + static bool __init load_builtin_intel_microcode(struct cpio_data *cp) 530 + { 531 + #ifdef CONFIG_X86_64 532 + unsigned int eax = 0x00000001, ebx, ecx = 0, edx; 533 + unsigned int family, model, stepping; 534 + char name[30]; 535 + 536 + native_cpuid(&eax, &ebx, &ecx, &edx); 537 + 538 + family = __x86_family(eax); 539 + model = x86_model(eax); 540 + stepping = eax & 0xf; 541 + 542 + sprintf(name, "intel-ucode/%02x-%02x-%02x", family, model, stepping); 543 + 544 + return get_builtin_firmware(cp, name); 545 + #else 546 + return false; 547 + #endif 548 + } 549 + 550 + static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin"; 551 + static __init enum ucode_state 552 + scan_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd, 553 + unsigned long start, unsigned long size, 554 + struct ucode_cpu_info *uci) 555 + { 556 + struct cpio_data cd; 557 + long offset = 0; 558 + #ifdef CONFIG_X86_32 559 + char *p = (char *)__pa_nodebug(ucode_name); 560 + #else 561 + char *p = ucode_name; 562 + #endif 563 + 564 + cd.data = NULL; 565 + cd.size = 0; 566 + 567 + cd = find_cpio_data(p, (void *)start, size, &offset); 568 + if (!cd.data) { 569 + if (!load_builtin_intel_microcode(&cd)) 570 + return UCODE_ERROR; 571 + } 572 + 573 + return get_matching_model_microcode(0, start, cd.data, cd.size, 574 + mc_saved_data, initrd, uci); 575 + } 576 + 577 + /* 578 + * Print ucode update info. 579 + */ 580 + static void 581 + print_ucode_info(struct ucode_cpu_info *uci, unsigned int date) 582 + { 583 + int cpu = smp_processor_id(); 584 + 585 + pr_info("CPU%d microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n", 586 + cpu, 587 + uci->cpu_sig.rev, 588 + date & 0xffff, 589 + date >> 24, 590 + (date >> 16) & 0xff); 591 + } 592 + 593 + #ifdef CONFIG_X86_32 594 + 595 + static int delay_ucode_info; 596 + static int current_mc_date; 597 + 598 + /* 599 + * Print early updated ucode info after printk works. This is delayed info dump. 600 + */ 601 + void show_ucode_info_early(void) 602 + { 603 + struct ucode_cpu_info uci; 604 + 605 + if (delay_ucode_info) { 606 + collect_cpu_info_early(&uci); 607 + print_ucode_info(&uci, current_mc_date); 608 + delay_ucode_info = 0; 609 + } 610 + } 611 + 612 + /* 613 + * At this point, we can not call printk() yet. Keep microcode patch number in 614 + * mc_saved_data.mc_saved and delay printing microcode info in 615 + * show_ucode_info_early() until printk() works. 616 + */ 617 + static void print_ucode(struct ucode_cpu_info *uci) 618 + { 619 + struct microcode_intel *mc_intel; 620 + int *delay_ucode_info_p; 621 + int *current_mc_date_p; 622 + 623 + mc_intel = uci->mc; 624 + if (mc_intel == NULL) 625 + return; 626 + 627 + delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info); 628 + current_mc_date_p = (int *)__pa_nodebug(&current_mc_date); 629 + 630 + *delay_ucode_info_p = 1; 631 + *current_mc_date_p = mc_intel->hdr.date; 632 + } 633 + #else 634 + 635 + /* 636 + * Flush global tlb. We only do this in x86_64 where paging has been enabled 637 + * already and PGE should be enabled as well. 638 + */ 639 + static inline void flush_tlb_early(void) 640 + { 641 + __native_flush_tlb_global_irq_disabled(); 642 + } 643 + 644 + static inline void print_ucode(struct ucode_cpu_info *uci) 645 + { 646 + struct microcode_intel *mc_intel; 647 + 648 + mc_intel = uci->mc; 649 + if (mc_intel == NULL) 650 + return; 651 + 652 + print_ucode_info(uci, mc_intel->hdr.date); 653 + } 654 + #endif 655 + 656 + static int apply_microcode_early(struct ucode_cpu_info *uci, bool early) 657 + { 658 + struct microcode_intel *mc_intel; 659 + unsigned int val[2]; 660 + 661 + mc_intel = uci->mc; 662 + if (mc_intel == NULL) 663 + return 0; 664 + 665 + /* write microcode via MSR 0x79 */ 666 + native_wrmsr(MSR_IA32_UCODE_WRITE, 667 + (unsigned long) mc_intel->bits, 668 + (unsigned long) mc_intel->bits >> 16 >> 16); 669 + native_wrmsr(MSR_IA32_UCODE_REV, 0, 0); 670 + 671 + /* As documented in the SDM: Do a CPUID 1 here */ 672 + sync_core(); 673 + 674 + /* get the current revision from MSR 0x8B */ 675 + native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]); 676 + if (val[1] != mc_intel->hdr.rev) 677 + return -1; 678 + 679 + #ifdef CONFIG_X86_64 680 + /* Flush global tlb. This is precaution. */ 681 + flush_tlb_early(); 682 + #endif 683 + uci->cpu_sig.rev = val[1]; 684 + 685 + if (early) 686 + print_ucode(uci); 687 + else 688 + print_ucode_info(uci, mc_intel->hdr.date); 689 + 690 + return 0; 691 + } 692 + 693 + /* 694 + * This function converts microcode patch offsets previously stored in 695 + * mc_saved_in_initrd to pointers and stores the pointers in mc_saved_data. 696 + */ 697 + int __init save_microcode_in_initrd_intel(void) 698 + { 699 + unsigned int count = mc_saved_data.mc_saved_count; 700 + struct microcode_intel *mc_saved[MAX_UCODE_COUNT]; 701 + int ret = 0; 702 + 703 + if (count == 0) 704 + return ret; 705 + 706 + copy_initrd_ptrs(mc_saved, mc_saved_in_initrd, initrd_start, count); 707 + ret = save_microcode(&mc_saved_data, mc_saved, count); 708 + if (ret) 709 + pr_err("Cannot save microcode patches from initrd.\n"); 710 + 711 + show_saved_mc(); 712 + 713 + return ret; 714 + } 715 + 716 + static void __init 717 + _load_ucode_intel_bsp(struct mc_saved_data *mc_saved_data, 718 + unsigned long *initrd, 719 + unsigned long start, unsigned long size) 720 + { 721 + struct ucode_cpu_info uci; 722 + enum ucode_state ret; 723 + 724 + collect_cpu_info_early(&uci); 725 + 726 + ret = scan_microcode(mc_saved_data, initrd, start, size, &uci); 727 + if (ret != UCODE_OK) 728 + return; 729 + 730 + ret = load_microcode(mc_saved_data, initrd, start, &uci); 731 + if (ret != UCODE_OK) 732 + return; 733 + 734 + apply_microcode_early(&uci, true); 735 + } 736 + 737 + void __init load_ucode_intel_bsp(void) 738 + { 739 + u64 start, size; 740 + #ifdef CONFIG_X86_32 741 + struct boot_params *p; 742 + 743 + p = (struct boot_params *)__pa_nodebug(&boot_params); 744 + start = p->hdr.ramdisk_image; 745 + size = p->hdr.ramdisk_size; 746 + 747 + _load_ucode_intel_bsp( 748 + (struct mc_saved_data *)__pa_nodebug(&mc_saved_data), 749 + (unsigned long *)__pa_nodebug(&mc_saved_in_initrd), 750 + start, size); 751 + #else 752 + start = boot_params.hdr.ramdisk_image + PAGE_OFFSET; 753 + size = boot_params.hdr.ramdisk_size; 754 + 755 + _load_ucode_intel_bsp(&mc_saved_data, mc_saved_in_initrd, start, size); 756 + #endif 757 + } 758 + 759 + void load_ucode_intel_ap(void) 760 + { 761 + struct mc_saved_data *mc_saved_data_p; 762 + struct ucode_cpu_info uci; 763 + unsigned long *mc_saved_in_initrd_p; 764 + unsigned long initrd_start_addr; 765 + enum ucode_state ret; 766 + #ifdef CONFIG_X86_32 767 + unsigned long *initrd_start_p; 768 + 769 + mc_saved_in_initrd_p = 770 + (unsigned long *)__pa_nodebug(mc_saved_in_initrd); 771 + mc_saved_data_p = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data); 772 + initrd_start_p = (unsigned long *)__pa_nodebug(&initrd_start); 773 + initrd_start_addr = (unsigned long)__pa_nodebug(*initrd_start_p); 774 + #else 775 + mc_saved_data_p = &mc_saved_data; 776 + mc_saved_in_initrd_p = mc_saved_in_initrd; 777 + initrd_start_addr = initrd_start; 778 + #endif 779 + 780 + /* 781 + * If there is no valid ucode previously saved in memory, no need to 782 + * update ucode on this AP. 783 + */ 784 + if (mc_saved_data_p->mc_saved_count == 0) 785 + return; 786 + 787 + collect_cpu_info_early(&uci); 788 + ret = load_microcode(mc_saved_data_p, mc_saved_in_initrd_p, 789 + initrd_start_addr, &uci); 790 + 791 + if (ret != UCODE_OK) 792 + return; 793 + 794 + apply_microcode_early(&uci, true); 795 + } 796 + 797 + void reload_ucode_intel(void) 798 + { 799 + struct ucode_cpu_info uci; 800 + enum ucode_state ret; 801 + 802 + if (!mc_saved_data.mc_saved_count) 803 + return; 804 + 805 + collect_cpu_info_early(&uci); 806 + 807 + ret = load_microcode_early(mc_saved_data.mc_saved, 808 + mc_saved_data.mc_saved_count, &uci); 809 + if (ret != UCODE_OK) 810 + return; 811 + 812 + apply_microcode_early(&uci, false); 813 + } 28 814 29 815 static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) 30 816 {
-808
arch/x86/kernel/cpu/microcode/intel_early.c
··· 1 - /* 2 - * Intel CPU microcode early update for Linux 3 - * 4 - * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com> 5 - * H Peter Anvin" <hpa@zytor.com> 6 - * 7 - * This allows to early upgrade microcode on Intel processors 8 - * belonging to IA-32 family - PentiumPro, Pentium II, 9 - * Pentium III, Xeon, Pentium 4, etc. 10 - * 11 - * Reference: Section 9.11 of Volume 3, IA-32 Intel Architecture 12 - * Software Developer's Manual. 13 - * 14 - * This program is free software; you can redistribute it and/or 15 - * modify it under the terms of the GNU General Public License 16 - * as published by the Free Software Foundation; either version 17 - * 2 of the License, or (at your option) any later version. 18 - */ 19 - 20 - /* 21 - * This needs to be before all headers so that pr_debug in printk.h doesn't turn 22 - * printk calls into no_printk(). 23 - * 24 - *#define DEBUG 25 - */ 26 - 27 - #include <linux/module.h> 28 - #include <linux/mm.h> 29 - #include <linux/slab.h> 30 - #include <linux/earlycpio.h> 31 - #include <linux/initrd.h> 32 - #include <linux/cpu.h> 33 - #include <asm/msr.h> 34 - #include <asm/microcode_intel.h> 35 - #include <asm/processor.h> 36 - #include <asm/tlbflush.h> 37 - #include <asm/setup.h> 38 - 39 - #undef pr_fmt 40 - #define pr_fmt(fmt) "microcode: " fmt 41 - 42 - static unsigned long mc_saved_in_initrd[MAX_UCODE_COUNT]; 43 - static struct mc_saved_data { 44 - unsigned int mc_saved_count; 45 - struct microcode_intel **mc_saved; 46 - } mc_saved_data; 47 - 48 - static enum ucode_state 49 - load_microcode_early(struct microcode_intel **saved, 50 - unsigned int num_saved, struct ucode_cpu_info *uci) 51 - { 52 - struct microcode_intel *ucode_ptr, *new_mc = NULL; 53 - struct microcode_header_intel *mc_hdr; 54 - int new_rev, ret, i; 55 - 56 - new_rev = uci->cpu_sig.rev; 57 - 58 - for (i = 0; i < num_saved; i++) { 59 - ucode_ptr = saved[i]; 60 - mc_hdr = (struct microcode_header_intel *)ucode_ptr; 61 - 62 - ret = has_newer_microcode(ucode_ptr, 63 - uci->cpu_sig.sig, 64 - uci->cpu_sig.pf, 65 - new_rev); 66 - if (!ret) 67 - continue; 68 - 69 - new_rev = mc_hdr->rev; 70 - new_mc = ucode_ptr; 71 - } 72 - 73 - if (!new_mc) 74 - return UCODE_NFOUND; 75 - 76 - uci->mc = (struct microcode_intel *)new_mc; 77 - return UCODE_OK; 78 - } 79 - 80 - static inline void 81 - copy_initrd_ptrs(struct microcode_intel **mc_saved, unsigned long *initrd, 82 - unsigned long off, int num_saved) 83 - { 84 - int i; 85 - 86 - for (i = 0; i < num_saved; i++) 87 - mc_saved[i] = (struct microcode_intel *)(initrd[i] + off); 88 - } 89 - 90 - #ifdef CONFIG_X86_32 91 - static void 92 - microcode_phys(struct microcode_intel **mc_saved_tmp, 93 - struct mc_saved_data *mc_saved_data) 94 - { 95 - int i; 96 - struct microcode_intel ***mc_saved; 97 - 98 - mc_saved = (struct microcode_intel ***) 99 - __pa_nodebug(&mc_saved_data->mc_saved); 100 - for (i = 0; i < mc_saved_data->mc_saved_count; i++) { 101 - struct microcode_intel *p; 102 - 103 - p = *(struct microcode_intel **) 104 - __pa_nodebug(mc_saved_data->mc_saved + i); 105 - mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p); 106 - } 107 - } 108 - #endif 109 - 110 - static enum ucode_state 111 - load_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd, 112 - unsigned long initrd_start, struct ucode_cpu_info *uci) 113 - { 114 - struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT]; 115 - unsigned int count = mc_saved_data->mc_saved_count; 116 - 117 - if (!mc_saved_data->mc_saved) { 118 - copy_initrd_ptrs(mc_saved_tmp, initrd, initrd_start, count); 119 - 120 - return load_microcode_early(mc_saved_tmp, count, uci); 121 - } else { 122 - #ifdef CONFIG_X86_32 123 - microcode_phys(mc_saved_tmp, mc_saved_data); 124 - return load_microcode_early(mc_saved_tmp, count, uci); 125 - #else 126 - return load_microcode_early(mc_saved_data->mc_saved, 127 - count, uci); 128 - #endif 129 - } 130 - } 131 - 132 - /* 133 - * Given CPU signature and a microcode patch, this function finds if the 134 - * microcode patch has matching family and model with the CPU. 135 - */ 136 - static enum ucode_state 137 - matching_model_microcode(struct microcode_header_intel *mc_header, 138 - unsigned long sig) 139 - { 140 - unsigned int fam, model; 141 - unsigned int fam_ucode, model_ucode; 142 - struct extended_sigtable *ext_header; 143 - unsigned long total_size = get_totalsize(mc_header); 144 - unsigned long data_size = get_datasize(mc_header); 145 - int ext_sigcount, i; 146 - struct extended_signature *ext_sig; 147 - 148 - fam = __x86_family(sig); 149 - model = x86_model(sig); 150 - 151 - fam_ucode = __x86_family(mc_header->sig); 152 - model_ucode = x86_model(mc_header->sig); 153 - 154 - if (fam == fam_ucode && model == model_ucode) 155 - return UCODE_OK; 156 - 157 - /* Look for ext. headers: */ 158 - if (total_size <= data_size + MC_HEADER_SIZE) 159 - return UCODE_NFOUND; 160 - 161 - ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE; 162 - ext_sig = (void *)ext_header + EXT_HEADER_SIZE; 163 - ext_sigcount = ext_header->count; 164 - 165 - for (i = 0; i < ext_sigcount; i++) { 166 - fam_ucode = __x86_family(ext_sig->sig); 167 - model_ucode = x86_model(ext_sig->sig); 168 - 169 - if (fam == fam_ucode && model == model_ucode) 170 - return UCODE_OK; 171 - 172 - ext_sig++; 173 - } 174 - return UCODE_NFOUND; 175 - } 176 - 177 - static int 178 - save_microcode(struct mc_saved_data *mc_saved_data, 179 - struct microcode_intel **mc_saved_src, 180 - unsigned int mc_saved_count) 181 - { 182 - int i, j; 183 - struct microcode_intel **saved_ptr; 184 - int ret; 185 - 186 - if (!mc_saved_count) 187 - return -EINVAL; 188 - 189 - /* 190 - * Copy new microcode data. 191 - */ 192 - saved_ptr = kcalloc(mc_saved_count, sizeof(struct microcode_intel *), GFP_KERNEL); 193 - if (!saved_ptr) 194 - return -ENOMEM; 195 - 196 - for (i = 0; i < mc_saved_count; i++) { 197 - struct microcode_header_intel *mc_hdr; 198 - struct microcode_intel *mc; 199 - unsigned long size; 200 - 201 - if (!mc_saved_src[i]) { 202 - ret = -EINVAL; 203 - goto err; 204 - } 205 - 206 - mc = mc_saved_src[i]; 207 - mc_hdr = &mc->hdr; 208 - size = get_totalsize(mc_hdr); 209 - 210 - saved_ptr[i] = kmalloc(size, GFP_KERNEL); 211 - if (!saved_ptr[i]) { 212 - ret = -ENOMEM; 213 - goto err; 214 - } 215 - 216 - memcpy(saved_ptr[i], mc, size); 217 - } 218 - 219 - /* 220 - * Point to newly saved microcode. 221 - */ 222 - mc_saved_data->mc_saved = saved_ptr; 223 - mc_saved_data->mc_saved_count = mc_saved_count; 224 - 225 - return 0; 226 - 227 - err: 228 - for (j = 0; j <= i; j++) 229 - kfree(saved_ptr[j]); 230 - kfree(saved_ptr); 231 - 232 - return ret; 233 - } 234 - 235 - /* 236 - * A microcode patch in ucode_ptr is saved into mc_saved 237 - * - if it has matching signature and newer revision compared to an existing 238 - * patch mc_saved. 239 - * - or if it is a newly discovered microcode patch. 240 - * 241 - * The microcode patch should have matching model with CPU. 242 - * 243 - * Returns: The updated number @num_saved of saved microcode patches. 244 - */ 245 - static unsigned int _save_mc(struct microcode_intel **mc_saved, 246 - u8 *ucode_ptr, unsigned int num_saved) 247 - { 248 - struct microcode_header_intel *mc_hdr, *mc_saved_hdr; 249 - unsigned int sig, pf; 250 - int found = 0, i; 251 - 252 - mc_hdr = (struct microcode_header_intel *)ucode_ptr; 253 - 254 - for (i = 0; i < num_saved; i++) { 255 - mc_saved_hdr = (struct microcode_header_intel *)mc_saved[i]; 256 - sig = mc_saved_hdr->sig; 257 - pf = mc_saved_hdr->pf; 258 - 259 - if (!find_matching_signature(ucode_ptr, sig, pf)) 260 - continue; 261 - 262 - found = 1; 263 - 264 - if (mc_hdr->rev <= mc_saved_hdr->rev) 265 - continue; 266 - 267 - /* 268 - * Found an older ucode saved earlier. Replace it with 269 - * this newer one. 270 - */ 271 - mc_saved[i] = (struct microcode_intel *)ucode_ptr; 272 - break; 273 - } 274 - 275 - /* Newly detected microcode, save it to memory. */ 276 - if (i >= num_saved && !found) 277 - mc_saved[num_saved++] = (struct microcode_intel *)ucode_ptr; 278 - 279 - return num_saved; 280 - } 281 - 282 - /* 283 - * Get microcode matching with BSP's model. Only CPUs with the same model as 284 - * BSP can stay in the platform. 285 - */ 286 - static enum ucode_state __init 287 - get_matching_model_microcode(int cpu, unsigned long start, 288 - void *data, size_t size, 289 - struct mc_saved_data *mc_saved_data, 290 - unsigned long *mc_saved_in_initrd, 291 - struct ucode_cpu_info *uci) 292 - { 293 - u8 *ucode_ptr = data; 294 - unsigned int leftover = size; 295 - enum ucode_state state = UCODE_OK; 296 - unsigned int mc_size; 297 - struct microcode_header_intel *mc_header; 298 - struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT]; 299 - unsigned int mc_saved_count = mc_saved_data->mc_saved_count; 300 - int i; 301 - 302 - while (leftover && mc_saved_count < ARRAY_SIZE(mc_saved_tmp)) { 303 - 304 - if (leftover < sizeof(mc_header)) 305 - break; 306 - 307 - mc_header = (struct microcode_header_intel *)ucode_ptr; 308 - 309 - mc_size = get_totalsize(mc_header); 310 - if (!mc_size || mc_size > leftover || 311 - microcode_sanity_check(ucode_ptr, 0) < 0) 312 - break; 313 - 314 - leftover -= mc_size; 315 - 316 - /* 317 - * Since APs with same family and model as the BSP may boot in 318 - * the platform, we need to find and save microcode patches 319 - * with the same family and model as the BSP. 320 - */ 321 - if (matching_model_microcode(mc_header, uci->cpu_sig.sig) != 322 - UCODE_OK) { 323 - ucode_ptr += mc_size; 324 - continue; 325 - } 326 - 327 - mc_saved_count = _save_mc(mc_saved_tmp, ucode_ptr, mc_saved_count); 328 - 329 - ucode_ptr += mc_size; 330 - } 331 - 332 - if (leftover) { 333 - state = UCODE_ERROR; 334 - goto out; 335 - } 336 - 337 - if (mc_saved_count == 0) { 338 - state = UCODE_NFOUND; 339 - goto out; 340 - } 341 - 342 - for (i = 0; i < mc_saved_count; i++) 343 - mc_saved_in_initrd[i] = (unsigned long)mc_saved_tmp[i] - start; 344 - 345 - mc_saved_data->mc_saved_count = mc_saved_count; 346 - out: 347 - return state; 348 - } 349 - 350 - static int collect_cpu_info_early(struct ucode_cpu_info *uci) 351 - { 352 - unsigned int val[2]; 353 - unsigned int family, model; 354 - struct cpu_signature csig; 355 - unsigned int eax, ebx, ecx, edx; 356 - 357 - csig.sig = 0; 358 - csig.pf = 0; 359 - csig.rev = 0; 360 - 361 - memset(uci, 0, sizeof(*uci)); 362 - 363 - eax = 0x00000001; 364 - ecx = 0; 365 - native_cpuid(&eax, &ebx, &ecx, &edx); 366 - csig.sig = eax; 367 - 368 - family = __x86_family(csig.sig); 369 - model = x86_model(csig.sig); 370 - 371 - if ((model >= 5) || (family > 6)) { 372 - /* get processor flags from MSR 0x17 */ 373 - native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]); 374 - csig.pf = 1 << ((val[1] >> 18) & 7); 375 - } 376 - native_wrmsr(MSR_IA32_UCODE_REV, 0, 0); 377 - 378 - /* As documented in the SDM: Do a CPUID 1 here */ 379 - sync_core(); 380 - 381 - /* get the current revision from MSR 0x8B */ 382 - native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]); 383 - 384 - csig.rev = val[1]; 385 - 386 - uci->cpu_sig = csig; 387 - uci->valid = 1; 388 - 389 - return 0; 390 - } 391 - 392 - #ifdef DEBUG 393 - static void show_saved_mc(void) 394 - { 395 - int i, j; 396 - unsigned int sig, pf, rev, total_size, data_size, date; 397 - struct ucode_cpu_info uci; 398 - 399 - if (mc_saved_data.mc_saved_count == 0) { 400 - pr_debug("no microcode data saved.\n"); 401 - return; 402 - } 403 - pr_debug("Total microcode saved: %d\n", mc_saved_data.mc_saved_count); 404 - 405 - collect_cpu_info_early(&uci); 406 - 407 - sig = uci.cpu_sig.sig; 408 - pf = uci.cpu_sig.pf; 409 - rev = uci.cpu_sig.rev; 410 - pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev); 411 - 412 - for (i = 0; i < mc_saved_data.mc_saved_count; i++) { 413 - struct microcode_header_intel *mc_saved_header; 414 - struct extended_sigtable *ext_header; 415 - int ext_sigcount; 416 - struct extended_signature *ext_sig; 417 - 418 - mc_saved_header = (struct microcode_header_intel *) 419 - mc_saved_data.mc_saved[i]; 420 - sig = mc_saved_header->sig; 421 - pf = mc_saved_header->pf; 422 - rev = mc_saved_header->rev; 423 - total_size = get_totalsize(mc_saved_header); 424 - data_size = get_datasize(mc_saved_header); 425 - date = mc_saved_header->date; 426 - 427 - pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, toal size=0x%x, date = %04x-%02x-%02x\n", 428 - i, sig, pf, rev, total_size, 429 - date & 0xffff, 430 - date >> 24, 431 - (date >> 16) & 0xff); 432 - 433 - /* Look for ext. headers: */ 434 - if (total_size <= data_size + MC_HEADER_SIZE) 435 - continue; 436 - 437 - ext_header = (void *) mc_saved_header + data_size + MC_HEADER_SIZE; 438 - ext_sigcount = ext_header->count; 439 - ext_sig = (void *)ext_header + EXT_HEADER_SIZE; 440 - 441 - for (j = 0; j < ext_sigcount; j++) { 442 - sig = ext_sig->sig; 443 - pf = ext_sig->pf; 444 - 445 - pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n", 446 - j, sig, pf); 447 - 448 - ext_sig++; 449 - } 450 - 451 - } 452 - } 453 - #else 454 - static inline void show_saved_mc(void) 455 - { 456 - } 457 - #endif 458 - 459 - #if defined(CONFIG_MICROCODE_INTEL_EARLY) && defined(CONFIG_HOTPLUG_CPU) 460 - static DEFINE_MUTEX(x86_cpu_microcode_mutex); 461 - /* 462 - * Save this mc into mc_saved_data. So it will be loaded early when a CPU is 463 - * hot added or resumes. 464 - * 465 - * Please make sure this mc should be a valid microcode patch before calling 466 - * this function. 467 - */ 468 - int save_mc_for_early(u8 *mc) 469 - { 470 - struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT]; 471 - unsigned int mc_saved_count_init; 472 - unsigned int mc_saved_count; 473 - struct microcode_intel **mc_saved; 474 - int ret = 0; 475 - int i; 476 - 477 - /* 478 - * Hold hotplug lock so mc_saved_data is not accessed by a CPU in 479 - * hotplug. 480 - */ 481 - mutex_lock(&x86_cpu_microcode_mutex); 482 - 483 - mc_saved_count_init = mc_saved_data.mc_saved_count; 484 - mc_saved_count = mc_saved_data.mc_saved_count; 485 - mc_saved = mc_saved_data.mc_saved; 486 - 487 - if (mc_saved && mc_saved_count) 488 - memcpy(mc_saved_tmp, mc_saved, 489 - mc_saved_count * sizeof(struct microcode_intel *)); 490 - /* 491 - * Save the microcode patch mc in mc_save_tmp structure if it's a newer 492 - * version. 493 - */ 494 - mc_saved_count = _save_mc(mc_saved_tmp, mc, mc_saved_count); 495 - 496 - /* 497 - * Save the mc_save_tmp in global mc_saved_data. 498 - */ 499 - ret = save_microcode(&mc_saved_data, mc_saved_tmp, mc_saved_count); 500 - if (ret) { 501 - pr_err("Cannot save microcode patch.\n"); 502 - goto out; 503 - } 504 - 505 - show_saved_mc(); 506 - 507 - /* 508 - * Free old saved microcode data. 509 - */ 510 - if (mc_saved) { 511 - for (i = 0; i < mc_saved_count_init; i++) 512 - kfree(mc_saved[i]); 513 - kfree(mc_saved); 514 - } 515 - 516 - out: 517 - mutex_unlock(&x86_cpu_microcode_mutex); 518 - 519 - return ret; 520 - } 521 - EXPORT_SYMBOL_GPL(save_mc_for_early); 522 - #endif 523 - 524 - static bool __init load_builtin_intel_microcode(struct cpio_data *cp) 525 - { 526 - #ifdef CONFIG_X86_64 527 - unsigned int eax = 0x00000001, ebx, ecx = 0, edx; 528 - unsigned int family, model, stepping; 529 - char name[30]; 530 - 531 - native_cpuid(&eax, &ebx, &ecx, &edx); 532 - 533 - family = __x86_family(eax); 534 - model = x86_model(eax); 535 - stepping = eax & 0xf; 536 - 537 - sprintf(name, "intel-ucode/%02x-%02x-%02x", family, model, stepping); 538 - 539 - return get_builtin_firmware(cp, name); 540 - #else 541 - return false; 542 - #endif 543 - } 544 - 545 - static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin"; 546 - static __init enum ucode_state 547 - scan_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd, 548 - unsigned long start, unsigned long size, 549 - struct ucode_cpu_info *uci) 550 - { 551 - struct cpio_data cd; 552 - long offset = 0; 553 - #ifdef CONFIG_X86_32 554 - char *p = (char *)__pa_nodebug(ucode_name); 555 - #else 556 - char *p = ucode_name; 557 - #endif 558 - 559 - cd.data = NULL; 560 - cd.size = 0; 561 - 562 - cd = find_cpio_data(p, (void *)start, size, &offset); 563 - if (!cd.data) { 564 - if (!load_builtin_intel_microcode(&cd)) 565 - return UCODE_ERROR; 566 - } 567 - 568 - return get_matching_model_microcode(0, start, cd.data, cd.size, 569 - mc_saved_data, initrd, uci); 570 - } 571 - 572 - /* 573 - * Print ucode update info. 574 - */ 575 - static void 576 - print_ucode_info(struct ucode_cpu_info *uci, unsigned int date) 577 - { 578 - int cpu = smp_processor_id(); 579 - 580 - pr_info("CPU%d microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n", 581 - cpu, 582 - uci->cpu_sig.rev, 583 - date & 0xffff, 584 - date >> 24, 585 - (date >> 16) & 0xff); 586 - } 587 - 588 - #ifdef CONFIG_X86_32 589 - 590 - static int delay_ucode_info; 591 - static int current_mc_date; 592 - 593 - /* 594 - * Print early updated ucode info after printk works. This is delayed info dump. 595 - */ 596 - void show_ucode_info_early(void) 597 - { 598 - struct ucode_cpu_info uci; 599 - 600 - if (delay_ucode_info) { 601 - collect_cpu_info_early(&uci); 602 - print_ucode_info(&uci, current_mc_date); 603 - delay_ucode_info = 0; 604 - } 605 - } 606 - 607 - /* 608 - * At this point, we can not call printk() yet. Keep microcode patch number in 609 - * mc_saved_data.mc_saved and delay printing microcode info in 610 - * show_ucode_info_early() until printk() works. 611 - */ 612 - static void print_ucode(struct ucode_cpu_info *uci) 613 - { 614 - struct microcode_intel *mc_intel; 615 - int *delay_ucode_info_p; 616 - int *current_mc_date_p; 617 - 618 - mc_intel = uci->mc; 619 - if (mc_intel == NULL) 620 - return; 621 - 622 - delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info); 623 - current_mc_date_p = (int *)__pa_nodebug(&current_mc_date); 624 - 625 - *delay_ucode_info_p = 1; 626 - *current_mc_date_p = mc_intel->hdr.date; 627 - } 628 - #else 629 - 630 - /* 631 - * Flush global tlb. We only do this in x86_64 where paging has been enabled 632 - * already and PGE should be enabled as well. 633 - */ 634 - static inline void flush_tlb_early(void) 635 - { 636 - __native_flush_tlb_global_irq_disabled(); 637 - } 638 - 639 - static inline void print_ucode(struct ucode_cpu_info *uci) 640 - { 641 - struct microcode_intel *mc_intel; 642 - 643 - mc_intel = uci->mc; 644 - if (mc_intel == NULL) 645 - return; 646 - 647 - print_ucode_info(uci, mc_intel->hdr.date); 648 - } 649 - #endif 650 - 651 - static int apply_microcode_early(struct ucode_cpu_info *uci, bool early) 652 - { 653 - struct microcode_intel *mc_intel; 654 - unsigned int val[2]; 655 - 656 - mc_intel = uci->mc; 657 - if (mc_intel == NULL) 658 - return 0; 659 - 660 - /* write microcode via MSR 0x79 */ 661 - native_wrmsr(MSR_IA32_UCODE_WRITE, 662 - (unsigned long) mc_intel->bits, 663 - (unsigned long) mc_intel->bits >> 16 >> 16); 664 - native_wrmsr(MSR_IA32_UCODE_REV, 0, 0); 665 - 666 - /* As documented in the SDM: Do a CPUID 1 here */ 667 - sync_core(); 668 - 669 - /* get the current revision from MSR 0x8B */ 670 - native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]); 671 - if (val[1] != mc_intel->hdr.rev) 672 - return -1; 673 - 674 - #ifdef CONFIG_X86_64 675 - /* Flush global tlb. This is precaution. */ 676 - flush_tlb_early(); 677 - #endif 678 - uci->cpu_sig.rev = val[1]; 679 - 680 - if (early) 681 - print_ucode(uci); 682 - else 683 - print_ucode_info(uci, mc_intel->hdr.date); 684 - 685 - return 0; 686 - } 687 - 688 - /* 689 - * This function converts microcode patch offsets previously stored in 690 - * mc_saved_in_initrd to pointers and stores the pointers in mc_saved_data. 691 - */ 692 - int __init save_microcode_in_initrd_intel(void) 693 - { 694 - unsigned int count = mc_saved_data.mc_saved_count; 695 - struct microcode_intel *mc_saved[MAX_UCODE_COUNT]; 696 - int ret = 0; 697 - 698 - if (count == 0) 699 - return ret; 700 - 701 - copy_initrd_ptrs(mc_saved, mc_saved_in_initrd, initrd_start, count); 702 - ret = save_microcode(&mc_saved_data, mc_saved, count); 703 - if (ret) 704 - pr_err("Cannot save microcode patches from initrd.\n"); 705 - 706 - show_saved_mc(); 707 - 708 - return ret; 709 - } 710 - 711 - static void __init 712 - _load_ucode_intel_bsp(struct mc_saved_data *mc_saved_data, 713 - unsigned long *initrd, 714 - unsigned long start, unsigned long size) 715 - { 716 - struct ucode_cpu_info uci; 717 - enum ucode_state ret; 718 - 719 - collect_cpu_info_early(&uci); 720 - 721 - ret = scan_microcode(mc_saved_data, initrd, start, size, &uci); 722 - if (ret != UCODE_OK) 723 - return; 724 - 725 - ret = load_microcode(mc_saved_data, initrd, start, &uci); 726 - if (ret != UCODE_OK) 727 - return; 728 - 729 - apply_microcode_early(&uci, true); 730 - } 731 - 732 - void __init load_ucode_intel_bsp(void) 733 - { 734 - u64 start, size; 735 - #ifdef CONFIG_X86_32 736 - struct boot_params *p; 737 - 738 - p = (struct boot_params *)__pa_nodebug(&boot_params); 739 - start = p->hdr.ramdisk_image; 740 - size = p->hdr.ramdisk_size; 741 - 742 - _load_ucode_intel_bsp( 743 - (struct mc_saved_data *)__pa_nodebug(&mc_saved_data), 744 - (unsigned long *)__pa_nodebug(&mc_saved_in_initrd), 745 - start, size); 746 - #else 747 - start = boot_params.hdr.ramdisk_image + PAGE_OFFSET; 748 - size = boot_params.hdr.ramdisk_size; 749 - 750 - _load_ucode_intel_bsp(&mc_saved_data, mc_saved_in_initrd, start, size); 751 - #endif 752 - } 753 - 754 - void load_ucode_intel_ap(void) 755 - { 756 - struct mc_saved_data *mc_saved_data_p; 757 - struct ucode_cpu_info uci; 758 - unsigned long *mc_saved_in_initrd_p; 759 - unsigned long initrd_start_addr; 760 - enum ucode_state ret; 761 - #ifdef CONFIG_X86_32 762 - unsigned long *initrd_start_p; 763 - 764 - mc_saved_in_initrd_p = 765 - (unsigned long *)__pa_nodebug(mc_saved_in_initrd); 766 - mc_saved_data_p = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data); 767 - initrd_start_p = (unsigned long *)__pa_nodebug(&initrd_start); 768 - initrd_start_addr = (unsigned long)__pa_nodebug(*initrd_start_p); 769 - #else 770 - mc_saved_data_p = &mc_saved_data; 771 - mc_saved_in_initrd_p = mc_saved_in_initrd; 772 - initrd_start_addr = initrd_start; 773 - #endif 774 - 775 - /* 776 - * If there is no valid ucode previously saved in memory, no need to 777 - * update ucode on this AP. 778 - */ 779 - if (mc_saved_data_p->mc_saved_count == 0) 780 - return; 781 - 782 - collect_cpu_info_early(&uci); 783 - ret = load_microcode(mc_saved_data_p, mc_saved_in_initrd_p, 784 - initrd_start_addr, &uci); 785 - 786 - if (ret != UCODE_OK) 787 - return; 788 - 789 - apply_microcode_early(&uci, true); 790 - } 791 - 792 - void reload_ucode_intel(void) 793 - { 794 - struct ucode_cpu_info uci; 795 - enum ucode_state ret; 796 - 797 - if (!mc_saved_data.mc_saved_count) 798 - return; 799 - 800 - collect_cpu_info_early(&uci); 801 - 802 - ret = load_microcode_early(mc_saved_data.mc_saved, 803 - mc_saved_data.mc_saved_count, &uci); 804 - if (ret != UCODE_OK) 805 - return; 806 - 807 - apply_microcode_early(&uci, false); 808 - }
+2 -3
arch/x86/kernel/head_32.S
··· 152 152 movl %eax, pa(olpc_ofw_pgd) 153 153 #endif 154 154 155 - #ifdef CONFIG_MICROCODE_EARLY 155 + #ifdef CONFIG_MICROCODE 156 156 /* Early load ucode on BSP. */ 157 157 call load_ucode_bsp 158 158 #endif ··· 311 311 movl %eax,%ss 312 312 leal -__PAGE_OFFSET(%ecx),%esp 313 313 314 - #ifdef CONFIG_MICROCODE_EARLY 314 + #ifdef CONFIG_MICROCODE 315 315 /* Early load ucode on AP. */ 316 316 call load_ucode_ap 317 317 #endif 318 - 319 318 320 319 default_entry: 321 320 #define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \
-2
arch/x86/mm/init.c
··· 693 693 #ifdef CONFIG_BLK_DEV_INITRD 694 694 void __init free_initrd_mem(unsigned long start, unsigned long end) 695 695 { 696 - #ifdef CONFIG_MICROCODE_EARLY 697 696 /* 698 697 * Remember, initrd memory may contain microcode or other useful things. 699 698 * Before we lose initrd mem, we need to find a place to hold them 700 699 * now that normal virtual memory is enabled. 701 700 */ 702 701 save_microcode_in_initrd(); 703 - #endif 704 702 705 703 /* 706 704 * end could be not aligned, and We can not align that,