Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

[netdrvr starfire] Add GPL'd firmware, remove compat code Contributed by Ion Badulescu <ionut@badula.org>, further fixed up by me.

+386 -102
+40 -102
drivers/net/starfire.c
··· 2 2 /* 3 3 Written 1998-2000 by Donald Becker. 4 4 5 - Current maintainer is Ion Badulescu <ionut@cs.columbia.edu>. Please 5 + Current maintainer is Ion Badulescu <ionut ta badula tod org>. Please 6 6 send all bug reports to me, and not to Donald Becker, as this code 7 7 has been heavily modified from Donald's original version. 8 8 ··· 129 129 - put the chip to a D3 slumber on driver unload 130 130 - added config option to enable/disable NAPI 131 131 132 - TODO: bugfixes (no bugs known as of right now) 132 + LK1.4.2 (Ion Badulescu) 133 + - finally added firmware (GPL'ed by Adaptec) 134 + - removed compatibility code for 2.2.x 135 + 136 + TODO: - fix forced speed/duplexing code (broken a long time ago, when 137 + somebody converted the driver to use the generic MII code) 138 + - fix VLAN support 133 139 */ 134 140 135 141 #define DRV_NAME "starfire" 136 - #define DRV_VERSION "1.03+LK1.4.1" 137 - #define DRV_RELDATE "February 10, 2002" 142 + #define DRV_VERSION "1.03+LK1.4.2" 143 + #define DRV_RELDATE "January 19, 2005" 138 144 139 145 #include <linux/config.h> 140 146 #include <linux/version.h> ··· 151 145 #include <linux/etherdevice.h> 152 146 #include <linux/init.h> 153 147 #include <linux/delay.h> 148 + #include <linux/crc32.h> 149 + #include <linux/ethtool.h> 150 + #include <linux/mii.h> 151 + #include <linux/if_vlan.h> 154 152 #include <asm/processor.h> /* Processor type for cache alignment. */ 155 153 #include <asm/uaccess.h> 156 154 #include <asm/io.h> 157 155 158 - /* 159 - * Adaptec's license for their drivers (which is where I got the 160 - * firmware files) does not allow one to redistribute them. Thus, we can't 161 - * include the firmware with this driver. 162 - * 163 - * However, should a legal-to-distribute firmware become available, 164 - * the driver developer would need only to obtain the firmware in the 165 - * form of a C header file. 166 - * Once that's done, the #undef below must be changed into a #define 167 - * for this driver to really use the firmware. Note that Rx/Tx 168 - * hardware TCP checksumming is not possible without the firmware. 169 - * 170 - * WANTED: legal firmware to include with this GPL'd driver. 171 - */ 172 - #undef HAS_FIRMWARE 156 + #include "starfire_firmware.h" 173 157 /* 174 158 * The current frame processor firmware fails to checksum a fragment 175 159 * of length 1. If and when this is fixed, the #define below can be removed. ··· 168 172 /* 169 173 * Define this if using the driver with the zero-copy patch 170 174 */ 171 - #if defined(HAS_FIRMWARE) && defined(MAX_SKB_FRAGS) 172 175 #define ZEROCOPY 173 - #endif 174 - 175 - #ifdef HAS_FIRMWARE 176 - #include "starfire_firmware.h" 177 - #endif /* HAS_FIRMWARE */ 178 176 179 177 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) 180 178 #define VLAN_SUPPORT ··· 192 202 The Starfire has a 512 element hash table based on the Ethernet CRC. */ 193 203 static int multicast_filter_limit = 512; 194 204 /* Whether to do TCP/UDP checksums in hardware */ 195 - #ifdef HAS_FIRMWARE 196 205 static int enable_hw_cksum = 1; 197 - #else 198 - static int enable_hw_cksum = 0; 199 - #endif 200 206 201 207 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/ 202 208 /* ··· 277 291 #define RX_DESC_ADDR_SIZE RxDescAddr32bit 278 292 #endif 279 293 280 - #ifdef MAX_SKB_FRAGS 281 294 #define skb_first_frag_len(skb) skb_headlen(skb) 282 295 #define skb_num_frags(skb) (skb_shinfo(skb)->nr_frags + 1) 283 - #else /* not MAX_SKB_FRAGS */ 284 - #define skb_first_frag_len(skb) (skb->len) 285 - #define skb_num_frags(skb) 1 286 - #endif /* not MAX_SKB_FRAGS */ 287 - 288 - /* 2.2.x compatibility code */ 289 - #if LINUX_VERSION_CODE < 0x20300 290 - 291 - #include "starfire-kcomp22.h" 292 - 293 - #else /* LINUX_VERSION_CODE > 0x20300 */ 294 - 295 - #include <linux/crc32.h> 296 - #include <linux/ethtool.h> 297 - #include <linux/mii.h> 298 - 299 - #include <linux/if_vlan.h> 300 - 301 - #define init_tx_timer(dev, func, timeout) \ 302 - dev->tx_timeout = func; \ 303 - dev->watchdog_timeo = timeout; 304 - #define kick_tx_timer(dev, func, timeout) 305 - 306 - #define netif_start_if(dev) 307 - #define netif_stop_if(dev) 308 - 309 - #define PCI_SLOT_NAME(pci_dev) pci_name(pci_dev) 310 - 311 - #endif /* LINUX_VERSION_CODE > 0x20300 */ 312 296 313 297 #ifdef HAVE_NETDEV_POLL 314 298 #define init_poll(dev) \ 299 + do { \ 315 300 dev->poll = &netdev_poll; \ 316 - dev->weight = max_interrupt_work; 301 + dev->weight = max_interrupt_work; \ 302 + } while (0) 317 303 #define netdev_rx(dev, ioaddr) \ 318 304 do { \ 319 305 u32 intr_enable; \ ··· 299 341 /* Paranoia check */ \ 300 342 intr_enable = readl(ioaddr + IntrEnable); \ 301 343 if (intr_enable & (IntrRxDone | IntrRxEmpty)) { \ 302 - printk("%s: interrupt while in polling mode!\n", dev->name); \ 344 + printk(KERN_INFO "%s: interrupt while in polling mode!\n", dev->name); \ 303 345 intr_enable &= ~(IntrRxDone | IntrRxEmpty); \ 304 346 writel(intr_enable, ioaddr + IntrEnable); \ 305 347 } \ ··· 329 371 MODULE_AUTHOR("Donald Becker <becker@scyld.com>"); 330 372 MODULE_DESCRIPTION("Adaptec Starfire Ethernet driver"); 331 373 MODULE_LICENSE("GPL"); 374 + MODULE_VERSION(DRV_VERSION); 332 375 333 376 module_param(max_interrupt_work, int, 0); 334 377 module_param(mtu, int, 0); ··· 384 425 minimum-length padding. It does not use the completion queue 385 426 consumer index, but instead checks for non-zero status entries. 386 427 387 - For receive this driver uses type 0/1/2/3 receive descriptors. The driver 428 + For receive this driver uses type 2/3 receive descriptors. The driver 388 429 allocates full frame size skbuffs for the Rx ring buffers, so all frames 389 430 should fit in a single descriptor. The driver does not use the completion 390 431 queue consumer index, but instead checks for non-zero status entries. ··· 435 476 436 477 */ 437 478 438 - 479 + 439 480 440 481 enum chip_capability_flags {CanHaveMII=1, }; 441 482 ··· 629 670 u32 timestamp; 630 671 }; 631 672 /* XXX: this is ugly and I'm not sure it's worth the trouble -Ion */ 632 - #ifdef HAS_FIRMWARE 633 673 #ifdef VLAN_SUPPORT 634 674 typedef struct full_rx_done_desc rx_done_desc; 635 675 #define RxComplType RxComplType3 ··· 636 678 typedef struct csum_rx_done_desc rx_done_desc; 637 679 #define RxComplType RxComplType2 638 680 #endif /* not VLAN_SUPPORT */ 639 - #else /* not HAS_FIRMWARE */ 640 - #ifdef VLAN_SUPPORT 641 - typedef struct basic_rx_done_desc rx_done_desc; 642 - #define RxComplType RxComplType1 643 - #else /* not VLAN_SUPPORT */ 644 - typedef struct short_rx_done_desc rx_done_desc; 645 - #define RxComplType RxComplType0 646 - #endif /* not VLAN_SUPPORT */ 647 - #endif /* not HAS_FIRMWARE */ 648 681 649 682 enum rx_done_bits { 650 683 RxOK=0x20000000, RxFIFOErr=0x10000000, RxBufQ2=0x08000000, ··· 847 898 /* enable MWI -- it vastly improves Rx performance on sparc64 */ 848 899 pci_set_mwi(pdev); 849 900 850 - #ifdef MAX_SKB_FRAGS 851 - dev->features |= NETIF_F_SG; 852 - #endif /* MAX_SKB_FRAGS */ 853 901 #ifdef ZEROCOPY 854 902 /* Starfire can do TCP/UDP checksumming */ 855 903 if (enable_hw_cksum) 856 - dev->features |= NETIF_F_IP_CSUM; 904 + dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG; 857 905 #endif /* ZEROCOPY */ 858 906 #ifdef VLAN_SUPPORT 859 907 dev->features |= NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER; ··· 954 1008 /* The chip-specific entries in the device structure. */ 955 1009 dev->open = &netdev_open; 956 1010 dev->hard_start_xmit = &start_tx; 957 - init_tx_timer(dev, tx_timeout, TX_TIMEOUT); 1011 + dev->tx_timeout = tx_timeout; 1012 + dev->watchdog_timeo = TX_TIMEOUT; 958 1013 init_poll(dev); 959 1014 dev->stop = &netdev_close; 960 1015 dev->get_stats = &get_stats; ··· 986 1039 if ((mdio_read(dev, phy, MII_BMCR) & BMCR_RESET) == 0) 987 1040 break; 988 1041 if (boguscnt == 0) { 989 - printk("%s: PHY reset never completed!\n", dev->name); 1042 + printk("%s: PHY#%d reset never completed!\n", dev->name, phy); 990 1043 continue; 991 1044 } 992 1045 mii_status = mdio_read(dev, phy, MII_BMSR); ··· 1057 1110 size_t tx_done_q_size, rx_done_q_size, tx_ring_size, rx_ring_size; 1058 1111 1059 1112 /* Do we ever need to reset the chip??? */ 1113 + 1060 1114 retval = request_irq(dev->irq, &intr_handler, SA_SHIRQ, dev->name, dev); 1061 1115 if (retval) 1062 1116 return retval; ··· 1159 1211 1160 1212 writel(np->intr_timer_ctrl, ioaddr + IntrTimerCtrl); 1161 1213 1162 - netif_start_if(dev); 1163 1214 netif_start_queue(dev); 1164 1215 1165 1216 if (debug > 1) ··· 1185 1238 writel(ETH_P_8021Q, ioaddr + VlanType); 1186 1239 #endif /* VLAN_SUPPORT */ 1187 1240 1188 - #ifdef HAS_FIRMWARE 1189 1241 /* Load Rx/Tx firmware into the frame processors */ 1190 1242 for (i = 0; i < FIRMWARE_RX_SIZE * 2; i++) 1191 1243 writel(firmware_rx[i], ioaddr + RxGfpMem + i * 4); 1192 1244 for (i = 0; i < FIRMWARE_TX_SIZE * 2; i++) 1193 1245 writel(firmware_tx[i], ioaddr + TxGfpMem + i * 4); 1194 - #endif /* HAS_FIRMWARE */ 1195 1246 if (enable_hw_cksum) 1196 1247 /* Enable the Rx and Tx units, and the Rx/Tx frame processors. */ 1197 1248 writel(TxEnable|TxGFPEnable|RxEnable|RxGFPEnable, ioaddr + GenCtrl); ··· 1323 1378 u32 status; 1324 1379 int i; 1325 1380 1326 - kick_tx_timer(dev, tx_timeout, TX_TIMEOUT); 1327 - 1328 1381 /* 1329 1382 * be cautious here, wrapping the queue has weird semantics 1330 1383 * and we may not have enough slots even when it seems we do. ··· 1347 1404 } 1348 1405 1349 1406 if (has_bad_length) 1350 - skb_checksum_help(skb); 1407 + skb_checksum_help(skb, 0); 1351 1408 } 1352 1409 #endif /* ZEROCOPY && HAS_BROKEN_FIRMWARE */ 1353 1410 ··· 1376 1433 np->tx_info[entry].mapping = 1377 1434 pci_map_single(np->pci_dev, skb->data, skb_first_frag_len(skb), PCI_DMA_TODEVICE); 1378 1435 } else { 1379 - #ifdef MAX_SKB_FRAGS 1380 1436 skb_frag_t *this_frag = &skb_shinfo(skb)->frags[i - 1]; 1381 1437 status |= this_frag->size; 1382 1438 np->tx_info[entry].mapping = 1383 1439 pci_map_single(np->pci_dev, page_address(this_frag->page) + this_frag->page_offset, this_frag->size, PCI_DMA_TODEVICE); 1384 - #endif /* MAX_SKB_FRAGS */ 1385 1440 } 1386 1441 1387 1442 np->tx_ring[entry].addr = cpu_to_dma(np->tx_info[entry].mapping); ··· 1472 1531 np->tx_info[entry].mapping = 0; 1473 1532 np->dirty_tx += np->tx_info[entry].used_slots; 1474 1533 entry = (entry + np->tx_info[entry].used_slots) % TX_RING_SIZE; 1475 - #ifdef MAX_SKB_FRAGS 1476 1534 { 1477 1535 int i; 1478 1536 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { ··· 1483 1543 entry++; 1484 1544 } 1485 1545 } 1486 - #endif /* MAX_SKB_FRAGS */ 1546 + 1487 1547 dev_kfree_skb_irq(skb); 1488 1548 } 1489 1549 np->tx_done_q[np->tx_done].status = 0; ··· 1543 1603 if (debug > 4) 1544 1604 printk(KERN_DEBUG " netdev_rx() status of %d was %#8.8x.\n", np->rx_done, desc_status); 1545 1605 if (!(desc_status & RxOK)) { 1546 - /* There was a error. */ 1606 + /* There was an error. */ 1547 1607 if (debug > 2) 1548 1608 printk(KERN_DEBUG " netdev_rx() Rx error was %#8.8x.\n", desc_status); 1549 1609 np->stats.rx_errors++; ··· 1596 1656 #endif 1597 1657 1598 1658 skb->protocol = eth_type_trans(skb, dev); 1599 - #if defined(HAS_FIRMWARE) || defined(VLAN_SUPPORT) 1659 + #ifdef VLAN_SUPPORT 1600 1660 if (debug > 4) 1601 1661 printk(KERN_DEBUG " netdev_rx() status2 of %d was %#4.4x.\n", np->rx_done, le16_to_cpu(desc->status2)); 1602 1662 #endif 1603 - #ifdef HAS_FIRMWARE 1604 1663 if (le16_to_cpu(desc->status2) & 0x0100) { 1605 1664 skb->ip_summed = CHECKSUM_UNNECESSARY; 1606 1665 np->stats.rx_compressed++; ··· 1618 1679 skb->csum = le16_to_cpu(desc->csum); 1619 1680 printk(KERN_DEBUG "%s: checksum_hw, status2 = %#x\n", dev->name, le16_to_cpu(desc->status2)); 1620 1681 } 1621 - #endif /* HAS_FIRMWARE */ 1622 1682 #ifdef VLAN_SUPPORT 1623 1683 if (np->vlgrp && le16_to_cpu(desc->status2) & 0x0200) { 1624 1684 if (debug > 4) ··· 1838 1900 } 1839 1901 1840 1902 1841 - /* Chips may use the upper or lower CRC bits, and may reverse and/or invert 1842 - them. Select the endian-ness that results in minimal calculations. 1843 - */ 1844 1903 static void set_rx_mode(struct net_device *dev) 1845 1904 { 1846 1905 struct netdev_private *np = netdev_priv(dev); ··· 1904 1969 memset(mc_filter, 0, sizeof(mc_filter)); 1905 1970 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; 1906 1971 i++, mclist = mclist->next) { 1972 + /* The chip uses the upper 9 CRC bits 1973 + as index into the hash table */ 1907 1974 int bit_nr = ether_crc_le(ETH_ALEN, mclist->dmi_addr) >> 23; 1908 1975 __u32 *fptr = (__u32 *) &mc_filter[(bit_nr >> 4) & ~1]; 1909 1976 ··· 1938 2001 struct netdev_private *np = netdev_priv(dev); 1939 2002 strcpy(info->driver, DRV_NAME); 1940 2003 strcpy(info->version, DRV_VERSION); 1941 - strcpy(info->bus_info, PCI_SLOT_NAME(np->pci_dev)); 2004 + strcpy(info->bus_info, pci_name(np->pci_dev)); 1942 2005 } 1943 2006 1944 2007 static int get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) ··· 2020 2083 int i; 2021 2084 2022 2085 netif_stop_queue(dev); 2023 - netif_stop_if(dev); 2024 2086 2025 2087 if (debug > 1) { 2026 2088 printk(KERN_DEBUG "%s: Shutting down ethercard, Intr status %#8.8x.\n", ··· 2120 2184 /* when a module, this is printed whether or not devices are found in probe */ 2121 2185 #ifdef MODULE 2122 2186 printk(version); 2187 + #ifdef HAVE_NETDEV_POLL 2188 + printk(KERN_INFO DRV_NAME ": polling (NAPI) enabled\n"); 2189 + #else 2190 + printk(KERN_INFO DRV_NAME ": polling (NAPI) disabled\n"); 2123 2191 #endif 2192 + #endif 2193 + 2124 2194 #ifndef ADDR_64BITS 2125 2195 /* we can do this test only at run-time... sigh */ 2126 2196 if (sizeof(dma_addr_t) == sizeof(u64)) { ··· 2134 2192 return -ENODEV; 2135 2193 } 2136 2194 #endif /* not ADDR_64BITS */ 2137 - #ifndef HAS_FIRMWARE 2138 - /* unconditionally disable hw cksums if firmware is not present */ 2139 - enable_hw_cksum = 0; 2140 - #endif /* not HAS_FIRMWARE */ 2141 2195 return pci_module_init (&starfire_driver); 2142 2196 } 2143 2197
+346
drivers/net/starfire_firmware.h
··· 1 + /* 2 + * Copyright 2003 Adaptec, Inc. 3 + * 4 + * Please read the following license before using the Adaptec Software 5 + * ("Program"). If you do not agree to the license terms, do not use the 6 + * Program: 7 + * 8 + * You agree to be bound by version 2 of the General Public License ("GPL") 9 + * dated June 1991, which can be found at http://www.fsf.org/licenses/gpl.html. 10 + * If the link is broken, write to Free Software Foundation, 59 Temple Place, 11 + * Boston, Massachusetts 02111-1307. 12 + * 13 + * BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE IT IS LICENSED "AS IS" AND 14 + * THERE IS NO WARRANTY FOR THE PROGRAM, INCLUDING BUT NOT LIMITED TO THE 15 + * IMPLIED WARRANTIES OF MERCHANTIBILITY OR FITNESS FOR A PARTICULAR PURPOSE 16 + * (TO THE EXTENT PERMITTED BY APPLICABLE LAW). USE OF THE PROGRAM IS AT YOUR 17 + * OWN RISK. IN NO EVENT WILL ADAPTEC OR ITS LICENSORS BE LIABLE TO YOU FOR 18 + * DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES 19 + * ARISING OUT OF THE USE OR INABILITY TO USE THE PROGRAM. 20 + * 21 + */ 22 + 23 + static const u32 firmware_rx[] = { 24 + 0x010003dc, 0x00000000, 25 + 0x04000421, 0x00000086, 26 + 0x80000015, 0x0000180e, 27 + 0x81000015, 0x00006664, 28 + 0x1a0040ab, 0x00000b06, 29 + 0x14200011, 0x00000000, 30 + 0x14204022, 0x0000aaaa, 31 + 0x14204022, 0x00000300, 32 + 0x14204022, 0x00000000, 33 + 0x1a0040ab, 0x00000b14, 34 + 0x14200011, 0x00000000, 35 + 0x83000015, 0x00000002, 36 + 0x04000021, 0x00000000, 37 + 0x00000010, 0x00000000, 38 + 0x04000421, 0x00000087, 39 + 0x00000010, 0x00000000, 40 + 0x00000010, 0x00000000, 41 + 0x00008015, 0x00000000, 42 + 0x0000003e, 0x00000000, 43 + 0x00000010, 0x00000000, 44 + 0x82000015, 0x00004000, 45 + 0x009e8050, 0x00000000, 46 + 0x03008015, 0x00000000, 47 + 0x86008015, 0x00000000, 48 + 0x82000015, 0x00008000, 49 + 0x0100001c, 0x00000000, 50 + 0x000050a0, 0x0000010c, 51 + 0x4e20d011, 0x00006008, 52 + 0x1420d012, 0x00004008, 53 + 0x0000f090, 0x00007000, 54 + 0x0000c8b0, 0x00003000, 55 + 0x00004040, 0x00000000, 56 + 0x00108015, 0x00000000, 57 + 0x00a2c150, 0x00004000, 58 + 0x00a400b0, 0x00000014, 59 + 0x00000020, 0x00000000, 60 + 0x2500400d, 0x00002525, 61 + 0x00047220, 0x00003100, 62 + 0x00934070, 0x00000000, 63 + 0x00000020, 0x00000000, 64 + 0x00924460, 0x00000184, 65 + 0x2b20c011, 0x00000000, 66 + 0x0000c420, 0x00000540, 67 + 0x36014018, 0x0000422d, 68 + 0x14200011, 0x00000000, 69 + 0x00924460, 0x00000183, 70 + 0x3200001f, 0x00000034, 71 + 0x02ac0015, 0x00000002, 72 + 0x00a60110, 0x00000008, 73 + 0x42200011, 0x00000000, 74 + 0x00924060, 0x00000103, 75 + 0x0000001e, 0x00000000, 76 + 0x00000020, 0x00000100, 77 + 0x0000001e, 0x00000000, 78 + 0x00924460, 0x00000086, 79 + 0x00004080, 0x00000000, 80 + 0x0092c070, 0x00000000, 81 + 0x00924060, 0x00000100, 82 + 0x0000c890, 0x00005000, 83 + 0x00a6c110, 0x00000000, 84 + 0x00b0c090, 0x00000012, 85 + 0x021c0015, 0x00000000, 86 + 0x3200001f, 0x00000034, 87 + 0x00924460, 0x00000510, 88 + 0x44210011, 0x00000000, 89 + 0x42000011, 0x00000000, 90 + 0x83000015, 0x00000040, 91 + 0x00924460, 0x00000508, 92 + 0x45014018, 0x00004545, 93 + 0x00808050, 0x00000000, 94 + 0x62208012, 0x00000000, 95 + 0x82000015, 0x00000800, 96 + 0x15200011, 0x00000000, 97 + 0x00000010, 0x00000000, 98 + 0x00000010, 0x00000000, 99 + 0x00000010, 0x00000000, 100 + 0x00000010, 0x00000000, 101 + 0x00000010, 0x00000000, 102 + 0x80000015, 0x0000eea4, 103 + 0x81000015, 0x0000005f, 104 + 0x00000060, 0x00000000, 105 + 0x00004120, 0x00000000, 106 + 0x00004a00, 0x00004000, 107 + 0x00924460, 0x00000190, 108 + 0x5601401a, 0x00005956, 109 + 0x14000011, 0x00000000, 110 + 0x00934050, 0x00000018, 111 + 0x00930050, 0x00000018, 112 + 0x3601403a, 0x0000002d, 113 + 0x000643a9, 0x00000000, 114 + 0x0000c420, 0x00000140, 115 + 0x5601401a, 0x00005956, 116 + 0x14000011, 0x00000000, 117 + 0x00000010, 0x00000000, 118 + 0x00000010, 0x00000000, 119 + 0x000642a9, 0x00000000, 120 + 0x00024420, 0x00000183, 121 + 0x5601401a, 0x00005956, 122 + 0x82000015, 0x00002000, 123 + 0x15200011, 0x00000000, 124 + 0x82000015, 0x00000010, 125 + 0x15200011, 0x00000000, 126 + 0x82000015, 0x00000010, 127 + 0x15200011, 0x00000000, 128 + }; /* 104 Rx instructions */ 129 + #define FIRMWARE_RX_SIZE 104 130 + 131 + static const u32 firmware_tx[] = { 132 + 0x010003dc, 0x00000000, 133 + 0x04000421, 0x00000086, 134 + 0x80000015, 0x0000180e, 135 + 0x81000015, 0x00006664, 136 + 0x1a0040ab, 0x00000b06, 137 + 0x14200011, 0x00000000, 138 + 0x14204022, 0x0000aaaa, 139 + 0x14204022, 0x00000300, 140 + 0x14204022, 0x00000000, 141 + 0x1a0040ab, 0x00000b14, 142 + 0x14200011, 0x00000000, 143 + 0x83000015, 0x00000002, 144 + 0x04000021, 0x00000000, 145 + 0x00000010, 0x00000000, 146 + 0x04000421, 0x00000087, 147 + 0x00000010, 0x00000000, 148 + 0x00000010, 0x00000000, 149 + 0x00008015, 0x00000000, 150 + 0x0000003e, 0x00000000, 151 + 0x00000010, 0x00000000, 152 + 0x82000015, 0x00004000, 153 + 0x009e8050, 0x00000000, 154 + 0x03008015, 0x00000000, 155 + 0x86008015, 0x00000000, 156 + 0x82000015, 0x00008000, 157 + 0x0100001c, 0x00000000, 158 + 0x000050a0, 0x0000010c, 159 + 0x4e20d011, 0x00006008, 160 + 0x1420d012, 0x00004008, 161 + 0x0000f090, 0x00007000, 162 + 0x0000c8b0, 0x00003000, 163 + 0x00004040, 0x00000000, 164 + 0x00108015, 0x00000000, 165 + 0x00a2c150, 0x00004000, 166 + 0x00a400b0, 0x00000014, 167 + 0x00000020, 0x00000000, 168 + 0x2500400d, 0x00002525, 169 + 0x00047220, 0x00003100, 170 + 0x00934070, 0x00000000, 171 + 0x00000020, 0x00000000, 172 + 0x00924460, 0x00000184, 173 + 0x2b20c011, 0x00000000, 174 + 0x0000c420, 0x00000540, 175 + 0x36014018, 0x0000422d, 176 + 0x14200011, 0x00000000, 177 + 0x00924460, 0x00000183, 178 + 0x3200001f, 0x00000034, 179 + 0x02ac0015, 0x00000002, 180 + 0x00a60110, 0x00000008, 181 + 0x42200011, 0x00000000, 182 + 0x00924060, 0x00000103, 183 + 0x0000001e, 0x00000000, 184 + 0x00000020, 0x00000100, 185 + 0x0000001e, 0x00000000, 186 + 0x00924460, 0x00000086, 187 + 0x00004080, 0x00000000, 188 + 0x0092c070, 0x00000000, 189 + 0x00924060, 0x00000100, 190 + 0x0000c890, 0x00005000, 191 + 0x00a6c110, 0x00000000, 192 + 0x00b0c090, 0x00000012, 193 + 0x021c0015, 0x00000000, 194 + 0x3200001f, 0x00000034, 195 + 0x00924460, 0x00000510, 196 + 0x44210011, 0x00000000, 197 + 0x42000011, 0x00000000, 198 + 0x83000015, 0x00000040, 199 + 0x00924460, 0x00000508, 200 + 0x45014018, 0x00004545, 201 + 0x00808050, 0x00000000, 202 + 0x62208012, 0x00000000, 203 + 0x82000015, 0x00000800, 204 + 0x15200011, 0x00000000, 205 + 0x00000010, 0x00000000, 206 + 0x00000010, 0x00000000, 207 + 0x00000010, 0x00000000, 208 + 0x00000010, 0x00000000, 209 + 0x00000010, 0x00000000, 210 + 0x80000015, 0x0000eea4, 211 + 0x81000015, 0x0000005f, 212 + 0x00000060, 0x00000000, 213 + 0x00004120, 0x00000000, 214 + 0x00004a00, 0x00004000, 215 + 0x00924460, 0x00000190, 216 + 0x5601401a, 0x00005956, 217 + 0x14000011, 0x00000000, 218 + 0x00934050, 0x00000018, 219 + 0x00930050, 0x00000018, 220 + 0x3601403a, 0x0000002d, 221 + 0x000643a9, 0x00000000, 222 + 0x0000c420, 0x00000140, 223 + 0x5601401a, 0x00005956, 224 + 0x14000011, 0x00000000, 225 + 0x00000010, 0x00000000, 226 + 0x00000010, 0x00000000, 227 + 0x000642a9, 0x00000000, 228 + 0x00024420, 0x00000183, 229 + 0x5601401a, 0x00005956, 230 + 0x82000015, 0x00002000, 231 + 0x15200011, 0x00000000, 232 + 0x82000015, 0x00000010, 233 + 0x15200011, 0x00000000, 234 + 0x82000015, 0x00000010, 235 + 0x15200011, 0x00000000, 236 + }; /* 104 Tx instructions */ 237 + #define FIRMWARE_TX_SIZE 104 238 + #if 0 239 + static const u32 firmware_wol[] = { 240 + 0x010003dc, 0x00000000, 241 + 0x19000421, 0x00000087, 242 + 0x80000015, 0x00001a1a, 243 + 0x81000015, 0x00001a1a, 244 + 0x1a0040ab, 0x00000b06, 245 + 0x15200011, 0x00000000, 246 + 0x15204022, 0x0000aaaa, 247 + 0x15204022, 0x00000300, 248 + 0x15204022, 0x00000000, 249 + 0x1a0040ab, 0x00000b15, 250 + 0x15200011, 0x00000000, 251 + 0x83000015, 0x00000002, 252 + 0x04000021, 0x00000000, 253 + 0x00000010, 0x00000000, 254 + 0x04000421, 0x00000087, 255 + 0x00000010, 0x00000000, 256 + 0x00000010, 0x00000000, 257 + 0x00008015, 0x00000000, 258 + 0x0000003e, 0x00000000, 259 + 0x00000010, 0x00000000, 260 + 0x00000010, 0x00000000, 261 + 0x82000015, 0x00004000, 262 + 0x82000015, 0x00008000, 263 + 0x0000000c, 0x00000000, 264 + 0x00000010, 0x00000000, 265 + 0x00004080, 0x00000100, 266 + 0x1f20c011, 0x00001122, 267 + 0x2720f011, 0x00003011, 268 + 0x19200071, 0x00000000, 269 + 0x1a200051, 0x00000000, 270 + 0x00000010, 0x00000000, 271 + 0x00000010, 0x00000000, 272 + 0x1d2040a4, 0x00003344, 273 + 0x1d2040a2, 0x00005566, 274 + 0x000040a0, 0x00000100, 275 + 0x00108050, 0x00000001, 276 + 0x1a208012, 0x00000006, 277 + 0x82000015, 0x00008080, 278 + 0x010003dc, 0x00000000, 279 + 0x1d2040a4, 0x00002233, 280 + 0x1d2040a4, 0x00004455, 281 + 0x2d208011, 0x00000005, 282 + 0x1d2040a4, 0x00006611, 283 + 0x00108050, 0x00000001, 284 + 0x27200011, 0x00000000, 285 + 0x1d2050a4, 0x00006600, 286 + 0x82000015, 0x00008080, 287 + 0x010003dc, 0x00000000, 288 + 0x00000050, 0x00000000, 289 + 0x1b200031, 0x00000000, 290 + 0x0000001e, 0x00000000, 291 + 0x0000001e, 0x00000000, 292 + 0x0000001e, 0x00000000, 293 + 0x0000001e, 0x00000000, 294 + 0x00924460, 0x00000086, 295 + 0x00004080, 0x00000000, 296 + 0x0092c070, 0x00000000, 297 + 0x00924060, 0x00000100, 298 + 0x0000c890, 0x00005000, 299 + 0x00a6c110, 0x00000000, 300 + 0x00b0c090, 0x00000012, 301 + 0x021c0015, 0x00000000, 302 + 0x3200001f, 0x00000034, 303 + 0x00924460, 0x00000510, 304 + 0x44210011, 0x00000000, 305 + 0x42000011, 0x00000000, 306 + 0x83000015, 0x00000040, 307 + 0x00924460, 0x00000508, 308 + 0x476a0012, 0x00000100, 309 + 0x83000015, 0x00000008, 310 + 0x16200011, 0x00000000, 311 + 0x001e8050, 0x00000000, 312 + 0x001e8050, 0x00000000, 313 + 0x00808050, 0x00000000, 314 + 0x03008015, 0x00000000, 315 + 0x62208012, 0x00000000, 316 + 0x82000015, 0x00000800, 317 + 0x16200011, 0x00000000, 318 + 0x80000015, 0x0000eea4, 319 + 0x81000015, 0x0000005f, 320 + 0x00000020, 0x00000000, 321 + 0x00004120, 0x00000000, 322 + 0x00004a00, 0x00004000, 323 + 0x00924460, 0x00000190, 324 + 0x5c01401a, 0x0000595c, 325 + 0x15000011, 0x00000000, 326 + 0x00934050, 0x00000018, 327 + 0x00930050, 0x00000018, 328 + 0x3601403a, 0x0000002d, 329 + 0x00064029, 0x00000000, 330 + 0x0000c420, 0x00000140, 331 + 0x5c01401a, 0x0000595c, 332 + 0x15000011, 0x00000000, 333 + 0x00000010, 0x00000000, 334 + 0x00000010, 0x00000000, 335 + 0x00064029, 0x00000000, 336 + 0x00024420, 0x00000183, 337 + 0x5c01401a, 0x0000595c, 338 + 0x82000015, 0x00002000, 339 + 0x16200011, 0x00000000, 340 + 0x82000015, 0x00000010, 341 + 0x16200011, 0x00000000, 342 + 0x82000015, 0x00000010, 343 + 0x16200011, 0x00000000, 344 + }; /* 104 WoL instructions */ 345 + #define FIRMWARE_WOL_SIZE 104 346 + #endif