Merge branch 'pci/misc' into next · tjh.dev/kernel@fdaf36b

-5

arch/alpha/include/asm/pci.h

··· 59 59 60 60 extern void pcibios_set_master(struct pci_dev *dev); 61 61 62 - extern inline void pcibios_penalize_isa_irq(int irq, int active) 63 - { 64 - /* We don't do dynamic PCI IRQ allocation */ 65 - } 66 - 67 62 /* IOMMU controls. */ 68 63 69 64 /* The PCI address space does not equal the physical memory address space.

-5

arch/arm/include/asm/pci.h

··· 31 31 } 32 32 #endif /* CONFIG_PCI_DOMAINS */ 33 33 34 - static inline void pcibios_penalize_isa_irq(int irq, int active) 35 - { 36 - /* We don't do dynamic PCI IRQ allocation */ 37 - } 38 - 39 34 /* 40 35 * The PCI address space does equal the physical memory address space. 41 36 * The networking and block device layers use this boolean for bounce

-5

arch/blackfin/include/asm/pci.h

··· 10 10 #define PCIBIOS_MIN_IO 0x00001000 11 11 #define PCIBIOS_MIN_MEM 0x10000000 12 12 13 - static inline void pcibios_penalize_isa_irq(int irq) 14 - { 15 - /* We don't do dynamic PCI IRQ allocation */ 16 - } 17 - 18 13 #endif /* _ASM_BFIN_PCI_H */

-1

arch/cris/include/asm/pci.h

··· 20 20 struct pci_bus * pcibios_scan_root(int bus); 21 21 22 22 void pcibios_set_master(struct pci_dev *dev); 23 - void pcibios_penalize_isa_irq(int irq); 24 23 struct irq_routing_table *pcibios_get_irq_routing_table(void); 25 24 int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq); 26 25

-2

arch/frv/include/asm/pci.h

··· 24 24 25 25 extern void pcibios_set_master(struct pci_dev *dev); 26 26 27 - extern void pcibios_penalize_isa_irq(int irq); 28 - 29 27 #ifdef CONFIG_MMU 30 28 extern void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle); 31 29 extern void consistent_free(void *vaddr);

-4

arch/frv/mb93090-mb00/pci-irq.c

··· 55 55 } 56 56 } 57 57 58 - void __init pcibios_penalize_isa_irq(int irq) 59 - { 60 - } 61 - 62 58 void pcibios_enable_irq(struct pci_dev *dev) 63 59 { 64 60 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);

-6

arch/ia64/include/asm/pci.h

··· 50 50 extern unsigned long ia64_max_iommu_merge_mask; 51 51 #define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL) 52 52 53 - static inline void 54 - pcibios_penalize_isa_irq (int irq, int active) 55 - { 56 - /* We don't do dynamic PCI IRQ allocation */ 57 - } 58 - 59 53 #include <asm-generic/pci-dma-compat.h> 60 54 61 55 #ifdef CONFIG_PCI

-5

arch/microblaze/include/asm/pci.h

··· 44 44 */ 45 45 #define pcibios_assign_all_busses() 0 46 46 47 - static inline void pcibios_penalize_isa_irq(int irq, int active) 48 - { 49 - /* We don't do dynamic PCI IRQ allocation */ 50 - } 51 - 52 47 #ifdef CONFIG_PCI 53 48 extern void set_pci_dma_ops(struct dma_map_ops *dma_ops); 54 49 extern struct dma_map_ops *get_pci_dma_ops(void);

-5

arch/mips/include/asm/pci.h

··· 73 73 74 74 extern void pcibios_set_master(struct pci_dev *dev); 75 75 76 - static inline void pcibios_penalize_isa_irq(int irq, int active) 77 - { 78 - /* We don't do dynamic PCI IRQ allocation */ 79 - } 80 - 81 76 #define HAVE_PCI_MMAP 82 77 83 78 extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,

-1

arch/mn10300/include/asm/pci.h

··· 48 48 #define PCIBIOS_MIN_MEM 0xB8000000 49 49 50 50 void pcibios_set_master(struct pci_dev *dev); 51 - void pcibios_penalize_isa_irq(int irq); 52 51 53 52 /* Dynamic DMA mapping stuff. 54 53 * i386 has everything mapped statically.

-4

arch/mn10300/unit-asb2305/pci-irq.c

··· 40 40 } 41 41 } 42 42 43 - void __init pcibios_penalize_isa_irq(int irq) 44 - { 45 - } 46 - 47 43 void pcibios_enable_irq(struct pci_dev *dev) 48 44 { 49 45 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);

-5

arch/parisc/include/asm/pci.h

··· 215 215 } 216 216 #endif 217 217 218 - static inline void pcibios_penalize_isa_irq(int irq, int active) 219 - { 220 - /* We don't need to penalize isa irq's */ 221 - } 222 - 223 218 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 224 219 { 225 220 return channel ? 15 : 14;

-5

arch/powerpc/include/asm/pci.h

··· 46 46 #define pcibios_assign_all_busses() \ 47 47 (pci_has_flag(PCI_REASSIGN_ALL_BUS)) 48 48 49 - static inline void pcibios_penalize_isa_irq(int irq, int active) 50 - { 51 - /* We don't do dynamic PCI IRQ allocation */ 52 - } 53 - 54 49 #define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ 55 50 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 56 51 {

-5

arch/sh/include/asm/pci.h

··· 70 70 enum pci_mmap_state mmap_state, int write_combine); 71 71 extern void pcibios_set_master(struct pci_dev *dev); 72 72 73 - static inline void pcibios_penalize_isa_irq(int irq, int active) 74 - { 75 - /* We don't do dynamic PCI IRQ allocation */ 76 - } 77 - 78 73 /* Dynamic DMA mapping stuff. 79 74 * SuperH has everything mapped statically like x86. 80 75 */

-5

arch/sparc/include/asm/pci_32.h

··· 16 16 17 17 #define PCI_IRQ_NONE 0xffffffff 18 18 19 - static inline void pcibios_penalize_isa_irq(int irq, int active) 20 - { 21 - /* We don't do dynamic PCI IRQ allocation */ 22 - } 23 - 24 19 /* Dynamic DMA mapping stuff. 25 20 */ 26 21 #define PCI_DMA_BUS_IS_PHYS (0)

-5

arch/sparc/include/asm/pci_64.h

··· 16 16 17 17 #define PCI_IRQ_NONE 0xffffffff 18 18 19 - static inline void pcibios_penalize_isa_irq(int irq, int active) 20 - { 21 - /* We don't do dynamic PCI IRQ allocation */ 22 - } 23 - 24 19 /* The PCI address space does not equal the physical memory 25 20 * address space. The networking and block device layers use 26 21 * this boolean for bounce buffer decisions.

-5

arch/unicore32/include/asm/pci.h

··· 18 18 #include <asm-generic/pci.h> 19 19 #include <mach/hardware.h> /* for PCIBIOS_MIN_* */ 20 20 21 - static inline void pcibios_penalize_isa_irq(int irq, int active) 22 - { 23 - /* We don't do dynamic PCI IRQ allocation */ 24 - } 25 - 26 21 #ifdef CONFIG_PCI 27 22 static inline void pci_dma_burst_advice(struct pci_dev *pdev, 28 23 enum pci_dma_burst_strategy *strat,

-1

arch/x86/include/asm/pci.h

··· 68 68 void pcibios_scan_root(int bus); 69 69 70 70 void pcibios_set_master(struct pci_dev *dev); 71 - void pcibios_penalize_isa_irq(int irq, int active); 72 71 struct irq_routing_table *pcibios_get_irq_routing_table(void); 73 72 int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq); 74 73

-5

arch/xtensa/include/asm/pci.h

··· 22 22 23 23 extern struct pci_controller* pcibios_alloc_controller(void); 24 24 25 - static inline void pcibios_penalize_isa_irq(int irq) 26 - { 27 - /* We don't do dynamic PCI IRQ allocation */ 28 - } 29 - 30 25 /* Assume some values. (We should revise them, if necessary) */ 31 26 32 27 #define PCIBIOS_MIN_IO 0x2000

+4 -8

drivers/pci/access.c

··· 148 148 int pci_user_read_config_##size \ 149 149 (struct pci_dev *dev, int pos, type *val) \ 150 150 { \ 151 - int ret = 0; \ 151 + int ret = PCIBIOS_SUCCESSFUL; \ 152 152 u32 data = -1; \ 153 153 if (PCI_##size##_BAD) \ 154 154 return -EINVAL; \ ··· 159 159 pos, sizeof(type), &data); \ 160 160 raw_spin_unlock_irq(&pci_lock); \ 161 161 *val = (type)data; \ 162 - if (ret > 0) \ 163 - ret = -EINVAL; \ 164 - return ret; \ 162 + return pcibios_err_to_errno(ret); \ 165 163 } \ 166 164 EXPORT_SYMBOL_GPL(pci_user_read_config_##size); 167 165 ··· 168 170 int pci_user_write_config_##size \ 169 171 (struct pci_dev *dev, int pos, type val) \ 170 172 { \ 171 - int ret = -EIO; \ 173 + int ret = PCIBIOS_SUCCESSFUL; \ 172 174 if (PCI_##size##_BAD) \ 173 175 return -EINVAL; \ 174 176 raw_spin_lock_irq(&pci_lock); \ ··· 177 179 ret = dev->bus->ops->write(dev->bus, dev->devfn, \ 178 180 pos, sizeof(type), val); \ 179 181 raw_spin_unlock_irq(&pci_lock); \ 180 - if (ret > 0) \ 181 - ret = -EINVAL; \ 182 - return ret; \ 182 + return pcibios_err_to_errno(ret); \ 183 183 } \ 184 184 EXPORT_SYMBOL_GPL(pci_user_write_config_##size); 185 185

+11

drivers/pci/pci.c

··· 1468 1468 */ 1469 1469 void __weak pcibios_disable_device (struct pci_dev *dev) {} 1470 1470 1471 + /** 1472 + * pcibios_penalize_isa_irq - penalize an ISA IRQ 1473 + * @irq: ISA IRQ to penalize 1474 + * @active: IRQ active or not 1475 + * 1476 + * Permits the platform to provide architecture-specific functionality when 1477 + * penalizing ISA IRQs. This is the default implementation. Architecture 1478 + * implementations can override this. 1479 + */ 1480 + void __weak pcibios_penalize_isa_irq(int irq, int active) {} 1481 + 1471 1482 static void do_pci_disable_device(struct pci_dev *dev) 1472 1483 { 1473 1484 u16 pci_command;

+38 -1

drivers/pci/probe.c

··· 994 994 995 995 996 996 /** 997 + * pci_ext_cfg_is_aliased - is ext config space just an alias of std config? 998 + * @dev: PCI device 999 + * 1000 + * PCI Express to PCI/PCI-X Bridge Specification, rev 1.0, 4.1.4 says that 1001 + * when forwarding a type1 configuration request the bridge must check that 1002 + * the extended register address field is zero. The bridge is not permitted 1003 + * to forward the transactions and must handle it as an Unsupported Request. 1004 + * Some bridges do not follow this rule and simply drop the extended register 1005 + * bits, resulting in the standard config space being aliased, every 256 1006 + * bytes across the entire configuration space. Test for this condition by 1007 + * comparing the first dword of each potential alias to the vendor/device ID. 1008 + * Known offenders: 1009 + * ASM1083/1085 PCIe-to-PCI Reversible Bridge (1b21:1080, rev 01 & 03) 1010 + * AMD/ATI SBx00 PCI to PCI Bridge (1002:4384, rev 40) 1011 + */ 1012 + static bool pci_ext_cfg_is_aliased(struct pci_dev *dev) 1013 + { 1014 + #ifdef CONFIG_PCI_QUIRKS 1015 + int pos; 1016 + u32 header, tmp; 1017 + 1018 + pci_read_config_dword(dev, PCI_VENDOR_ID, &header); 1019 + 1020 + for (pos = PCI_CFG_SPACE_SIZE; 1021 + pos < PCI_CFG_SPACE_EXP_SIZE; pos += PCI_CFG_SPACE_SIZE) { 1022 + if (pci_read_config_dword(dev, pos, &tmp) != PCIBIOS_SUCCESSFUL 1023 + || header != tmp) 1024 + return false; 1025 + } 1026 + 1027 + return true; 1028 + #else 1029 + return false; 1030 + #endif 1031 + } 1032 + 1033 + /** 997 1034 * pci_cfg_space_size - get the configuration space size of the PCI device. 998 1035 * @dev: PCI device 999 1036 * ··· 1048 1011 1049 1012 if (pci_read_config_dword(dev, pos, &status) != PCIBIOS_SUCCESSFUL) 1050 1013 goto fail; 1051 - if (status == 0xffffffff) 1014 + if (status == 0xffffffff || pci_ext_cfg_is_aliased(dev)) 1052 1015 goto fail; 1053 1016 1054 1017 return PCI_CFG_SPACE_EXP_SIZE;

+3 -2

include/linux/pci.h

··· 532 532 case PCIBIOS_FUNC_NOT_SUPPORTED: 533 533 return -ENOENT; 534 534 case PCIBIOS_BAD_VENDOR_ID: 535 - return -EINVAL; 535 + return -ENOTTY; 536 536 case PCIBIOS_DEVICE_NOT_FOUND: 537 537 return -ENODEV; 538 538 case PCIBIOS_BAD_REGISTER_NUMBER: ··· 543 543 return -ENOSPC; 544 544 } 545 545 546 - return -ENOTTY; 546 + return -ERANGE; 547 547 } 548 548 549 549 /* Low-level architecture-dependent routines */ ··· 1592 1592 enum pcie_reset_state state); 1593 1593 int pcibios_add_device(struct pci_dev *dev); 1594 1594 void pcibios_release_device(struct pci_dev *dev); 1595 + void pcibios_penalize_isa_irq(int irq, int active); 1595 1596 1596 1597 #ifdef CONFIG_HIBERNATE_CALLBACKS 1597 1598 extern struct dev_pm_ops pcibios_pm_ops;