Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amdgpu: cleanup dce_virtual

Remove obsolete functions and variables from dce_virtual.

Signed-off-by: Ryan Taylor <Ryan.Taylor@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Ryan Taylor and committed by
Alex Deucher
fd922f7a 84ec374b

+3 -565
+3 -565
drivers/gpu/drm/amd/amdgpu/dce_virtual.c
··· 21 21 * 22 22 */ 23 23 24 - #include <drm/drm_vblank.h> 25 24 #include <drm/drm_atomic_helper.h> 26 25 27 26 #include "amdgpu.h" 28 - #include "amdgpu_pm.h" 29 - #include "amdgpu_i2c.h" 30 - #include "atom.h" 31 - #include "amdgpu_pll.h" 32 - #include "amdgpu_connectors.h" 33 27 #ifdef CONFIG_DRM_AMDGPU_SI 34 28 #include "dce_v6_0.h" 35 29 #endif ··· 37 43 #include "amdgpu_display.h" 38 44 #include "amdgpu_vkms.h" 39 45 40 - #define DCE_VIRTUAL_VBLANK_PERIOD 16666666 41 - 42 - 43 - static void dce_virtual_set_display_funcs(struct amdgpu_device *adev); 44 - static void dce_virtual_set_irq_funcs(struct amdgpu_device *adev); 45 - static int dce_virtual_connector_encoder_init(struct amdgpu_device *adev, 46 - int index); 47 - static int dce_virtual_pageflip(struct amdgpu_device *adev, 48 - unsigned crtc_id); 49 - static enum hrtimer_restart dce_virtual_vblank_timer_handle(struct hrtimer *vblank_timer); 50 - static void dce_virtual_set_crtc_vblank_interrupt_state(struct amdgpu_device *adev, 51 - int crtc, 52 - enum amdgpu_interrupt_state state); 53 - 54 - static u32 dce_virtual_vblank_get_counter(struct amdgpu_device *adev, int crtc) 55 - { 56 - return 0; 57 - } 58 - 59 - static void dce_virtual_page_flip(struct amdgpu_device *adev, 60 - int crtc_id, u64 crtc_base, bool async) 61 - { 62 - return; 63 - } 64 - 65 - static int dce_virtual_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, 66 - u32 *vbl, u32 *position) 67 - { 68 - *vbl = 0; 69 - *position = 0; 70 - 71 - return -EINVAL; 72 - } 73 - 74 - static bool dce_virtual_hpd_sense(struct amdgpu_device *adev, 75 - enum amdgpu_hpd_id hpd) 76 - { 77 - return true; 78 - } 79 - 80 - static void dce_virtual_hpd_set_polarity(struct amdgpu_device *adev, 81 - enum amdgpu_hpd_id hpd) 82 - { 83 - return; 84 - } 85 - 86 - static u32 dce_virtual_hpd_get_gpio_reg(struct amdgpu_device *adev) 87 - { 88 - return 0; 89 - } 90 - 91 - /** 92 - * dce_virtual_bandwidth_update - program display watermarks 93 - * 94 - * @adev: amdgpu_device pointer 95 - * 96 - * Calculate and program the display watermarks and line 97 - * buffer allocation (CIK). 98 - */ 99 - static void dce_virtual_bandwidth_update(struct amdgpu_device *adev) 100 - { 101 - return; 102 - } 103 - 104 - static int dce_virtual_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, 105 - u16 *green, u16 *blue, uint32_t size, 106 - struct drm_modeset_acquire_ctx *ctx) 107 - { 108 - return 0; 109 - } 110 - 111 - static void dce_virtual_crtc_destroy(struct drm_crtc *crtc) 112 - { 113 - struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); 114 - 115 - drm_crtc_cleanup(crtc); 116 - kfree(amdgpu_crtc); 117 - } 118 - 119 - static const struct drm_crtc_funcs dce_virtual_crtc_funcs = { 120 - .cursor_set2 = NULL, 121 - .cursor_move = NULL, 122 - .gamma_set = dce_virtual_crtc_gamma_set, 123 - .set_config = amdgpu_display_crtc_set_config, 124 - .destroy = dce_virtual_crtc_destroy, 125 - .page_flip_target = amdgpu_display_crtc_page_flip_target, 126 - .get_vblank_counter = amdgpu_get_vblank_counter_kms, 127 - .enable_vblank = amdgpu_enable_vblank_kms, 128 - .disable_vblank = amdgpu_disable_vblank_kms, 129 - .get_vblank_timestamp = drm_crtc_vblank_helper_get_vblank_timestamp, 130 - }; 131 - 132 - static void dce_virtual_crtc_dpms(struct drm_crtc *crtc, int mode) 133 - { 134 - struct drm_device *dev = crtc->dev; 135 - struct amdgpu_device *adev = drm_to_adev(dev); 136 - struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); 137 - unsigned type; 138 - 139 - switch (mode) { 140 - case DRM_MODE_DPMS_ON: 141 - amdgpu_crtc->enabled = true; 142 - /* Make sure VBLANK interrupts are still enabled */ 143 - type = amdgpu_display_crtc_idx_to_irq_type(adev, 144 - amdgpu_crtc->crtc_id); 145 - amdgpu_irq_update(adev, &adev->crtc_irq, type); 146 - drm_crtc_vblank_on(crtc); 147 - break; 148 - case DRM_MODE_DPMS_STANDBY: 149 - case DRM_MODE_DPMS_SUSPEND: 150 - case DRM_MODE_DPMS_OFF: 151 - drm_crtc_vblank_off(crtc); 152 - amdgpu_crtc->enabled = false; 153 - break; 154 - } 155 - } 156 - 157 - 158 - static void dce_virtual_crtc_prepare(struct drm_crtc *crtc) 159 - { 160 - dce_virtual_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); 161 - } 162 - 163 - static void dce_virtual_crtc_commit(struct drm_crtc *crtc) 164 - { 165 - dce_virtual_crtc_dpms(crtc, DRM_MODE_DPMS_ON); 166 - } 167 - 168 - static void dce_virtual_crtc_disable(struct drm_crtc *crtc) 169 - { 170 - struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); 171 - struct drm_device *dev = crtc->dev; 172 - 173 - if (dev->num_crtcs) 174 - drm_crtc_vblank_off(crtc); 175 - 176 - amdgpu_crtc->enabled = false; 177 - amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; 178 - amdgpu_crtc->encoder = NULL; 179 - amdgpu_crtc->connector = NULL; 180 - } 181 - 182 - static int dce_virtual_crtc_mode_set(struct drm_crtc *crtc, 183 - struct drm_display_mode *mode, 184 - struct drm_display_mode *adjusted_mode, 185 - int x, int y, struct drm_framebuffer *old_fb) 186 - { 187 - struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); 188 - 189 - /* update the hw version fpr dpm */ 190 - amdgpu_crtc->hw_mode = *adjusted_mode; 191 - 192 - return 0; 193 - } 194 - 195 - static bool dce_virtual_crtc_mode_fixup(struct drm_crtc *crtc, 196 - const struct drm_display_mode *mode, 197 - struct drm_display_mode *adjusted_mode) 198 - { 199 - return true; 200 - } 201 - 202 - 203 - static int dce_virtual_crtc_set_base(struct drm_crtc *crtc, int x, int y, 204 - struct drm_framebuffer *old_fb) 205 - { 206 - return 0; 207 - } 208 - 209 - static int dce_virtual_crtc_set_base_atomic(struct drm_crtc *crtc, 210 - struct drm_framebuffer *fb, 211 - int x, int y, enum mode_set_atomic state) 212 - { 213 - return 0; 214 - } 215 - 216 - static const struct drm_crtc_helper_funcs dce_virtual_crtc_helper_funcs = { 217 - .dpms = dce_virtual_crtc_dpms, 218 - .mode_fixup = dce_virtual_crtc_mode_fixup, 219 - .mode_set = dce_virtual_crtc_mode_set, 220 - .mode_set_base = dce_virtual_crtc_set_base, 221 - .mode_set_base_atomic = dce_virtual_crtc_set_base_atomic, 222 - .prepare = dce_virtual_crtc_prepare, 223 - .commit = dce_virtual_crtc_commit, 224 - .disable = dce_virtual_crtc_disable, 225 - .get_scanout_position = amdgpu_crtc_get_scanout_position, 226 - }; 227 - 228 - static int dce_virtual_crtc_init(struct amdgpu_device *adev, int index) 229 - { 230 - struct amdgpu_crtc *amdgpu_crtc; 231 - 232 - amdgpu_crtc = kzalloc(sizeof(struct amdgpu_crtc) + 233 - (AMDGPUFB_CONN_LIMIT * sizeof(struct drm_connector *)), GFP_KERNEL); 234 - if (amdgpu_crtc == NULL) 235 - return -ENOMEM; 236 - 237 - drm_crtc_init(adev_to_drm(adev), &amdgpu_crtc->base, &dce_virtual_crtc_funcs); 238 - 239 - drm_mode_crtc_set_gamma_size(&amdgpu_crtc->base, 256); 240 - amdgpu_crtc->crtc_id = index; 241 - adev->mode_info.crtcs[index] = amdgpu_crtc; 242 - 243 - amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; 244 - amdgpu_crtc->encoder = NULL; 245 - amdgpu_crtc->connector = NULL; 246 - amdgpu_crtc->vsync_timer_enabled = AMDGPU_IRQ_STATE_DISABLE; 247 - drm_crtc_helper_add(&amdgpu_crtc->base, &dce_virtual_crtc_helper_funcs); 248 - 249 - hrtimer_init(&amdgpu_crtc->vblank_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); 250 - hrtimer_set_expires(&amdgpu_crtc->vblank_timer, DCE_VIRTUAL_VBLANK_PERIOD); 251 - amdgpu_crtc->vblank_timer.function = dce_virtual_vblank_timer_handle; 252 - hrtimer_start(&amdgpu_crtc->vblank_timer, 253 - DCE_VIRTUAL_VBLANK_PERIOD, HRTIMER_MODE_REL); 254 - return 0; 255 - } 256 - 257 - static int dce_virtual_early_init(void *handle) 258 - { 259 - struct amdgpu_device *adev = (struct amdgpu_device *)handle; 260 - 261 - dce_virtual_set_display_funcs(adev); 262 - dce_virtual_set_irq_funcs(adev); 263 - 264 - adev->mode_info.num_hpd = 1; 265 - adev->mode_info.num_dig = 1; 266 - return 0; 267 - } 268 - 269 - static struct drm_encoder * 270 - dce_virtual_encoder(struct drm_connector *connector) 271 - { 272 - struct drm_encoder *encoder; 273 - 274 - drm_connector_for_each_possible_encoder(connector, encoder) { 275 - if (encoder->encoder_type == DRM_MODE_ENCODER_VIRTUAL) 276 - return encoder; 277 - } 278 - 279 - /* pick the first one */ 280 - drm_connector_for_each_possible_encoder(connector, encoder) 281 - return encoder; 282 - 283 - return NULL; 284 - } 285 - 286 - static int dce_virtual_get_modes(struct drm_connector *connector) 287 - { 288 - struct drm_device *dev = connector->dev; 289 - struct drm_display_mode *mode = NULL; 290 - unsigned i; 291 - static const struct mode_size { 292 - int w; 293 - int h; 294 - } common_modes[] = { 295 - { 640, 480}, 296 - { 720, 480}, 297 - { 800, 600}, 298 - { 848, 480}, 299 - {1024, 768}, 300 - {1152, 768}, 301 - {1280, 720}, 302 - {1280, 800}, 303 - {1280, 854}, 304 - {1280, 960}, 305 - {1280, 1024}, 306 - {1440, 900}, 307 - {1400, 1050}, 308 - {1680, 1050}, 309 - {1600, 1200}, 310 - {1920, 1080}, 311 - {1920, 1200}, 312 - {2560, 1440}, 313 - {4096, 3112}, 314 - {3656, 2664}, 315 - {3840, 2160}, 316 - {4096, 2160}, 317 - }; 318 - 319 - for (i = 0; i < ARRAY_SIZE(common_modes); i++) { 320 - mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false); 321 - drm_mode_probed_add(connector, mode); 322 - } 323 - 324 - return 0; 325 - } 326 - 327 - static enum drm_mode_status dce_virtual_mode_valid(struct drm_connector *connector, 328 - struct drm_display_mode *mode) 329 - { 330 - return MODE_OK; 331 - } 332 - 333 - static int 334 - dce_virtual_dpms(struct drm_connector *connector, int mode) 335 - { 336 - return 0; 337 - } 338 - 339 - static int 340 - dce_virtual_set_property(struct drm_connector *connector, 341 - struct drm_property *property, 342 - uint64_t val) 343 - { 344 - return 0; 345 - } 346 - 347 - static void dce_virtual_destroy(struct drm_connector *connector) 348 - { 349 - drm_connector_unregister(connector); 350 - drm_connector_cleanup(connector); 351 - kfree(connector); 352 - } 353 - 354 - static void dce_virtual_force(struct drm_connector *connector) 355 - { 356 - return; 357 - } 358 - 359 - static const struct drm_connector_helper_funcs dce_virtual_connector_helper_funcs = { 360 - .get_modes = dce_virtual_get_modes, 361 - .mode_valid = dce_virtual_mode_valid, 362 - .best_encoder = dce_virtual_encoder, 363 - }; 364 - 365 - static const struct drm_connector_funcs dce_virtual_connector_funcs = { 366 - .dpms = dce_virtual_dpms, 367 - .fill_modes = drm_helper_probe_single_connector_modes, 368 - .set_property = dce_virtual_set_property, 369 - .destroy = dce_virtual_destroy, 370 - .force = dce_virtual_force, 371 - }; 372 - 373 46 const struct drm_mode_config_funcs dce_virtual_mode_funcs = { 374 47 .fb_create = amdgpu_display_user_framebuffer_create, 375 48 .atomic_check = drm_atomic_helper_check, ··· 47 386 { 48 387 int r, i; 49 388 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 50 - 51 - r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SMU_DISP_TIMER2_TRIGGER, &adev->crtc_irq); 52 - if (r) 53 - return r; 54 389 55 390 adev_to_drm(adev)->max_vblank_count = 0; 56 391 ··· 93 436 94 437 drm_kms_helper_poll_fini(adev_to_drm(adev)); 95 438 96 - drm_mode_config_cleanup(adev_to_drm(adev)); 97 - /* clear crtcs pointer to avoid dce irq finish routine access freed data */ 98 - memset(adev->mode_info.crtcs, 0, sizeof(adev->mode_info.crtcs[0]) * AMDGPU_MAX_CRTCS); 99 439 adev->mode_info.mode_config_initialized = false; 100 440 return 0; 101 441 } ··· 152 498 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 153 499 int r; 154 500 155 - r = amdgpu_display_suspend_helper(adev); 501 + r = drm_mode_config_helper_suspend(adev_to_drm(adev)); 156 502 if (r) 157 503 return r; 158 504 return dce_virtual_hw_fini(handle); ··· 166 512 r = dce_virtual_hw_init(handle); 167 513 if (r) 168 514 return r; 169 - return amdgpu_display_resume_helper(adev); 515 + return drm_mode_config_helper_resume(adev_to_drm(adev)); 170 516 } 171 517 172 518 static bool dce_virtual_is_idle(void *handle) ··· 198 544 199 545 static const struct amd_ip_funcs dce_virtual_ip_funcs = { 200 546 .name = "dce_virtual", 201 - .early_init = dce_virtual_early_init, 547 + .early_init = NULL, 202 548 .late_init = NULL, 203 549 .sw_init = dce_virtual_sw_init, 204 550 .sw_fini = dce_virtual_sw_fini, ··· 212 558 .set_clockgating_state = dce_virtual_set_clockgating_state, 213 559 .set_powergating_state = dce_virtual_set_powergating_state, 214 560 }; 215 - 216 - /* these are handled by the primary encoders */ 217 - static void dce_virtual_encoder_prepare(struct drm_encoder *encoder) 218 - { 219 - return; 220 - } 221 - 222 - static void dce_virtual_encoder_commit(struct drm_encoder *encoder) 223 - { 224 - return; 225 - } 226 - 227 - static void 228 - dce_virtual_encoder_mode_set(struct drm_encoder *encoder, 229 - struct drm_display_mode *mode, 230 - struct drm_display_mode *adjusted_mode) 231 - { 232 - return; 233 - } 234 - 235 - static void dce_virtual_encoder_disable(struct drm_encoder *encoder) 236 - { 237 - return; 238 - } 239 - 240 - static void 241 - dce_virtual_encoder_dpms(struct drm_encoder *encoder, int mode) 242 - { 243 - return; 244 - } 245 - 246 - static bool dce_virtual_encoder_mode_fixup(struct drm_encoder *encoder, 247 - const struct drm_display_mode *mode, 248 - struct drm_display_mode *adjusted_mode) 249 - { 250 - return true; 251 - } 252 - 253 - static const struct drm_encoder_helper_funcs dce_virtual_encoder_helper_funcs = { 254 - .dpms = dce_virtual_encoder_dpms, 255 - .mode_fixup = dce_virtual_encoder_mode_fixup, 256 - .prepare = dce_virtual_encoder_prepare, 257 - .mode_set = dce_virtual_encoder_mode_set, 258 - .commit = dce_virtual_encoder_commit, 259 - .disable = dce_virtual_encoder_disable, 260 - }; 261 - 262 - static void dce_virtual_encoder_destroy(struct drm_encoder *encoder) 263 - { 264 - drm_encoder_cleanup(encoder); 265 - kfree(encoder); 266 - } 267 - 268 - static const struct drm_encoder_funcs dce_virtual_encoder_funcs = { 269 - .destroy = dce_virtual_encoder_destroy, 270 - }; 271 - 272 - static int dce_virtual_connector_encoder_init(struct amdgpu_device *adev, 273 - int index) 274 - { 275 - struct drm_encoder *encoder; 276 - struct drm_connector *connector; 277 - 278 - /* add a new encoder */ 279 - encoder = kzalloc(sizeof(struct drm_encoder), GFP_KERNEL); 280 - if (!encoder) 281 - return -ENOMEM; 282 - encoder->possible_crtcs = 1 << index; 283 - drm_encoder_init(adev_to_drm(adev), encoder, &dce_virtual_encoder_funcs, 284 - DRM_MODE_ENCODER_VIRTUAL, NULL); 285 - drm_encoder_helper_add(encoder, &dce_virtual_encoder_helper_funcs); 286 - 287 - connector = kzalloc(sizeof(struct drm_connector), GFP_KERNEL); 288 - if (!connector) { 289 - kfree(encoder); 290 - return -ENOMEM; 291 - } 292 - 293 - /* add a new connector */ 294 - drm_connector_init(adev_to_drm(adev), connector, &dce_virtual_connector_funcs, 295 - DRM_MODE_CONNECTOR_VIRTUAL); 296 - drm_connector_helper_add(connector, &dce_virtual_connector_helper_funcs); 297 - connector->display_info.subpixel_order = SubPixelHorizontalRGB; 298 - connector->interlace_allowed = false; 299 - connector->doublescan_allowed = false; 300 - 301 - /* link them */ 302 - drm_connector_attach_encoder(connector, encoder); 303 - 304 - return 0; 305 - } 306 - 307 - static const struct amdgpu_display_funcs dce_virtual_display_funcs = { 308 - .bandwidth_update = &dce_virtual_bandwidth_update, 309 - .vblank_get_counter = &dce_virtual_vblank_get_counter, 310 - .backlight_set_level = NULL, 311 - .backlight_get_level = NULL, 312 - .hpd_sense = &dce_virtual_hpd_sense, 313 - .hpd_set_polarity = &dce_virtual_hpd_set_polarity, 314 - .hpd_get_gpio_reg = &dce_virtual_hpd_get_gpio_reg, 315 - .page_flip = &dce_virtual_page_flip, 316 - .page_flip_get_scanoutpos = &dce_virtual_crtc_get_scanoutpos, 317 - .add_encoder = NULL, 318 - .add_connector = NULL, 319 - }; 320 - 321 - static void dce_virtual_set_display_funcs(struct amdgpu_device *adev) 322 - { 323 - adev->mode_info.funcs = &dce_virtual_display_funcs; 324 - } 325 - 326 - static int dce_virtual_pageflip(struct amdgpu_device *adev, 327 - unsigned crtc_id) 328 - { 329 - unsigned long flags; 330 - struct amdgpu_crtc *amdgpu_crtc; 331 - struct amdgpu_flip_work *works; 332 - 333 - amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; 334 - 335 - if (crtc_id >= adev->mode_info.num_crtc) { 336 - DRM_ERROR("invalid pageflip crtc %d\n", crtc_id); 337 - return -EINVAL; 338 - } 339 - 340 - /* IRQ could occur when in initial stage */ 341 - if (amdgpu_crtc == NULL) 342 - return 0; 343 - 344 - spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags); 345 - works = amdgpu_crtc->pflip_works; 346 - if (amdgpu_crtc->pflip_status != AMDGPU_FLIP_SUBMITTED) { 347 - DRM_DEBUG_DRIVER("amdgpu_crtc->pflip_status = %d != " 348 - "AMDGPU_FLIP_SUBMITTED(%d)\n", 349 - amdgpu_crtc->pflip_status, 350 - AMDGPU_FLIP_SUBMITTED); 351 - spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags); 352 - return 0; 353 - } 354 - 355 - /* page flip completed. clean up */ 356 - amdgpu_crtc->pflip_status = AMDGPU_FLIP_NONE; 357 - amdgpu_crtc->pflip_works = NULL; 358 - 359 - /* wakeup usersapce */ 360 - if (works->event) 361 - drm_crtc_send_vblank_event(&amdgpu_crtc->base, works->event); 362 - 363 - spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags); 364 - 365 - drm_crtc_vblank_put(&amdgpu_crtc->base); 366 - amdgpu_bo_unref(&works->old_abo); 367 - kfree(works->shared); 368 - kfree(works); 369 - 370 - return 0; 371 - } 372 - 373 - static enum hrtimer_restart dce_virtual_vblank_timer_handle(struct hrtimer *vblank_timer) 374 - { 375 - struct amdgpu_crtc *amdgpu_crtc = container_of(vblank_timer, 376 - struct amdgpu_crtc, vblank_timer); 377 - struct drm_device *ddev = amdgpu_crtc->base.dev; 378 - struct amdgpu_device *adev = drm_to_adev(ddev); 379 - struct amdgpu_irq_src *source = adev->irq.client[AMDGPU_IRQ_CLIENTID_LEGACY].sources 380 - [VISLANDS30_IV_SRCID_SMU_DISP_TIMER2_TRIGGER]; 381 - int irq_type = amdgpu_display_crtc_idx_to_irq_type(adev, 382 - amdgpu_crtc->crtc_id); 383 - 384 - if (amdgpu_irq_enabled(adev, source, irq_type)) { 385 - drm_handle_vblank(ddev, amdgpu_crtc->crtc_id); 386 - dce_virtual_pageflip(adev, amdgpu_crtc->crtc_id); 387 - } 388 - hrtimer_start(vblank_timer, DCE_VIRTUAL_VBLANK_PERIOD, 389 - HRTIMER_MODE_REL); 390 - 391 - return HRTIMER_NORESTART; 392 - } 393 - 394 - static void dce_virtual_set_crtc_vblank_interrupt_state(struct amdgpu_device *adev, 395 - int crtc, 396 - enum amdgpu_interrupt_state state) 397 - { 398 - if (crtc >= adev->mode_info.num_crtc || !adev->mode_info.crtcs[crtc]) { 399 - DRM_DEBUG("invalid crtc %d\n", crtc); 400 - return; 401 - } 402 - 403 - adev->mode_info.crtcs[crtc]->vsync_timer_enabled = state; 404 - DRM_DEBUG("[FM]set crtc %d vblank interrupt state %d\n", crtc, state); 405 - } 406 - 407 - 408 - static int dce_virtual_set_crtc_irq_state(struct amdgpu_device *adev, 409 - struct amdgpu_irq_src *source, 410 - unsigned type, 411 - enum amdgpu_interrupt_state state) 412 - { 413 - if (type > AMDGPU_CRTC_IRQ_VBLANK6) 414 - return -EINVAL; 415 - 416 - dce_virtual_set_crtc_vblank_interrupt_state(adev, type, state); 417 - 418 - return 0; 419 - } 420 - 421 - static const struct amdgpu_irq_src_funcs dce_virtual_crtc_irq_funcs = { 422 - .set = dce_virtual_set_crtc_irq_state, 423 - .process = NULL, 424 - }; 425 - 426 - static void dce_virtual_set_irq_funcs(struct amdgpu_device *adev) 427 - { 428 - adev->crtc_irq.num_types = adev->mode_info.num_crtc; 429 - adev->crtc_irq.funcs = &dce_virtual_crtc_irq_funcs; 430 - } 431 561 432 562 const struct amdgpu_ip_block_version dce_virtual_ip_block = 433 563 {