[ARM] 3434/1: pxa i2s amsl define

Patch from Marc-Andre Hebert

The error concerns a bit mask define for the AMSL bit of the SACR1 register in the 2.6 kernel tree. The AMSL is bit 0 and it was defined as so in the 2.4 kernel tree but it is inccorrectly set as bit 1 (a reserved bit) in the 2.6 kernel tree.

Signed-off-by: Marc-Andre Hebert <marcandreh@humanware.ca>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by Marc-Andre Hebert and committed by Russell King fd88dd74 b48340af

+1 -1
+1 -1
include/asm-arm/arch-pxa/pxa-regs.h
··· 485 485 #define SACR1_ENLBF (1 << 5) /* Enable Loopback */ 486 486 #define SACR1_DRPL (1 << 4) /* Disable Replaying Function */ 487 487 #define SACR1_DREC (1 << 3) /* Disable Recording Function */ 488 - #define SACR1_AMSL (1 << 1) /* Specify Alternate Mode */ 488 + #define SACR1_AMSL (1 << 0) /* Specify Alternate Mode */ 489 489 490 490 #define SASR0_I2SOFF (1 << 7) /* Controller Status */ 491 491 #define SASR0_ROR (1 << 6) /* Rx FIFO Overrun */