tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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net: dsa: qca8k: move port config to dedicated struct

Move ports related config to dedicated struct to keep things organized.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

authored by

Ansuel Smith and committed by
David S. Miller fd0bb28c cef08115

+20 -16
+13 -13
drivers/net/dsa/qca8k.c
··· 1019 1019 delay = 3; 1020 1020 } 1021 1021 1022 - priv->rgmii_tx_delay[cpu_port_index] = delay; 1022 + priv->ports_config.rgmii_tx_delay[cpu_port_index] = delay; 1023 1023 1024 1024 delay = 0; 1025 1025 ··· 1035 1035 delay = 3; 1036 1036 } 1037 1037 1038 - priv->rgmii_rx_delay[cpu_port_index] = delay; 1038 + priv->ports_config.rgmii_rx_delay[cpu_port_index] = delay; 1039 1039 1040 1040 /* Skip sgmii parsing for rgmii* mode */ 1041 1041 if (mode == PHY_INTERFACE_MODE_RGMII || ··· 1045 1045 break; 1046 1046 1047 1047 if (of_property_read_bool(port_dn, "qca,sgmii-txclk-falling-edge")) 1048 - priv->sgmii_tx_clk_falling_edge = true; 1048 + priv->ports_config.sgmii_tx_clk_falling_edge = true; 1049 1049 1050 1050 if (of_property_read_bool(port_dn, "qca,sgmii-rxclk-falling-edge")) 1051 - priv->sgmii_rx_clk_falling_edge = true; 1051 + priv->ports_config.sgmii_rx_clk_falling_edge = true; 1052 1052 1053 1053 if (of_property_read_bool(port_dn, "qca,sgmii-enable-pll")) { 1054 - priv->sgmii_enable_pll = true; 1054 + priv->ports_config.sgmii_enable_pll = true; 1055 1055 1056 1056 if (priv->switch_id == QCA8K_ID_QCA8327) { 1057 1057 dev_err(priv->dev, "SGMII PLL should NOT be enabled for qca8327. Aborting enabling"); 1058 - priv->sgmii_enable_pll = false; 1058 + priv->ports_config.sgmii_enable_pll = false; 1059 1059 } 1060 1060 1061 1061 if (priv->switch_revision < 2) ··· 1281 1281 * not enabled. With ID or TX/RXID delay is enabled and set 1282 1282 * to the default and recommended value. 1283 1283 */ 1284 - if (priv->rgmii_tx_delay[cpu_port_index]) { 1285 - delay = priv->rgmii_tx_delay[cpu_port_index]; 1284 + if (priv->ports_config.rgmii_tx_delay[cpu_port_index]) { 1285 + delay = priv->ports_config.rgmii_tx_delay[cpu_port_index]; 1286 1286 1287 1287 val |= QCA8K_PORT_PAD_RGMII_TX_DELAY(delay) | 1288 1288 QCA8K_PORT_PAD_RGMII_TX_DELAY_EN; 1289 1289 } 1290 1290 1291 - if (priv->rgmii_rx_delay[cpu_port_index]) { 1292 - delay = priv->rgmii_rx_delay[cpu_port_index]; 1291 + if (priv->ports_config.rgmii_rx_delay[cpu_port_index]) { 1292 + delay = priv->ports_config.rgmii_rx_delay[cpu_port_index]; 1293 1293 1294 1294 val |= QCA8K_PORT_PAD_RGMII_RX_DELAY(delay) | 1295 1295 QCA8K_PORT_PAD_RGMII_RX_DELAY_EN; ··· 1397 1397 1398 1398 val |= QCA8K_SGMII_EN_SD; 1399 1399 1400 - if (priv->sgmii_enable_pll) 1400 + if (priv->ports_config.sgmii_enable_pll) 1401 1401 val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX | 1402 1402 QCA8K_SGMII_EN_TX; 1403 1403 ··· 1425 1425 val = 0; 1426 1426 1427 1427 /* SGMII Clock phase configuration */ 1428 - if (priv->sgmii_rx_clk_falling_edge) 1428 + if (priv->ports_config.sgmii_rx_clk_falling_edge) 1429 1429 val |= QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE; 1430 1430 1431 - if (priv->sgmii_tx_clk_falling_edge) 1431 + if (priv->ports_config.sgmii_tx_clk_falling_edge) 1432 1432 val |= QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE; 1433 1433 1434 1434 if (val)
+7 -3
drivers/net/dsa/qca8k.h
··· 270 270 QCA8K_CPU_PORT6, 271 271 }; 272 272 273 - struct qca8k_priv { 274 - u8 switch_id; 275 - u8 switch_revision; 273 + struct qca8k_ports_config { 276 274 bool sgmii_rx_clk_falling_edge; 277 275 bool sgmii_tx_clk_falling_edge; 278 276 bool sgmii_enable_pll; 279 277 u8 rgmii_rx_delay[QCA8K_NUM_CPU_PORTS]; /* 0: CPU port0, 1: CPU port6 */ 280 278 u8 rgmii_tx_delay[QCA8K_NUM_CPU_PORTS]; /* 0: CPU port0, 1: CPU port6 */ 279 + }; 280 + 281 + struct qca8k_priv { 282 + u8 switch_id; 283 + u8 switch_revision; 281 284 bool legacy_phy_port_mapping; 285 + struct qca8k_ports_config ports_config; 282 286 struct regmap *regmap; 283 287 struct mii_bus *bus; 284 288 struct ar8xxx_port_status port_sts[QCA8K_NUM_PORTS];