+20
-2
arch/x86/kernel/cpu/microcode/amd.c
+20
-2
arch/x86/kernel/cpu/microcode/amd.c
···
171
171
return 1;
172
172
}
173
173
174
+
static u32 cpuid_to_ucode_rev(unsigned int val)
175
+
{
176
+
union zen_patch_rev p = {};
177
+
union cpuid_1_eax c;
178
+
179
+
c.full = val;
180
+
181
+
p.stepping = c.stepping;
182
+
p.model = c.model;
183
+
p.ext_model = c.ext_model;
184
+
p.ext_fam = c.ext_fam;
185
+
186
+
return p.ucode_rev;
187
+
}
188
+
174
189
static bool need_sha_check(u32 cur_rev)
175
190
{
191
+
if (!cur_rev) {
192
+
cur_rev = cpuid_to_ucode_rev(bsp_cpuid_1_eax);
193
+
pr_info_once("No current revision, generating the lowest one: 0x%x\n", cur_rev);
194
+
}
195
+
176
196
switch (cur_rev >> 8) {
177
197
case 0x80012: return cur_rev <= 0x800126f; break;
178
198
case 0x80082: return cur_rev <= 0x800820f; break;
···
768
748
769
749
n.equiv_cpu = equiv_cpu;
770
750
n.patch_id = uci->cpu_sig.rev;
771
-
772
-
WARN_ON_ONCE(!n.patch_id);
773
751
774
752
list_for_each_entry(p, µcode_cache, plist)
775
753
if (patch_cpus_equivalent(p, &n, false))