Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ABI: sysfs-bus-coresight-*: fix kernelversion tags

Some kernelversion tags are missing colons. Add them to comply with
ABI description and produce right results when converted to html/pdf.

Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Link: https://lore.kernel.org/r/72c3a6583c2ffca23ae9ee1c0b6dc98618ae0775.1739182025.git.mchehab+huawei@kernel.org

authored by

Mauro Carvalho Chehab and committed by
Jonathan Corbet
fc80c4f0 33a8b650

+65 -65
+39 -39
Documentation/ABI/testing/sysfs-bus-coresight-devices-cti
··· 1 1 What: /sys/bus/coresight/devices/<cti-name>/enable 2 2 Date: March 2020 3 - KernelVersion 5.7 3 + KernelVersion: 5.7 4 4 Contact: Mike Leach or Mathieu Poirier 5 5 Description: (RW) Enable/Disable the CTI hardware. 6 6 7 7 What: /sys/bus/coresight/devices/<cti-name>/powered 8 8 Date: March 2020 9 - KernelVersion 5.7 9 + KernelVersion: 5.7 10 10 Contact: Mike Leach or Mathieu Poirier 11 11 Description: (Read) Indicate if the CTI hardware is powered. 12 12 13 13 What: /sys/bus/coresight/devices/<cti-name>/ctmid 14 14 Date: March 2020 15 - KernelVersion 5.7 15 + KernelVersion: 5.7 16 16 Contact: Mike Leach or Mathieu Poirier 17 17 Description: (Read) Display the associated CTM ID 18 18 19 19 What: /sys/bus/coresight/devices/<cti-name>/nr_trigger_cons 20 20 Date: March 2020 21 - KernelVersion 5.7 21 + KernelVersion: 5.7 22 22 Contact: Mike Leach or Mathieu Poirier 23 23 Description: (Read) Number of devices connected to triggers on this CTI 24 24 25 25 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/name 26 26 Date: March 2020 27 - KernelVersion 5.7 27 + KernelVersion: 5.7 28 28 Contact: Mike Leach or Mathieu Poirier 29 29 Description: (Read) Name of connected device <N> 30 30 31 31 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_signals 32 32 Date: March 2020 33 - KernelVersion 5.7 33 + KernelVersion: 5.7 34 34 Contact: Mike Leach or Mathieu Poirier 35 35 Description: (Read) Input trigger signals from connected device <N> 36 36 37 37 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_types 38 38 Date: March 2020 39 - KernelVersion 5.7 39 + KernelVersion: 5.7 40 40 Contact: Mike Leach or Mathieu Poirier 41 41 Description: (Read) Functional types for the input trigger signals 42 42 from connected device <N> 43 43 44 44 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/out_signals 45 45 Date: March 2020 46 - KernelVersion 5.7 46 + KernelVersion: 5.7 47 47 Contact: Mike Leach or Mathieu Poirier 48 48 Description: (Read) Output trigger signals to connected device <N> 49 49 50 50 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/out_types 51 51 Date: March 2020 52 - KernelVersion 5.7 52 + KernelVersion: 5.7 53 53 Contact: Mike Leach or Mathieu Poirier 54 54 Description: (Read) Functional types for the output trigger signals 55 55 to connected device <N> 56 56 57 57 What: /sys/bus/coresight/devices/<cti-name>/regs/inout_sel 58 58 Date: March 2020 59 - KernelVersion 5.7 59 + KernelVersion: 5.7 60 60 Contact: Mike Leach or Mathieu Poirier 61 61 Description: (RW) Select the index for inen and outen registers. 62 62 63 63 What: /sys/bus/coresight/devices/<cti-name>/regs/inen 64 64 Date: March 2020 65 - KernelVersion 5.7 65 + KernelVersion: 5.7 66 66 Contact: Mike Leach or Mathieu Poirier 67 67 Description: (RW) Read or write the CTIINEN register selected by inout_sel. 68 68 69 69 What: /sys/bus/coresight/devices/<cti-name>/regs/outen 70 70 Date: March 2020 71 - KernelVersion 5.7 71 + KernelVersion: 5.7 72 72 Contact: Mike Leach or Mathieu Poirier 73 73 Description: (RW) Read or write the CTIOUTEN register selected by inout_sel. 74 74 75 75 What: /sys/bus/coresight/devices/<cti-name>/regs/gate 76 76 Date: March 2020 77 - KernelVersion 5.7 77 + KernelVersion: 5.7 78 78 Contact: Mike Leach or Mathieu Poirier 79 79 Description: (RW) Read or write CTIGATE register. 80 80 81 81 What: /sys/bus/coresight/devices/<cti-name>/regs/asicctl 82 82 Date: March 2020 83 - KernelVersion 5.7 83 + KernelVersion: 5.7 84 84 Contact: Mike Leach or Mathieu Poirier 85 85 Description: (RW) Read or write ASICCTL register. 86 86 87 87 What: /sys/bus/coresight/devices/<cti-name>/regs/intack 88 88 Date: March 2020 89 - KernelVersion 5.7 89 + KernelVersion: 5.7 90 90 Contact: Mike Leach or Mathieu Poirier 91 91 Description: (Write) Write the INTACK register. 92 92 93 93 What: /sys/bus/coresight/devices/<cti-name>/regs/appset 94 94 Date: March 2020 95 - KernelVersion 5.7 95 + KernelVersion: 5.7 96 96 Contact: Mike Leach or Mathieu Poirier 97 97 Description: (RW) Set CTIAPPSET register to activate channel. Read back to 98 98 determine current value of register. 99 99 100 100 What: /sys/bus/coresight/devices/<cti-name>/regs/appclear 101 101 Date: March 2020 102 - KernelVersion 5.7 102 + KernelVersion: 5.7 103 103 Contact: Mike Leach or Mathieu Poirier 104 104 Description: (Write) Write APPCLEAR register to deactivate channel. 105 105 106 106 What: /sys/bus/coresight/devices/<cti-name>/regs/apppulse 107 107 Date: March 2020 108 - KernelVersion 5.7 108 + KernelVersion: 5.7 109 109 Contact: Mike Leach or Mathieu Poirier 110 110 Description: (Write) Write APPPULSE to pulse a channel active for one clock 111 111 cycle. 112 112 113 113 What: /sys/bus/coresight/devices/<cti-name>/regs/chinstatus 114 114 Date: March 2020 115 - KernelVersion 5.7 115 + KernelVersion: 5.7 116 116 Contact: Mike Leach or Mathieu Poirier 117 117 Description: (Read) Read current status of channel inputs. 118 118 119 119 What: /sys/bus/coresight/devices/<cti-name>/regs/choutstatus 120 120 Date: March 2020 121 - KernelVersion 5.7 121 + KernelVersion: 5.7 122 122 Contact: Mike Leach or Mathieu Poirier 123 123 Description: (Read) read current status of channel outputs. 124 124 125 125 What: /sys/bus/coresight/devices/<cti-name>/regs/triginstatus 126 126 Date: March 2020 127 - KernelVersion 5.7 127 + KernelVersion: 5.7 128 128 Contact: Mike Leach or Mathieu Poirier 129 129 Description: (Read) read current status of input trigger signals 130 130 131 131 What: /sys/bus/coresight/devices/<cti-name>/regs/trigoutstatus 132 132 Date: March 2020 133 - KernelVersion 5.7 133 + KernelVersion: 5.7 134 134 Contact: Mike Leach or Mathieu Poirier 135 135 Description: (Read) read current status of output trigger signals. 136 136 137 137 What: /sys/bus/coresight/devices/<cti-name>/channels/trigin_attach 138 138 Date: March 2020 139 - KernelVersion 5.7 139 + KernelVersion: 5.7 140 140 Contact: Mike Leach or Mathieu Poirier 141 141 Description: (Write) Attach a CTI input trigger to a CTM channel. 142 142 143 143 What: /sys/bus/coresight/devices/<cti-name>/channels/trigin_detach 144 144 Date: March 2020 145 - KernelVersion 5.7 145 + KernelVersion: 5.7 146 146 Contact: Mike Leach or Mathieu Poirier 147 147 Description: (Write) Detach a CTI input trigger from a CTM channel. 148 148 149 149 What: /sys/bus/coresight/devices/<cti-name>/channels/trigout_attach 150 150 Date: March 2020 151 - KernelVersion 5.7 151 + KernelVersion: 5.7 152 152 Contact: Mike Leach or Mathieu Poirier 153 153 Description: (Write) Attach a CTI output trigger to a CTM channel. 154 154 155 155 What: /sys/bus/coresight/devices/<cti-name>/channels/trigout_detach 156 156 Date: March 2020 157 - KernelVersion 5.7 157 + KernelVersion: 5.7 158 158 Contact: Mike Leach or Mathieu Poirier 159 159 Description: (Write) Detach a CTI output trigger from a CTM channel. 160 160 161 161 What: /sys/bus/coresight/devices/<cti-name>/channels/chan_gate_enable 162 162 Date: March 2020 163 - KernelVersion 5.7 163 + KernelVersion: 5.7 164 164 Contact: Mike Leach or Mathieu Poirier 165 165 Description: (RW) Enable CTIGATE for single channel (Write) or list enabled 166 166 channels through the gate (R). 167 167 168 168 What: /sys/bus/coresight/devices/<cti-name>/channels/chan_gate_disable 169 169 Date: March 2020 170 - KernelVersion 5.7 170 + KernelVersion: 5.7 171 171 Contact: Mike Leach or Mathieu Poirier 172 172 Description: (Write) Disable CTIGATE for single channel. 173 173 174 174 What: /sys/bus/coresight/devices/<cti-name>/channels/chan_set 175 175 Date: March 2020 176 - KernelVersion 5.7 176 + KernelVersion: 5.7 177 177 Contact: Mike Leach or Mathieu Poirier 178 178 Description: (Write) Activate a single channel. 179 179 180 180 What: /sys/bus/coresight/devices/<cti-name>/channels/chan_clear 181 181 Date: March 2020 182 - KernelVersion 5.7 182 + KernelVersion: 5.7 183 183 Contact: Mike Leach or Mathieu Poirier 184 184 Description: (Write) Deactivate a single channel. 185 185 186 186 What: /sys/bus/coresight/devices/<cti-name>/channels/chan_pulse 187 187 Date: March 2020 188 - KernelVersion 5.7 188 + KernelVersion: 5.7 189 189 Contact: Mike Leach or Mathieu Poirier 190 190 Description: (Write) Pulse a single channel - activate for a single clock cycle. 191 191 192 192 What: /sys/bus/coresight/devices/<cti-name>/channels/trigout_filtered 193 193 Date: March 2020 194 - KernelVersion 5.7 194 + KernelVersion: 5.7 195 195 Contact: Mike Leach or Mathieu Poirier 196 196 Description: (Read) List of output triggers filtered across all connections. 197 197 198 198 What: /sys/bus/coresight/devices/<cti-name>/channels/trig_filter_enable 199 199 Date: March 2020 200 - KernelVersion 5.7 200 + KernelVersion: 5.7 201 201 Contact: Mike Leach or Mathieu Poirier 202 202 Description: (RW) Enable or disable trigger output signal filtering. 203 203 204 204 What: /sys/bus/coresight/devices/<cti-name>/channels/chan_inuse 205 205 Date: March 2020 206 - KernelVersion 5.7 206 + KernelVersion: 5.7 207 207 Contact: Mike Leach or Mathieu Poirier 208 208 Description: (Read) show channels with at least one attached trigger signal. 209 209 210 210 What: /sys/bus/coresight/devices/<cti-name>/channels/chan_free 211 211 Date: March 2020 212 - KernelVersion 5.7 212 + KernelVersion: 5.7 213 213 Contact: Mike Leach or Mathieu Poirier 214 214 Description: (Read) show channels with no attached trigger signals. 215 215 216 216 What: /sys/bus/coresight/devices/<cti-name>/channels/chan_xtrigs_sel 217 217 Date: March 2020 218 - KernelVersion 5.7 218 + KernelVersion: 5.7 219 219 Contact: Mike Leach or Mathieu Poirier 220 220 Description: (RW) Write channel number to select a channel to view, read to 221 221 see selected channel number. 222 222 223 223 What: /sys/bus/coresight/devices/<cti-name>/channels/chan_xtrigs_in 224 224 Date: March 2020 225 - KernelVersion 5.7 225 + KernelVersion: 5.7 226 226 Contact: Mike Leach or Mathieu Poirier 227 227 Description: (Read) Read to see input triggers connected to selected view 228 228 channel. 229 229 230 230 What: /sys/bus/coresight/devices/<cti-name>/channels/chan_xtrigs_out 231 231 Date: March 2020 232 - KernelVersion 5.7 232 + KernelVersion: 5.7 233 233 Contact: Mike Leach or Mathieu Poirier 234 234 Description: (Read) Read to see output triggers connected to selected view 235 235 channel. 236 236 237 237 What: /sys/bus/coresight/devices/<cti-name>/channels/chan_xtrigs_reset 238 238 Date: March 2020 239 - KernelVersion 5.7 239 + KernelVersion: 5.7 240 240 Contact: Mike Leach or Mathieu Poirier 241 241 Description: (Write) Clear all channel / trigger programming.
+26 -26
Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
··· 1 1 What: /sys/bus/coresight/devices/<tpdm-name>/integration_test 2 2 Date: January 2023 3 - KernelVersion 6.2 3 + KernelVersion: 6.2 4 4 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 5 5 Description: 6 6 (Write) Run integration test for tpdm. Integration test ··· 14 14 15 15 What: /sys/bus/coresight/devices/<tpdm-name>/reset_dataset 16 16 Date: March 2023 17 - KernelVersion 6.7 17 + KernelVersion: 6.7 18 18 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 19 19 Description: 20 20 (Write) Reset the dataset of the tpdm. ··· 24 24 25 25 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_type 26 26 Date: March 2023 27 - KernelVersion 6.7 27 + KernelVersion: 6.7 28 28 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 29 29 Description: 30 30 (RW) Set/Get the trigger type of the DSB for tpdm. ··· 35 35 36 36 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_ts 37 37 Date: March 2023 38 - KernelVersion 6.7 38 + KernelVersion: 6.7 39 39 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 40 40 Description: 41 41 (RW) Set/Get the trigger timestamp of the DSB for tpdm. ··· 46 46 47 47 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_mode 48 48 Date: March 2023 49 - KernelVersion 6.7 49 + KernelVersion: 6.7 50 50 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 51 51 Description: 52 52 (RW) Set/Get the programming mode of the DSB for tpdm. ··· 60 60 61 61 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_idx 62 62 Date: March 2023 63 - KernelVersion 6.7 63 + KernelVersion: 6.7 64 64 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 65 65 Description: 66 66 (RW) Set/Get the index number of the edge detection for the DSB ··· 69 69 70 70 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_val 71 71 Date: March 2023 72 - KernelVersion 6.7 72 + KernelVersion: 6.7 73 73 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 74 74 Description: 75 75 Write a data to control the edge detection corresponding to ··· 85 85 86 86 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_mask 87 87 Date: March 2023 88 - KernelVersion 6.7 88 + KernelVersion: 6.7 89 89 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 90 90 Description: 91 91 Write a data to mask the edge detection corresponding to the index ··· 97 97 98 98 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcr[0:15] 99 99 Date: March 2023 100 - KernelVersion 6.7 100 + KernelVersion: 6.7 101 101 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 102 102 Description: 103 103 Read a set of the edge control value of the DSB in TPDM. 104 104 105 105 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcmr[0:7] 106 106 Date: March 2023 107 - KernelVersion 6.7 107 + KernelVersion: 6.7 108 108 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 109 109 Description: 110 110 Read a set of the edge control mask of the DSB in TPDM. 111 111 112 112 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpr[0:7] 113 113 Date: March 2023 114 - KernelVersion 6.7 114 + KernelVersion: 6.7 115 115 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 116 116 Description: 117 117 (RW) Set/Get the value of the trigger pattern for the DSB ··· 119 119 120 120 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpmr[0:7] 121 121 Date: March 2023 122 - KernelVersion 6.7 122 + KernelVersion: 6.7 123 123 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 124 124 Description: 125 125 (RW) Set/Get the mask of the trigger pattern for the DSB ··· 127 127 128 128 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:7] 129 129 Date: March 2023 130 - KernelVersion 6.7 130 + KernelVersion: 6.7 131 131 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 132 132 Description: 133 133 (RW) Set/Get the value of the pattern for the DSB subunit TPDM. 134 134 135 135 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:7] 136 136 Date: March 2023 137 - KernelVersion 6.7 137 + KernelVersion: 6.7 138 138 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 139 139 Description: 140 140 (RW) Set/Get the mask of the pattern for the DSB subunit TPDM. 141 141 142 142 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/enable_ts 143 143 Date: March 2023 144 - KernelVersion 6.7 144 + KernelVersion: 6.7 145 145 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 146 146 Description: 147 147 (Write) Set the pattern timestamp of DSB tpdm. Read ··· 153 153 154 154 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/set_type 155 155 Date: March 2023 156 - KernelVersion 6.7 156 + KernelVersion: 6.7 157 157 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 158 158 Description: 159 159 (Write) Set the pattern type of DSB tpdm. Read ··· 165 165 166 166 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_msr/msr[0:31] 167 167 Date: March 2023 168 - KernelVersion 6.7 168 + KernelVersion: 6.7 169 169 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 170 170 Description: 171 171 (RW) Set/Get the MSR(mux select register) for the DSB subunit ··· 173 173 174 174 What: /sys/bus/coresight/devices/<tpdm-name>/cmb_mode 175 175 Date: January 2024 176 - KernelVersion 6.9 176 + KernelVersion: 6.9 177 177 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 178 178 Description: (Write) Set the data collection mode of CMB tpdm. Continuous 179 179 change creates CMB data set elements on every CMBCLK edge. ··· 187 187 188 188 What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_patt/xpr[0:1] 189 189 Date: January 2024 190 - KernelVersion 6.9 190 + KernelVersion: 6.9 191 191 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 192 192 Description: 193 193 (RW) Set/Get the value of the trigger pattern for the CMB ··· 195 195 196 196 What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_patt/xpmr[0:1] 197 197 Date: January 2024 198 - KernelVersion 6.9 198 + KernelVersion: 6.9 199 199 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 200 200 Description: 201 201 (RW) Set/Get the mask of the trigger pattern for the CMB ··· 203 203 204 204 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:1] 205 205 Date: January 2024 206 - KernelVersion 6.9 206 + KernelVersion: 6.9 207 207 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 208 208 Description: 209 209 (RW) Set/Get the value of the pattern for the CMB subunit TPDM. 210 210 211 211 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:1] 212 212 Date: January 2024 213 - KernelVersion 6.9 213 + KernelVersion: 6.9 214 214 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 215 215 Description: 216 216 (RW) Set/Get the mask of the pattern for the CMB subunit TPDM. 217 217 218 218 What: /sys/bus/coresight/devices/<tpdm-name>/cmb_patt/enable_ts 219 219 Date: January 2024 220 - KernelVersion 6.9 220 + KernelVersion: 6.9 221 221 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 222 222 Description: 223 223 (Write) Set the pattern timestamp of CMB tpdm. Read ··· 229 229 230 230 What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_ts 231 231 Date: January 2024 232 - KernelVersion 6.9 232 + KernelVersion: 6.9 233 233 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 234 234 Description: 235 235 (RW) Set/Get the trigger timestamp of the CMB for tpdm. ··· 240 240 241 241 What: /sys/bus/coresight/devices/<tpdm-name>/cmb_ts_all 242 242 Date: January 2024 243 - KernelVersion 6.9 243 + KernelVersion: 6.9 244 244 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 245 245 Description: 246 246 (RW) Read or write the status of timestamp upon all interface. ··· 252 252 253 253 What: /sys/bus/coresight/devices/<tpdm-name>/cmb_msr/msr[0:31] 254 254 Date: January 2024 255 - KernelVersion 6.9 255 + KernelVersion: 6.9 256 256 Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com> 257 257 Description: 258 258 (RW) Set/Get the MSR(mux select register) for the CMB subunit