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dt-bindings: phy: rockchip: convert rockchip-dp-phy.txt to yaml

Convert rockchip-dp-phy.txt to yaml.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Acked-By: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/aa6fe473-71f2-edba-f009-994a3dbc9802@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

authored by

Johan Jonker and committed by
Heiko Stuebner
fc7b83bc aa3555c5

+41 -26
+41
Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/phy/rockchip,rk3288-dp-phy.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Rockchip specific extensions to the Analogix Display Port PHY 8 + 9 + maintainers: 10 + - Heiko Stuebner <heiko@sntech.de> 11 + 12 + properties: 13 + compatible: 14 + const: rockchip,rk3288-dp-phy 15 + 16 + clocks: 17 + maxItems: 1 18 + 19 + clock-names: 20 + const: 24m 21 + 22 + "#phy-cells": 23 + const: 0 24 + 25 + required: 26 + - compatible 27 + - clocks 28 + - clock-names 29 + - "#phy-cells" 30 + 31 + additionalProperties: false 32 + 33 + examples: 34 + - | 35 + #include <dt-bindings/clock/rk3288-cru.h> 36 + edp-phy { 37 + compatible = "rockchip,rk3288-dp-phy"; 38 + clocks = <&cru SCLK_EDP_24M>; 39 + clock-names = "24m"; 40 + #phy-cells = <0>; 41 + };
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Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt
··· 1 - Rockchip specific extensions to the Analogix Display Port PHY 2 - ------------------------------------ 3 - 4 - Required properties: 5 - - compatible : should be one of the following supported values: 6 - - "rockchip.rk3288-dp-phy" 7 - - clocks: from common clock binding: handle to dp clock. 8 - of memory mapped region. 9 - - clock-names: from common clock binding: 10 - Required elements: "24m" 11 - - #phy-cells : from the generic PHY bindings, must be 0; 12 - 13 - Example: 14 - 15 - grf: syscon@ff770000 { 16 - compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd"; 17 - 18 - ... 19 - 20 - edp_phy: edp-phy { 21 - compatible = "rockchip,rk3288-dp-phy"; 22 - clocks = <&cru SCLK_EDP_24M>; 23 - clock-names = "24m"; 24 - #phy-cells = <0>; 25 - }; 26 - };